Che-Liang Chiou e34b271718 ptx: support setp's 4-operand format ... llvm-svn: 128767		2011-04-02 08:51:39 +00:00
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ARM	Do some peephole optimizations to remove pointless VMOVs from Neon to integer	2011-04-02 02:40:43 +00:00
Alpha	If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.	2010-12-06 22:39:26 +00:00
Blackfin	Don't completely eliminate identity copies that also modify super register liveness.	2011-03-31 17:55:25 +00:00
CBackend	…
CPP	…
CellSPU	Roll r127459 back in:	2011-03-11 21:52:04 +00:00
Generic	Make this test x86 specific because the ARM backend can't handle it.	2011-02-28 12:30:47 +00:00
MBlaze	fix visitShift to properly zero extend the shift amount if the provided operand	2011-02-13 09:02:52 +00:00
MSP430	Enhance ComputeMaskedBits to know that aligned frameindexes	2011-02-13 22:25:43 +00:00
Mips	Add code for analyzing FP branches. Clean up branch Analysis functions.	2011-04-01 17:39:08 +00:00
PTX	ptx: support setp's 4-operand format	2011-04-02 08:51:39 +00:00
PowerPC	Fix mistyped CHECK lines.	2011-03-09 22:07:31 +00:00
SPARC	Fix Mips, Sparc, and XCore tests that were dependent on register allocation.	2011-03-31 18:42:43 +00:00
SystemZ	Fix SystemZ tests	2011-03-31 23:02:12 +00:00
Thumb	Fix Thumb and Thumb2 tests to be register allocator independent.	2011-03-31 23:31:50 +00:00
Thumb2	Fix Thumb and Thumb2 tests to be register allocator independent.	2011-03-31 23:31:50 +00:00
X86	Mark all uses as <undef> when joining a copy.	2011-03-31 17:23:25 +00:00
XCore	Fix Mips, Sparc, and XCore tests that were dependent on register allocation.	2011-03-31 18:42:43 +00:00