hanchenye-llvm-project/llvm/test
Greg Bedwell e790f6fb06 [UpdateTestChecks] Improved update_mca_test_checks block analysis
Previously update_mca_test_checks worked entirely at "block" level where
a block is some sequence of lines delimited by at least one empty line.
This generally worked well, but could sometimes lead to excessive
repetition of check lines for various prefixes if some block was almost
identical between prefixes, but not quite (for example, due to a
different dispatch width in the otherwise identical summary views).

This new analyis attempts to split blocks further in the case where the
following conditions are met:
  a) There is some prefix common to every RUN line (typically 'ALL').
  b) The first line of the block is common to the output with every prefix.
  c) The block has the same number of lines for the output with every prefix.

Also, regenerated all llvm-mca test files with the following command:
update_mca_test_checks.py "../test/tools/llvm-mca/*/*.s" "../test/tools/llvm-mca/*/*/*.s"

The new analysis showed a "multiple lines not disambiguated by prefixes" warning
for test "AArch64/Exynos/scheduler-queue-usage.s" so I've also added some
explicit prefixes to each of the RUN lines in that test.

Differential Revision: https://reviews.llvm.org/D47321

llvm-svn: 333204
2018-05-24 16:36:44 +00:00
..
Analysis Fix aliasing of launder.invariant.group 2018-05-23 09:16:44 +00:00
Assembler [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Bindings [LLVM-C] Add DIBuilder Bindings For ObjC Classes 2018-05-21 16:27:35 +00:00
Bitcode [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
BugPoint
CodeGen [x86] add vector load-cmp-select tests; NFC 2018-05-24 13:49:57 +00:00
DebugInfo Move a debug info test into the X86 directory 2018-05-23 22:50:45 +00:00
Examples
ExecutionEngine [RuntimeDyld][MachO] Add support for MachO::ARM64_RELOC_POINTER_TO_GOT reloc. 2018-05-23 21:27:07 +00:00
Feature
FileCheck
Instrumentation [msan] Don't check divisor shadow in fdiv. 2018-05-18 20:19:53 +00:00
Integer
JitListener [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
LTO [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Linker [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
MC [RISCV] Support linker relax function call from auipc and jalr to jal 2018-05-24 06:21:23 +00:00
Object [WebAsembly] Update default triple in test files to wasm32-unknown-unkown. 2018-05-10 17:49:11 +00:00
ObjectYAML Resubmit [pdb] Change /DEBUG:GHASH to emit 8 byte hashes." 2018-05-17 22:55:15 +00:00
Other Add remarks describing when a pass changes the IR instruction count of a module 2018-05-18 17:26:39 +00:00
SafepointIRVerifier SafepointIRVerifier is made unreachable block tolerant 2018-05-23 05:54:55 +00:00
SymbolRewriter
TableGen [GlobalISel][InstructionSelect] Moving Reg Bank Checks forward, perf patch 9 2018-05-23 23:58:10 +00:00
ThinLTO/X86 [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Transforms [LICM] Preserve DT and LoopInfo specifically 2018-05-24 15:58:34 +00:00
Unit
Verifier [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
YAMLParser
tools [UpdateTestChecks] Improved update_mca_test_checks block analysis 2018-05-24 16:36:44 +00:00
.clang-format
CMakeLists.txt [tools] Add missing test dependency 2018-05-07 22:00:59 +00:00
TestRunner.sh
lit.cfg.py [tools] Adjust the lit config for llvm-strip 2018-05-07 21:07:01 +00:00
lit.site.cfg.py.in Remove 'abi-breaking-checks' lit feature. 2018-05-09 12:39:39 +00:00