hanchenye-llvm-project/llvm/lib/Target/R600
Christian Konig 3625055b8c R600/SI: remove shader type intrinsic
Just encode the type as target specific attribute.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176622
2013-03-07 09:03:46 +00:00
..
InstPrinter R600/SI: add all the other missing asm operands v2 2013-02-21 15:17:22 +00:00
MCTargetDesc R600/SI: remove GPR*AlignEncode 2013-03-01 09:46:17 +00:00
TargetInfo
AMDGPU.h R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel. 2013-03-05 15:04:55 +00:00
AMDGPU.td
AMDGPUAsmPrinter.cpp R600/SI: cleanup literal handling v3 2013-02-16 11:28:22 +00:00
AMDGPUAsmPrinter.h
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPUFrameLowering.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPUISelLowering.cpp R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
AMDGPUISelLowering.h R600/SI: add folding helper 2013-02-26 17:52:16 +00:00
AMDGPUIndirectAddressing.cpp R600/SI: fix unused variable warning 2013-03-07 09:03:30 +00:00
AMDGPUInstrInfo.cpp R600/SI: add VOP mapping functions 2013-02-26 17:52:42 +00:00
AMDGPUInstrInfo.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPUInstrInfo.td R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPUInstructions.td R600/SI: remove shader type intrinsic 2013-03-07 09:03:46 +00:00
AMDGPUIntrinsics.td R600/SI: remove shader type intrinsic 2013-03-07 09:03:46 +00:00
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp R600: Consolidate sub register indices. 2013-02-07 14:02:37 +00:00
AMDGPURegisterInfo.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPURegisterInfo.td R600: Consolidate sub register indices. 2013-02-07 14:02:37 +00:00
AMDGPUStructurizeCFG.cpp R600/SI: fix warning about overloaded virtual 2013-03-01 09:46:11 +00:00
AMDGPUSubtarget.cpp
AMDGPUSubtarget.h
AMDGPUTargetMachine.cpp R600: initial scheduler code 2013-03-05 18:41:32 +00:00
AMDGPUTargetMachine.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDIL.h R600: rework handling of the constants 2013-01-23 02:09:06 +00:00
AMDIL7XXDevice.cpp
AMDIL7XXDevice.h
AMDILBase.td
AMDILCFGStructurizer.cpp
AMDILDevice.cpp R600: Clean up datalayout strings so they better match hardware capabilities 2013-03-04 17:40:28 +00:00
AMDILDevice.h
AMDILDeviceInfo.cpp
AMDILDeviceInfo.h
AMDILDevices.h
AMDILEvergreenDevice.cpp
AMDILEvergreenDevice.h
AMDILISelDAGToDAG.cpp R600: Turn BUILD_VECTOR into Reg_Sequence 2013-03-05 15:04:49 +00:00
AMDILISelLowering.cpp R600: Update for name changes from r175667. 2013-02-20 21:31:28 +00:00
AMDILInstrInfo.td R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
AMDILNIDevice.cpp
AMDILNIDevice.h
AMDILPeepholeOptimizer.cpp R600/AMDILPeepholeOptimizer.cpp: Tweak std::make_pair to satisfy C++11. 2013-01-29 16:31:56 +00:00
AMDILRegisterInfo.td
AMDILSIDevice.cpp R600: Clean up datalayout strings so they better match hardware capabilities 2013-03-04 17:40:28 +00:00
AMDILSIDevice.h
CMakeLists.txt Update cmake build. 2013-03-05 18:54:05 +00:00
LLVMBuild.txt
Makefile
Processors.td R600: Add an explicit default processor 2013-02-07 19:39:34 +00:00
R600Defines.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
R600ExpandSpecialInstrs.cpp R600: improve inputs/interpolation handling 2013-02-05 17:09:14 +00:00
R600ISelLowering.cpp R600/SI: remove shader type intrinsic 2013-03-07 09:03:46 +00:00
R600ISelLowering.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
R600InstrInfo.cpp R600: Do not predicate vector op 2013-03-05 19:12:06 +00:00
R600InstrInfo.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
R600Instructions.td R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel. 2013-03-05 15:04:55 +00:00
R600Intrinsics.td R600: Support for TBO 2013-02-18 14:11:19 +00:00
R600MachineFunctionInfo.cpp R600: improve inputs/interpolation handling 2013-02-05 17:09:14 +00:00
R600MachineFunctionInfo.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
R600MachineScheduler.cpp R600: initial scheduler code 2013-03-05 18:41:32 +00:00
R600MachineScheduler.h R600: initial scheduler code 2013-03-05 18:41:32 +00:00
R600RegisterInfo.cpp R600: Mark all members of the TRegMem register class as reserved 2013-02-19 15:22:45 +00:00
R600RegisterInfo.h
R600RegisterInfo.td R600: Add AR_X to the R600_TReg_X register class. 2013-02-19 15:22:47 +00:00
R600Schedule.td
SIAnnotateControlFlow.cpp R600/SI: Check for empty stack in SIAnnotateControlFlow::isTopOfStack 2013-02-14 08:00:33 +00:00
SIAssignInterpRegs.cpp
SIISelLowering.cpp R600/SI: remove shader type intrinsic 2013-03-07 09:03:46 +00:00
SIISelLowering.h R600/SI: add post ISel folding for SI v2 2013-02-26 17:52:23 +00:00
SIInsertWaits.cpp R600/SI: fix inserting waits for unordered defines 2013-03-01 09:46:04 +00:00
SIInstrFormats.td R600/SI: remove GPR*AlignEncode 2013-03-01 09:46:17 +00:00
SIInstrInfo.cpp R600/SI: handle all registers in copyPhysReg v2 2013-03-01 09:46:27 +00:00
SIInstrInfo.h R600/SI: add VOP mapping functions 2013-02-26 17:52:42 +00:00
SIInstrInfo.td R600/SI: remove GPR*AlignEncode 2013-03-01 09:46:17 +00:00
SIInstructions.td R600/SI: switch types of SGPRs to v*i8 2013-03-07 09:03:38 +00:00
SIIntrinsics.td R600/SI: switch types of SGPRs to v*i8 2013-03-07 09:03:38 +00:00
SILowerControlFlow.cpp R600/SI: cleanup literal handling v3 2013-02-16 11:28:22 +00:00
SIMachineFunctionInfo.cpp R600/SI: remove shader type intrinsic 2013-03-07 09:03:46 +00:00
SIMachineFunctionInfo.h R600/SI: remove shader type intrinsic 2013-03-07 09:03:46 +00:00
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td R600/SI: switch types of SGPRs to v*i8 2013-03-07 09:03:38 +00:00
SISchedule.td