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James Molloy 196ad0823e [LSR] Don't try and create post-inc expressions on non-rotated loops
If a loop is not rotated (for example when optimizing for size), the latch is not the backedge. If we promote an expression to post-inc form, we not only increase register pressure and add a COPY for that IV expression but for all IVs!

Motivating testcase:

    void f(float *a, float *b, float *c, int n) {
      while (n-- > 0)
        *c++ = *a++ + *b++;
    }

It's imperative that the pointer increments be located in the latch block and not the header block; if not, we cannot use post-increment loads and stores and we have to keep both the post-inc and pre-inc values around until the end of the latch which bloats register usage.

llvm-svn: 278658
2016-08-15 07:53:03 +00:00
clang [CodeGen] Ignore unnamed bitfields before handling vector fields 2016-08-15 07:20:40 +00:00
clang-tools-extra [clang-tidy] MPIBufferDerefCheck 2016-08-12 19:30:31 +00:00
compiler-rt Add compiler-rt side test for no_sanitize("cfi") attribute 2016-08-12 17:26:37 +00:00
debuginfo-tests
libclc Make min follow the OCL 1.0 specs 2016-07-25 22:36:22 +00:00
libcxx Check in SFINAE base class for use in optional/variant 2016-08-15 01:51:54 +00:00
libcxxabi Fix ASAN failures in the demangler 2016-08-13 00:02:33 +00:00
libunwind Allow building both shared and static library 2016-08-08 22:55:48 +00:00
lld [ELF] Do not add start and end symbols in case they are already defined 2016-08-15 07:24:20 +00:00
lldb elf-core: set powerpc vector byte order correctly 2016-08-14 11:30:11 +00:00
llgo [llgo] add llgo source path to LLVM_GO_PACKAGES 2016-07-27 03:01:00 +00:00
llvm [LSR] Don't try and create post-inc expressions on non-rotated loops 2016-08-15 07:53:03 +00:00
openmp Fixes for hierarchical barrier (possible hang if team size changed). 2016-08-11 13:04:00 +00:00
parallel-libs [StreamExecutor] Add DeviceMemory and kernel arg packing 2016-08-08 16:45:19 +00:00
polly [GPGPU] Ensure arrays where only parts are modified are copied to GPU 2016-08-10 10:58:19 +00:00