hanchenye-llvm-project/llvm/test/MC/Disassembler/Mips
Akira Hatanaka 263c6af8f3 [mips] Increase the number of floating point control registers available to 32.
Create a dedicated register class for floating point condition code registers and
move FCC0 from register class CCR to the new register class.

llvm-svn: 185373
2013-07-01 20:31:44 +00:00
..
lit.local.cfg
mips-dsp.txt
mips32.txt [mips] Increase the number of floating point control registers available to 32. 2013-07-01 20:31:44 +00:00
mips32_le.txt [mips] Increase the number of floating point control registers available to 32. 2013-07-01 20:31:44 +00:00
mips32r2.txt [mips] Increase the number of floating point control registers available to 32. 2013-07-01 20:31:44 +00:00
mips32r2_le.txt [mips] Increase the number of floating point control registers available to 32. 2013-07-01 20:31:44 +00:00
mips64.txt
mips64_le.txt
mips64r2.txt
mips64r2_le.txt