025df3b827
The code is currently using the ambiguous instruction "sub sp, sp, w9, lsl #4". The ARM reference manual says this isn't valid, and it's not clear whether it's supposed to mean uxtw or uxtx. It doesn't matter which instruction we use here, since the high bits of the operand are zero anyway, so I arbitrarily choose uxtw, to preserve the register name. See https://reviews.llvm.org/D60840 for the LLVM patch. Differential Revision: https://reviews.llvm.org/D61770 llvm-svn: 360711 |
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clang | ||
clang-tools-extra | ||
compiler-rt | ||
debuginfo-tests | ||
libclc | ||
libcxx | ||
libcxxabi | ||
libunwind | ||
lld | ||
lldb | ||
llgo | ||
llvm | ||
openmp | ||
parallel-libs | ||
polly | ||
pstl | ||
.arcconfig | ||
.clang-format | ||
.clang-tidy | ||
.gitignore | ||
README.md |
README.md
The LLVM Compiler Infrastructure
This directory and its subdirectories contain source code for LLVM, a toolkit for the construction of highly optimized compilers, optimizers, and runtime environments.