Akira Hatanaka
|
453ac88b56
|
Change the names of 64-bit logical instructions so that they match the names of
the real instructions.
llvm-svn: 141718
|
2011-10-11 21:48:01 +00:00 |
|
Akira Hatanaka
|
46a7994ac9
|
Remove redundancy in setcc patterns using multiclass.
llvm-svn: 141715
|
2011-10-11 21:40:01 +00:00 |
|
Akira Hatanaka
|
8c1c51045d
|
Use sltiu instead of sltu when a register operand and immediate are compared.
llvm-svn: 141708
|
2011-10-11 20:44:43 +00:00 |
|
Akira Hatanaka
|
7148bce86e
|
Add patterns for conditional branches with 64-bit register operands.
llvm-svn: 141696
|
2011-10-11 19:09:09 +00:00 |
|
Akira Hatanaka
|
f75add6236
|
Add support for 64-bit set-on-less-than instructions.
llvm-svn: 141695
|
2011-10-11 18:53:46 +00:00 |
|
Akira Hatanaka
|
4b6ac98fcf
|
Add support for conditional branch instructions with 64-bit register operands.
llvm-svn: 141694
|
2011-10-11 18:49:17 +00:00 |
|
Akira Hatanaka
|
b6d72cbeb9
|
Make changes necessary for supporting floating point load and store instructions
that have 64-bit pointers or access the 32 x 64-bit floating pointer register
file. Update functions in MipsInstrInfo.cpp too.
llvm-svn: 141623
|
2011-10-11 01:12:52 +00:00 |
|
Akira Hatanaka
|
09b23eb7bc
|
Modify lowering of GlobalAddress so that correct code is emitted when target is
Mips64.
llvm-svn: 141618
|
2011-10-11 00:55:05 +00:00 |
|
Akira Hatanaka
|
be68f3c348
|
Add definitions of 64-bit loads and stores. Add a patterns for unaligned
zextloadi32 for which there is no corresponding pseudo or real instruction.
llvm-svn: 141608
|
2011-10-11 00:27:28 +00:00 |
|
Akira Hatanaka
|
fd2d7dcc31
|
Change definitions of classes LoadM and StoreM in preparation for adding support
for 64-bit load and store instructions. Add definitions of 64-bit memory operand
and 16-bit immediate operand.
llvm-svn: 141603
|
2011-10-11 00:11:12 +00:00 |
|
Akira Hatanaka
|
c3a6357ee3
|
Add support for 64-bit logical NOR.
llvm-svn: 141029
|
2011-10-03 21:23:18 +00:00 |
|
Akira Hatanaka
|
48a72ca0cb
|
Add support for 64-bit count leading ones and zeros instructions.
llvm-svn: 141028
|
2011-10-03 21:16:50 +00:00 |
|
Akira Hatanaka
|
b1538f91dc
|
Add support for 64-bit divide instructions.
llvm-svn: 141024
|
2011-10-03 21:06:13 +00:00 |
|
Akira Hatanaka
|
a279d9bd6a
|
Add support for 64-bit integer multiply instructions.
llvm-svn: 141017
|
2011-10-03 20:01:11 +00:00 |
|
Akira Hatanaka
|
cdcc74563c
|
Add definitions of instructions which move values between 64-bit integer
registers and 64-bit HI and LO registers. Fix encoding of the 32-bit versions
of the instructions.
llvm-svn: 141015
|
2011-10-03 19:28:44 +00:00 |
|
Akira Hatanaka
|
7ba8a8d656
|
Add definitions of Mips64 rotate instructions.
llvm-svn: 140870
|
2011-09-30 18:51:46 +00:00 |
|
Akira Hatanaka
|
9727af7657
|
isCommutable should be 0 for DSUBu.
llvm-svn: 140862
|
2011-09-30 17:26:36 +00:00 |
|
Akira Hatanaka
|
61e256aa69
|
Mips64 shift instructions.
llvm-svn: 140841
|
2011-09-30 03:18:46 +00:00 |
|
Akira Hatanaka
|
7769a77710
|
Mips64 arithmetic and logical instructions with one source register and
immediate.
llvm-svn: 140839
|
2011-09-30 02:08:54 +00:00 |
|
Akira Hatanaka
|
36036412e2
|
Mips64 arithmetic and logical instructions with two source registers.
llvm-svn: 140806
|
2011-09-29 20:37:56 +00:00 |
|
Akira Hatanaka
|
c117967b19
|
Mips64 predicate definitions. Patch by Liu.
llvm-svn: 140703
|
2011-09-28 17:50:27 +00:00 |
|
Akira Hatanaka
|
7d7ee0c3ac
|
Add .td file.
llvm-svn: 140446
|
2011-09-24 01:40:18 +00:00 |