e373163e95
fix a bunch of regressions
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llvm-svn: 24269
2005-11-10 16:59:55 +00:00
97a7fcfd2b
whatever. Intermediate patch to see what breaks. Seems ok.
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llvm-svn: 24260
2005-11-09 19:17:08 +00:00
b28f214033
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
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llvm-svn: 24233
2005-11-08 02:11:51 +00:00
5c7d731832
If the module has no t-t and the host is an alpha, default to using the Alpha BE
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llvm-svn: 24110
2005-10-30 16:44:01 +00:00
85b184b292
Make -time-passes output prettier
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llvm-svn: 24096
2005-10-29 16:45:02 +00:00
381cab36ed
int comparison patterns
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llvm-svn: 24020
2005-10-26 18:44:45 +00:00
75eab3ca63
Typo made worse x 2 - take 2.
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llvm-svn: 24018
2005-10-26 18:07:50 +00:00
b1f2cedbaa
Typo x 2
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llvm-svn: 24016
2005-10-26 17:50:22 +00:00
7ac194560e
Simplify instinfo, set random bits on more fp insts, and fix 1 opcode
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llvm-svn: 24014
2005-10-26 17:41:46 +00:00
a2b5235fac
Give full control of subtarget features over to table generated code.
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llvm-svn: 24013
2005-10-26 17:30:34 +00:00
53ad110490
Add attribute name and type to SubtargetFeatures.
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llvm-svn: 24012
2005-10-26 17:28:23 +00:00
26ee5953f7
The dag isel generator generates this now
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llvm-svn: 23984
2005-10-25 20:36:10 +00:00
db4621a5f5
Preparation of supporting scheduling info. Need to find info based on selected
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CPU.
llvm-svn: 23974
2005-10-25 15:15:28 +00:00
03bf3a1763
Simplify this due to changes in the tblgen side
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llvm-svn: 23908
2005-10-23 22:33:22 +00:00
766361e8f4
Autogen subtarget information from .td files.
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llvm-svn: 23904
2005-10-23 22:15:34 +00:00
4b5921d4d8
Add subtarget feature/processor defns to the .td file
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llvm-svn: 23903
2005-10-23 22:08:45 +00:00
c6072af580
Add several things.
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loads
branches
setcc
working calls
Global address
External addresses
now I can manage malloc calls.
llvm-svn: 23887
2005-10-23 03:43:48 +00:00
5a990417f8
Well, the Constant matching pattern works. Can't say much about calls or globals yet.
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llvm-svn: 23884
2005-10-22 22:06:58 +00:00
229878b7bc
silence a release mode warning
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llvm-svn: 23868
2005-10-21 16:01:26 +00:00
62e9e5462c
Kill some now-dead code.
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llvm-svn: 23857
2005-10-21 01:52:20 +00:00
a099c0131e
byte zap not immediate goodness
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llvm-svn: 23855
2005-10-21 01:24:05 +00:00
a6a23b5874
Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expect new stuff to pass in the JIT tonight
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llvm-svn: 23852
2005-10-20 23:58:36 +00:00
d4c0ed74e4
added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh
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llvm-svn: 23849
2005-10-20 19:39:24 +00:00
eb0ad1863b
Sounds good, finish the intop conversion.
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llvm-svn: 23843
2005-10-20 14:42:48 +00:00
fd07fcda67
Add some pattern fragments to simplify the repetitive parts of the patterns
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for some common ops and use them for a few examples. Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.
llvm-svn: 23837
2005-10-20 04:21:06 +00:00
cd4be8798f
simplify this a bit by using immediates
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llvm-svn: 23836
2005-10-20 03:57:03 +00:00
794f15868a
forgot this one
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llvm-svn: 23833
2005-10-20 00:29:02 +00:00
7b69867052
ret 0; works, not much else
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still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.
llvm-svn: 23832
2005-10-20 00:28:31 +00:00
1dfb85c7af
This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out
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llvm-svn: 23676
2005-10-09 20:11:35 +00:00
e4c91fc9e8
This is suppose to work now
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llvm-svn: 23644
2005-10-06 16:54:29 +00:00
332df13b9e
remove VAX compatibility instruction, we will never use this
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llvm-svn: 23643
2005-10-06 16:53:32 +00:00
98da1d9910
Sort the cpu and features table, so that the alpha backend doesn't fail EVERY
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compile with an assertion that the tables are not sorted!
llvm-svn: 23591
2005-10-02 07:13:52 +00:00
49e48f6234
subtarget support for CIX and FIX extentions (the only 2 I care about right now)
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llvm-svn: 23569
2005-09-30 20:24:38 +00:00
a654525c1c
Pass extra regclasses into spilling code
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llvm-svn: 23537
2005-09-30 01:29:42 +00:00
a7a83b9255
begining alpha subtarget support
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llvm-svn: 23531
2005-09-29 22:54:56 +00:00
0815dcae3f
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
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Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
llvm-svn: 23505
2005-09-28 22:29:17 +00:00
fb96e50b8c
This code is no longer needed, it is moved to the target-indep code
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llvm-svn: 23332
2005-09-13 19:31:44 +00:00
64685b4ca2
Majik numbers are bad
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llvm-svn: 23330
2005-09-13 19:03:13 +00:00
7c8dba750c
ignore generated files
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llvm-svn: 23263
2005-09-07 23:47:44 +00:00
a63a066205
Fix up the AssertXext problem, as well as adding it at calls
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llvm-svn: 23246
2005-09-06 17:00:23 +00:00
c8bd5bda59
revert part of the last change, should fix regressions
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llvm-svn: 23241
2005-09-04 06:12:19 +00:00
9690a4f321
Pull out Lowering in preperation for multiple ISels. Oh, and get rid of some stuff
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llvm-svn: 23220
2005-09-02 18:46:02 +00:00
19058c3989
1. Use SubtargetFeatures in llc/lli.
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2. Propagate feature "string" to all targets.
3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.
llvm-svn: 23192
2005-09-01 21:38:21 +00:00
c30405e0ee
Change ConstantPoolSDNode to actually hold the Constant itself instead of
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putting it into the constant pool. This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.
llvm-svn: 23081
2005-08-26 17:15:30 +00:00
8975de187f
Put register classes in namespaces
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llvm-svn: 22924
2005-08-19 18:50:46 +00:00
0faf0b7313
This code has always been dead for alpha
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llvm-svn: 22915
2005-08-19 18:33:26 +00:00
8cbddfc8c5
mark variable arity instructions as such. Alpha wins the battle for
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cleanest backend in this metric :)
llvm-svn: 22893
2005-08-19 00:51:37 +00:00
33900811ee
Fix some bugs in the alpha backend, some of which I introduced yesterday,
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and some that were preexisting. All alpha regtests pass now.
llvm-svn: 22829
2005-08-17 17:08:24 +00:00
73370ba5fd
thinko. Should fix s4addl.ll regression
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llvm-svn: 22817
2005-08-17 00:47:24 +00:00
7c76278242
update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodes
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llvm-svn: 22807
2005-08-16 21:56:37 +00:00
Andrew Lenharth