0d025421cd
Extend getMallocArraySize() to determine the array size if the malloc argument is:
...
ArraySize * ElementSize
ElementSize * ArraySize
ArraySize << log2(ElementSize)
ElementSize << log2(ArraySize)
Refactor isArrayMallocHelper and delete isSafeToGetMallocArraySize, so that there is only 1 copy of the malloc array determining logic.
Update users of getMallocArraySize() to not bother calling isArrayMalloc() as well.
llvm-svn: 85421
2009-10-28 20:18:55 +00:00
fd7ddd9c69
Fix to pass options from Gold plugin to LTO codegen
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llvm-svn: 85419
2009-10-28 18:55:55 +00:00
c1ba4c2941
Teach cmake that mk[sd]temp is defined in stdlib.h on some systems.
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This fixes parallel build with clang on glibc platforms.
llvm-svn: 85414
2009-10-28 18:37:31 +00:00
e30ed53c05
Make AntiDepReg.h internal.
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llvm-svn: 85412
2009-10-28 18:29:54 +00:00
73789b848d
Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate the
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opcode and operand with a tab. Check for these instructions in the usual
places.
llvm-svn: 85411
2009-10-28 18:26:41 +00:00
6203c6868f
fconsts and fconstd are obviously re-materializable.
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llvm-svn: 85410
2009-10-28 18:19:56 +00:00
294aea709e
Cleanup now that frame index scavenging via post-pass is working for ARM and Thumb2.
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llvm-svn: 85406
2009-10-28 17:33:28 +00:00
ffd561bc2d
llvm.dbg.global_variables do not exist anymore.
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llvm-svn: 85402
2009-10-28 16:51:52 +00:00
fbaac77c70
add a new 'SetCurrentDebugType' API (requested by Andrew Haley for JIT
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stuff) to programmatically control the current debug flavor. While
I'm at it, doxygenate Debug.h and clean it up.
llvm-svn: 85395
2009-10-28 15:32:19 +00:00
14ca753e28
Don't call SDNode::isPredecessorOf when it isn't necessary. If the load's
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chains have no users, they can't be predecessors of the condition.
llvm-svn: 85394
2009-10-28 15:28:02 +00:00
57780dfdfc
Simplify this code: if the unfolded load can't be hoisted, just delete
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the new instructions and leave the old one in place.
llvm-svn: 85393
2009-10-28 15:23:36 +00:00
1042ca112f
No newline at end of file.
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llvm-svn: 85390
2009-10-28 15:04:53 +00:00
ecc60b80b0
Update CMake file.
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llvm-svn: 85389
2009-10-28 13:29:18 +00:00
03ab4dcff9
use metavariable <result> instead of SSA name %result for consistency
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llvm-svn: 85388
2009-10-28 13:14:50 +00:00
bd0328f668
ooops, SSA name should not be part of the link
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llvm-svn: 85387
2009-10-28 13:05:07 +00:00
f50fd57543
advertise new syntax for unnamed instructions
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and eliminate confusing double-use of SSA names
(work in progress)
llvm-svn: 85385
2009-10-28 09:21:30 +00:00
2b2bd28973
Treat lifetime begin/end markers as allocations/frees respectively for the
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purposes for GVN/DSE.
llvm-svn: 85383
2009-10-28 07:05:35 +00:00
175308c43e
Add ABCD, a generalized implementation of the Elimination of Array Bounds
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Checks on Demand algorithm which looks at arbitrary branches instead of loop
iterations. This is GSoC work by Andre Tavares with only editorial changes
applied!
llvm-svn: 85382
2009-10-28 07:03:15 +00:00
ec6d7c945d
Give ARMISD::EH_SJLJ_LONGJMP and EH_SJLJ_SETJMP names.
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llvm-svn: 85381
2009-10-28 06:55:03 +00:00
fc16e5a98f
Be more careful about invariance reasoning on "store" queries. Stores still need
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to depend on Ref and ModRef calls within the invariant region.
llvm-svn: 85380
2009-10-28 06:30:52 +00:00
f64db3e1d0
X86 palignr intrinsics immediate field is in bits. ISel must transform it into bytes.
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llvm-svn: 85379
2009-10-28 06:30:34 +00:00
d0e86d57c1
Add trivial support for the invariance intrinsics to memdep. This logic is
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purely local for now.
llvm-svn: 85378
2009-10-28 06:18:42 +00:00
5956dc87d3
add bitcode reader support for blockaddress. We can now fully
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round trip blockaddress through .ll and .bc files, so add a testcase.
There are still a bunch of places in the optimizer and other places
that need to be updated to work with these constructs, but at least
the basics are in now.
llvm-svn: 85377
2009-10-28 05:53:48 +00:00
f540d74b58
bitcode writer support for blockaddress.
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llvm-svn: 85376
2009-10-28 05:24:40 +00:00
a91a563530
Previously, all operands to Constant were themselves constant.
...
In the new world order, BlockAddress can have a BasicBlock operand.
This doesn't permute much, because if you have a ConstantExpr (or
anything more specific than Constant) we still know the operand has
to be a Constant.
llvm-svn: 85375
2009-10-28 05:14:34 +00:00
c750bb62ac
doc bug spotted by apinski
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llvm-svn: 85372
2009-10-28 04:47:06 +00:00
2cb85b4020
'static const void *X = &&y' can only be put in the
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readonly section if a reference to the containing function
is valid in the readonly section.
llvm-svn: 85370
2009-10-28 04:12:16 +00:00
cd139c0373
Rewrite SelectionDAG::isPredecessorOf to be iterative instead of
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recursive to avoid consuming extraordinary amounts of stack space
when processing tall graphs.
llvm-svn: 85369
2009-10-28 03:44:30 +00:00
3432c62d93
full asmparser support for blockaddress. We can now do:
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$ llvm-as foo.ll -d -disable-output
which reads and prints the .ll file. BC encoding is the
next project. Testcase will go in once that works.
llvm-svn: 85368
2009-10-28 03:39:23 +00:00
214cc709bc
asmprinter support for BlockAddress.
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llvm-svn: 85367
2009-10-28 03:38:12 +00:00
3a39530445
when we tear down a module, we need to be careful to
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zap BlockAddress values.
llvm-svn: 85366
2009-10-28 03:37:35 +00:00
1c4b03c2d7
basic blocks can now have non-instruction users.
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llvm-svn: 85365
2009-10-28 03:36:44 +00:00
1b44f10ff4
Teach MachineLICM to unfold loads from constant memory from
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otherwise unhoistable instructions in order to allow the loads
to be hoisted.
llvm-svn: 85364
2009-10-28 03:21:57 +00:00
4a609f3cef
Use fconsts and fconstd to materialize small fp constants.
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llvm-svn: 85362
2009-10-28 01:44:26 +00:00
83896a59e1
Add a second ValueType argument to isFPImmLegal.
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llvm-svn: 85361
2009-10-28 01:43:28 +00:00
4b46cbfc23
Mark dead physregdefs dead immediately. This helps MachineSink and
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MachineLICM and other things which run before LiveVariables is run.
llvm-svn: 85360
2009-10-28 01:13:53 +00:00
75d6a4afd2
Allow constants of different types to share constant pool entries
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if they have compatible encodings.
llvm-svn: 85359
2009-10-28 01:12:16 +00:00
deab9dee12
Remove getIEEEFloatParts and getIEEEDoubleParts. They are not needed.
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llvm-svn: 85358
2009-10-28 01:08:17 +00:00
9c6bc1f563
Update SystemZ to use PSW following the way x86 uses EFLAGS. Besides
...
eliminating a use of MVT::Flag, this is needed for an upcoming CodeGen
change.
This unfortunately requires SystemZ to switch to the list-burr
scheduler, in order to handle the physreg defs properly, however
that's what LLVM has available at this time.
llvm-svn: 85357
2009-10-28 00:55:57 +00:00
e4b80c9bee
Add an indirect branch pattern for ARM. Testcase will be coming soon.
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llvm-svn: 85355
2009-10-28 00:37:03 +00:00
7e30b39c67
Fix the ModuleDeletion test on PPC and ARM.
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llvm-svn: 85352
2009-10-28 00:28:31 +00:00
d04cb6d0fa
rename indbr -> indirectbr to appease the residents of #llvm.
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llvm-svn: 85351
2009-10-28 00:19:10 +00:00
31b132c0b7
IR support for the new BlockAddress constant kind. This is
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untested and there is no way to use it, next up: doing battle
with asmparser.
llvm-svn: 85349
2009-10-28 00:01:44 +00:00
9693f9d465
Record CodeGen optimization level in the BranchFolding pass so that we can
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use it to control tail merging when there is a tradeoff between performance
and code size. When there is only 1 instruction in the common tail, we have
been merging. That can be good for code size but is a definite loss for
performance. Now we will avoid tail merging in that case when the
optimization level is "Aggressive", i.e., "-O3". Radar 7338114.
Since the IfConversion pass invokes BranchFolding, it too needs to know
the optimization level. Note that I removed the RegisterPass instantiation
for IfConversion because it required a default constructor. If someone
wants to keep that for some reason, we can add a default constructor with
a hard-wired optimization level.
llvm-svn: 85346
2009-10-27 23:49:38 +00:00
f6ee7bea88
Rename lib/VMCore/ConstantsContext.h:ValueMap<> to ConstantUniqueMap<> to avoid
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colliding with llvm/ADT/ValueMap.h:ValueMap<>.
llvm-svn: 85344
2009-10-27 23:45:55 +00:00
2e5198ff09
Add new note.
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llvm-svn: 85341
2009-10-27 23:30:07 +00:00
cd3939ef0e
Fixed a bug in the coalescer where intervals were occasionally merged despite a real interference. This fixes rdar://problem/7157961.
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llvm-svn: 85338
2009-10-27 23:16:58 +00:00
5607d2cb54
Enable virtual register based frame index scavenging by default for ARM & T2.
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llvm-svn: 85335
2009-10-27 22:52:29 +00:00
fd2730ee8c
Move and clarify note.
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llvm-svn: 85334
2009-10-27 22:48:31 +00:00
c1403a0024
Infrastructure for dynamic stack realignment on ARM. For now, this is off by
...
default behind a command line option. This will enable better performance for
vectors on NEON enabled processors.
llvm-svn: 85333
2009-10-27 22:45:39 +00:00
Victor Hernandez