Commit Graph

247813 Commits

Author SHA1 Message Date
Rui Ueyama f94efdddc0 Add a flag to InputSectionBase for linker script.
Previously, we set (uintptr_t)-1 to InputSectionBase::OutSec to record
that a section has already been set to be assigned to some output section
by linker scripts. Later, we restored nullptr to the pointer to use
the field for the original purpose. That overloading is not very easy to
understand.

This patch adds a bit flag for that purpose, so that we don't need
to piggyback the flag on an unrelated pointer.

llvm-svn: 287508
2016-11-20 23:15:52 +00:00
Dimitar Vlahovski a228c46c2a ELF core: Adding parsing of the floating-point and SSE registers on x86 32/64 bit elf core files
Summary:
The floating-point and SSE registers could be present in the elf-core
file in the note NT_FPREGSET for 64 bit ones, and in the note
NT_PRXFPREG for 32 bit ones.

The entire note is a binary blob matching the layout of the x87 save
area that gets generated by the FXSAVE instruction (see Intel developers
manual for more information).

This CL mainly modifies the RegisterRead function in
RegisterContextPOSIXCore_x86_64 for it to return the correct data both
for GPR and FPR/SSE registers, and return false (meaning "this register
is not available") for other registers.

I added a test to TestElfCore.py that tests reading FPR/SSE registers
both from a 32 and 64 bit elf-core file and I have inluded the source
which I used to generate the core files.

I tried to also add support for the AVX registers, because this info could
also be present in the elf-core file (note NT_X86_XSTATE - that is the result of
the newer XSAVE instruction). Parsing the contents from the file is
easy. The problem is that the ymm registers are split into two halves
and they are in different places in the note. For making this work one
would either make a "hacky" approach, because there won't be
any other way with the current state of the register contexts - they
assume that "this register is of size N and at offset M" and
don't have the notion of discontinuos registers.

Reviewers: labath

Subscribers: emaste, lldb-commits

Differential Revision: https://reviews.llvm.org/D26300

llvm-svn: 287506
2016-11-20 21:24:49 +00:00
Simon Dardis 1dcb911061 [mips] Restrict tail call optimization
The tail call optimization was being used without proper consideration of
ABI requirements for saving and restoring the GP. This patch restricts tail
call optimization to functions within the same translation unit.

Reviewers: vkalintiris

Differential Revision: https://reviews.llvm.org/D24763

llvm-svn: 287505
2016-11-20 21:23:08 +00:00
Simon Pilgrim 0878d46416 [X86][SSE] Add some initial combine tests that could (should?) use PACKSS
llvm-svn: 287504
2016-11-20 21:12:49 +00:00
Craig Topper 85a1f5c20c [AVX-512] Add tests for masked palignr/valignd/valignq shuffles, many of which show failures to fold the masking into the operation.
Many of these problems are because shuffle lowering widens element size and reduces element count when possible. This causes the shuffle to become separated from the select by a bitcast. Future patches will work to improve these cases by rewriting the shuffle back to a narrow element type if we think it can result in folding the mask.

llvm-svn: 287503
2016-11-20 19:50:32 +00:00
Coby Tayree 99a6639047 The 'vpmultishiftqb' instruction was implemented falsely, this patch amend it.
More specifically - (MS dialect) broadcasting variants were implemented falsely.

Differential Revision: https://reviews.llvm.org/D26257

llvm-svn: 287501
2016-11-20 17:19:55 +00:00
Coby Tayree 97e9cf62f4 Some instructions were missing, other implemented falsely. this patch aims at amending those issues. full list:
vcvtps2pd
vcvtudq2pd
vcvtps2qq
vcvttps2qq
vcvtps2uqq
vcvttps2uqq

variants are:

[Dst]XMM(zero-masked/merge-masked/unmasked)
[Src]Mem64

Differential Revision: https://reviews.llvm.org/D26799

llvm-svn: 287500
2016-11-20 17:09:56 +00:00
Simon Pilgrim 5fadce4a3f [X86][AVX512] Combine unary + zero target shuffles to VPERMV3 with a zero vector where possible
llvm-svn: 287497
2016-11-20 16:11:36 +00:00
Simon Pilgrim 5401bae523 [X86][AVX512] Add support for VBMI VPERMV3 target shuffle combines
llvm-svn: 287496
2016-11-20 15:24:38 +00:00
Simon Pilgrim 3f40412e0f [X86][AVX512] Add support for VBMI VPERMV target shuffle combines
llvm-svn: 287495
2016-11-20 15:05:45 +00:00
Simon Pilgrim 9e3f5cc015 [X86][AVX512] Add some initial VBMI target shuffle combine tests
llvm-svn: 287494
2016-11-20 14:45:46 +00:00
Simon Pilgrim c17e1b74b8 [X86][AVX512VL] Removed duplicate operation action
Basic AVX512F already declared uint_to_fp v4i32 as legal

llvm-svn: 287493
2016-11-20 14:19:29 +00:00
Simon Pilgrim 3f10e9953d Strip trailing whitespace
llvm-svn: 287492
2016-11-20 14:05:23 +00:00
Simon Pilgrim 096b6d4f81 [X86][AVX512F] Add support for uint_to_fp v2i32 to v2f64 on AVX512F-only targets
Use 512-bit instructions (we already do something similar for uint_to_fp v4i32 to v4f64)

llvm-svn: 287491
2016-11-20 14:03:23 +00:00
Simon Pilgrim f2fbf43704 Fix comment typos. NFC.
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287490
2016-11-20 13:47:59 +00:00
Simon Pilgrim dae11f7aab Fix spelling mistakes in Tools/Tests comments. NFC.
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287489
2016-11-20 13:31:13 +00:00
Simon Pilgrim 7d18a70dac Fix spelling mistakes in Transforms comments. NFC.
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287488
2016-11-20 13:19:49 +00:00
Simon Pilgrim 7a6b6d5656 Fix spelling mistakes in SelectionDAG comments. NFC.
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287487
2016-11-20 13:14:57 +00:00
Simon Pilgrim fbd2221de5 Fix comment typos. NFC.
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287486
2016-11-20 13:10:51 +00:00
Oren Ben Simhon c0f073b67f [X86] RegCall - Handling long double arguments
The change is part of RegCall calling convention support for LLVM.
Long double (f80) requires special treatment as the first f80 parameter is saved in FP0 (floating point stack).
This review present the change and the corresponding tests.

Differential Revision: https://reviews.llvm.org/D26151

llvm-svn: 287485
2016-11-20 11:06:07 +00:00
Coby Tayree 179ff0e541 [X86][InlineAsm]Test commit.
Fixing a wrong comment on X86AsmParser.cpp::ParseZ: "true" --> "false"

Differential Revision: https://reviews.llvm.org/D26797

llvm-svn: 287484
2016-11-20 09:31:11 +00:00
Ekaterina Romanova bf667b21ac Add doxygen comments to immintrin.h's intrinsics.
The doxygen comments are automatically generated based on Sony's intrinsics docu
ment.

I got an OK from Eric Christopher to commit doxygen comments without prior code
review upstream. This patch was internally reviewed by Charles Li.

llvm-svn: 287483
2016-11-20 08:35:05 +00:00
Serge Pavlov f258ff1fa9 Fix file name resolution in nested response files
If a response file in construct `@file` was specified by relative name,
constructs `@file` nested within it were resolved incorrectly if the
flag RelativeNames in call to ExpandResponseFile was set to true.
This feature is used in configuration files, tests for it are in
respective change (see D24933).

llvm-svn: 287482
2016-11-20 06:25:07 +00:00
Rui Ueyama 9f8cb730eb Use auto for obvious types.
llvm-svn: 287481
2016-11-20 02:43:44 +00:00
Rui Ueyama bd1f0630a8 Do not expose ICF class from the file.
Also this patch uses file-scope functions instead of class member function.

Now that ICF class is not visible from outside, InputSection class
can no longer be "friend" of it. So I removed the friend relation
and just make it expose the features to public.

llvm-svn: 287480
2016-11-20 02:39:59 +00:00
Saleem Abdulrasool b14fc390dc ExceptionDemo: remove some undefined behaviour
The casting based reading of the LSDA could attempt to read unsuitably aligned
data.  Avoid that case by explicitly using a memcpy.  A similar approach is used
in libc++abi to address the same UB.

llvm-svn: 287479
2016-11-20 02:36:38 +00:00
Saleem Abdulrasool c0e4e7d990 ExceptionDemo: prefer headers over redeclarations
Rather than redeclaring the interfaces for exceptions, prefer using the
`unwind.h` header.  This is vended by at least gcc and clang, and can also be
found by an external unwinding library (e.g. libunwind).  Doing this simplifies
the example to the exception handling itself.  Minor tweaks are the result of
_Unwind_Context_t not being defined, which is just a typedef for struct
_Unwind_Context *.  NFC.

llvm-svn: 287478
2016-11-20 02:36:36 +00:00
Alexei Starovoitov e6ddac0def [bpf] add BPF disassembler
add BPF disassembler, so tools like llvm-objdump can be used:
$ llvm-objdump -d -no-show-raw-insn ./sockex1_kern.o

./sockex1_kern.o:	file format ELF64-BPF

Disassembly of section socket1:
bpf_prog1:
       0:	r6 = r1
       8:	r0 = *(u8 *)skb[23]
      10:	*(u32 *)(r10 - 4) = r0
      18:	r1 = *(u32 *)(r6 + 4)
      20:	if r1 != 4 goto 8
      28:	r2 = r10
      30:	r2 += -4

ld_imm64 (the only 16-byte insn) and special ld_abs/ld_ind instructions
had to be treated in a special way. The decoders for the rest of the insns
are automatically generated.

Add tests to cover new functionality.

Signed-off-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 287477
2016-11-20 02:25:00 +00:00
Rui Ueyama e5669cecde Attempt to fix big-endian buildbots.
llvm-svn: 287476
2016-11-20 01:41:28 +00:00
Rui Ueyama 567d9c4b8f Style fix. NFC.
llvm-svn: 287475
2016-11-20 01:15:56 +00:00
Rui Ueyama 218072a989 Fix buildbot.
llvm-svn: 287474
2016-11-20 01:13:22 +00:00
Rui Ueyama fe33661ab0 SHA1: unroll loop in hashBlock.
This code is taken from public domain.
https://github.com/jsonn/src/blob/trunk/common/lib/libc/hash/sha1/sha1.c

I wrote a sha1 command and ran it on my Xeon E5-2680 v2 2.80GHz machine.
Here is a result. The new hash function is 37% faster than before.

 Performance counter stats for './llvm-sha1-old /ssd/build/bin/lld' (10 runs):

       6640.503687 task-clock (msec)         #    1.001 CPUs utilized            ( +-  0.03% )
                54 context-switches          #    0.008 K/sec                    ( +-  5.03% )
                 5 cpu-migrations            #    0.001 K/sec                    ( +- 31.73% )
           183,803 page-faults               #    0.028 M/sec                    ( +-  0.00% )
    18,527,954,113 cycles                    #    2.790 GHz                      ( +-  0.03% )
     4,993,237,485 stalled-cycles-frontend   #   26.95% frontend cycles idle     ( +-  0.11% )
   <not supported> stalled-cycles-backend
    50,217,149,423 instructions              #    2.71  insns per cycle
                                             #    0.10  stalled cycles per insn  ( +-  0.00% )
     6,094,322,337 branches                  #  917.750 M/sec                    ( +-  0.00% )
        11,778,239 branch-misses             #    0.19% of all branches          ( +-  0.01% )

       6.634017401 seconds time elapsed                                          ( +-  0.03% )

 Performance counter stats for './llvm-sha1-new /ssd/build/bin/lld' (10 runs):

       4167.062720 task-clock (msec)         #    1.001 CPUs utilized            ( +-  0.02% )
                52 context-switches          #    0.012 K/sec                    ( +- 16.45% )
                 7 cpu-migrations            #    0.002 K/sec                    ( +- 32.20% )
           183,804 page-faults               #    0.044 M/sec                    ( +-  0.00% )
    11,626,611,958 cycles                    #    2.790 GHz                      ( +-  0.02% )
     4,491,897,976 stalled-cycles-frontend   #   38.63% frontend cycles idle     ( +-  0.05% )
   <not supported> stalled-cycles-backend
    24,320,180,617 instructions              #    2.09  insns per cycle
                                             #    0.18  stalled cycles per insn  ( +-  0.00% )
     1,574,674,576 branches                  #  377.886 M/sec                    ( +-  0.00% )
        11,769,693 branch-misses             #    0.75% of all branches          ( +-  0.00% )

       4.163251552 seconds time elapsed                                          ( +-  0.02% )

Differential Revision: https://reviews.llvm.org/D26890

llvm-svn: 287473
2016-11-20 01:03:22 +00:00
Saleem Abdulrasool a577509f0a Demangle: remove references to allocator for default allocator
The demangler had stopped using a custom allocator but had not been updated to
remove the use of the explicit allocator passing.  This removes that as we do
not need to do anything special here anymore.  This just makes the code more
compact.  NFC.

llvm-svn: 287472
2016-11-20 00:20:27 +00:00
Saleem Abdulrasool 54ec3f9cf8 Demangle: remove unnecessary typedef for std::vector
We could create a local typedef for std::vector called Vector.  Inline the use
of std::vector rather than use the typedef.  NFC.

llvm-svn: 287471
2016-11-20 00:20:25 +00:00
Saleem Abdulrasool be1fd54f85 Demangle: replace custom typedef for std::string with std::string
We created a local typedef for `std::basic_string<char, std::char_traits<char>>`
which is just `std::string`.  Remove the local typedef and propagate the type
information through the rest of the demangler.  NFC.

llvm-svn: 287470
2016-11-20 00:20:23 +00:00
Saleem Abdulrasool 0da9050976 Demangle: use direct member initialization (NFC)
Prefer direct member initialization over the explicit out-of-line initialization
for the construction of the local type.  NFC.

llvm-svn: 287469
2016-11-20 00:20:20 +00:00
Rui Ueyama f7dfb2e250 Remove a file that is too short to be an independent file.
We have a .cpp and a .h for parseDynamicList(). This patch
moves the function to DriverUtil.cpp.

llvm-svn: 287468
2016-11-19 23:26:41 +00:00
Rui Ueyama 8f47556796 Remove unused #include.
llvm-svn: 287467
2016-11-19 23:18:43 +00:00
Rui Ueyama e2dfbc17c8 Refactor ICF.
In order to use forEachGroup in the final loop in ICF::run,
I changed some function parameter types.

llvm-svn: 287466
2016-11-19 23:14:23 +00:00
Martin Storsjo 8c59680ac2 builtins: Allow building windows arm functions for mingw
When building with clang/LLVM in MSVC mode, the msvcrt libraries contain
these functions.

When building in a mingw environment, we need to provide them somehow,
e.g. via compiler-rt.

The aeabi divmod functions work in the same way as the corresponding
__rt_*div* functions for windows, but their parameters are swapped.
The functions for converting float to integer and vice versa are the
same as their aeabi equivalents, only with different function names.

Differential Revision: https://reviews.llvm.org/D26183

llvm-svn: 287465
2016-11-19 21:22:38 +00:00
Renato Golin 2b9d742ae7 [ARM|ASAN] Disabling more unstable ASAN tests
We're seeying these errors with GCC and Clang on different systems, while
some other identical OSs on different boards fail. Like many other ASAN
tests, there seem to be no easy way to investigate this other than someone
familiar with the sanitizer code and the ARM libraries.

At least, for now, we'll silence the bots. I'll create a bugzilla entry.

llvm-svn: 287464
2016-11-19 21:19:19 +00:00
Chris Bieneman c6c0f583a2 [CMake] Fixing clang standalone build
I broke this in r287406 and r287407.

llvm-svn: 287463
2016-11-19 21:14:59 +00:00
Benjamin Kramer ffd3715d16 Give some helper classes/functions internal linkage. NFC.
llvm-svn: 287462
2016-11-19 20:44:26 +00:00
Simon Pilgrim a14e0cb852 [X86][SSE] Improve PSHUFB lowering from either input
Canonicalization may leave the zeroable vector in the first input.

llvm-svn: 287461
2016-11-19 20:41:48 +00:00
Rui Ueyama a05134e837 Use std::equal instead of hand-written loops.
llvm-svn: 287460
2016-11-19 20:15:55 +00:00
Simon Pilgrim 623a7c57b5 [X86][AVX512] Add VPERMV/VPERMV3 v64i8 byte shuffles on avx512vbmi targets
llvm-svn: 287459
2016-11-19 20:12:34 +00:00
John McCall 18081afc1d Remove alignment from ctors/dtors lists in an attempt to placate LTO.
llvm-svn: 287458
2016-11-19 20:12:25 +00:00
Rui Ueyama 1cb63183af Restore a comment that was accidentally changed.
llvm-svn: 287457
2016-11-19 19:26:52 +00:00
Rui Ueyama 061f9286df Use Optional<std::string> instead of "" to represent a failure.
llvm-svn: 287456
2016-11-19 19:23:58 +00:00
Rui Ueyama ec75220fe9 Make buildSysrootedPath file-scoped.
This patch also changes its return type to simplify callers.

llvm-svn: 287455
2016-11-19 19:23:56 +00:00