Commit Graph

5109 Commits

Author SHA1 Message Date
George Mitenkov be15284ef6 [MLIR][StdToSPIRV] Fixed a typo in ops conversion tests
Fixed a typo in `std-ops-to-spitv.mlir` test.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D83791
2020-07-14 21:46:07 +03:00
Uday Bondhugula 9b974dfa72 [MLIR] [NFC] Buffer placement pass - clang tidy warnings
Add missing const - addresses clang tidy warnings.

Differential Revision: https://reviews.llvm.org/D83794
2020-07-14 23:49:24 +05:30
Rahul Joshi e2b716105b [MLIR] Add argument related API to Region
- Arguments of the first block of a region are considered region arguments.
- Add API on Region class to deal with these arguments directly instead of
  using the front() block.
- Changed several instances of existing code that can use this API
- Fixes https://bugs.llvm.org/show_bug.cgi?id=46535

Differential Revision: https://reviews.llvm.org/D83599
2020-07-14 09:28:29 -07:00
Rahul Joshi 256d44811e [MLIR] [TableGen] Avoid generating an assert which is always true.
- Avoid generating "assert(resultTypes.size() >= 0u)" which is always true

Differential Revision: https://reviews.llvm.org/D83735
2020-07-14 09:19:52 -07:00
Jacques Pienaar 3ae43a580e [ods] Enable getting forward decls allow
Summary: Currently forward decls are included with all the op classes. But there are cases (say when splitting up headers) where one wants the forward decls but not all the classes. Add an option to enable this. This does not change any current behavior (some further refactoring is probably due here).

Differential Revision: https://reviews.llvm.org/D83727
2020-07-14 06:52:32 -07:00
Frederik Gossen 1ee0d22f26 [MLIR][Standard] Erase redundant assertions `std.assert`
Differential Revision: https://reviews.llvm.org/D83118
2020-07-14 10:09:39 +00:00
Frederik Gossen bcedc4fa0a [MLIR][Standard] Add `assert` operation to the standard dialect
Differential Revision: https://reviews.llvm.org/D83117
2020-07-14 10:00:54 +00:00
Kiran Chandramohan d9067dca7b Lowering of OpenMP Parallel operation to LLVM IR 1/n
This patch introduces lowering of the OpenMP parallel operation to LLVM
IR using the OpenMPIRBuilder.

Functions topologicalSort and connectPhiNodes are generalised so that
they work with operations also. connectPhiNodes is also made static.

Lowering works for a parallel region with multiple blocks. Clauses and
arguments of the OpenMP operation are not handled.

Reviewed By: rriddle, anchu-rajendran

Differential Revision: https://reviews.llvm.org/D81660
2020-07-13 23:55:45 +01:00
Nicolas Vasilache affbc0cd1c [mlir] Add alignment attribute to LLVM memory ops and use in vector.transfer
Summary: The native alignment may generally not be used when lowering a vector.transfer to the underlying load/store operation. This revision fixes the unmasked load/store alignment to match that of the masked path.

Differential Revision: https://reviews.llvm.org/D83684
2020-07-13 17:35:20 -04:00
Rahul Joshi 0d988da6d1 [MLIR] Change ODS collective params build method to provide an empty default value for named attributes
- Provide default value for `ArrayRef<NamedAttribute> attributes` parameter of
  the collective params build method.
- Change the `genSeparateArgParamBuilder` function to not generate build methods
  that may be ambiguous with the new collective params build method.
- This change should help eliminate passing empty NamedAttribue ArrayRef when the
  collective params build method is used
- Extend op-decl.td unit test to make sure the ambiguous build methods are not
  generated.

Differential Revision: https://reviews.llvm.org/D83517
2020-07-13 13:35:44 -07:00
Thomas Raoux 2f23270af9 [mlir] Support operations with multiple results in slicing
Right now slicing would assert if an operation with multiple results is in the
slice.

Differential Revision: https://reviews.llvm.org/D83627
2020-07-13 13:24:27 -07:00
Lei Zhang 4ba45a778a [mlir][StandardToSPIRV] Fix conversion for signed remainder
Per the Vulkan's SPIR-V environment spec, "for the OpSRem and OpSMod
instructions, if either operand is negative the result is undefined."
So we cannot directly use spv.SRem/spv.SMod if either operand can be
negative. Emulate it via spv.UMod.

Because the emulation uses spv.SNegate, this commit also defines
spv.SNegate.

Differential Revision: https://reviews.llvm.org/D83679
2020-07-13 16:15:31 -04:00
Benjamin Kramer 3bffe6022c [mlir][VectorOps] Lower vector.fma to llvm.fmuladd instead of llvm.fma
Summary:
These are semantically equivalent, but fmuladd allows decaying the op
into fmul+fadd if there is no fma instruction available. llvm.fma lowers
to scalar calls to libm fmaf, which is a lot slower.

Reviewers: nicolasvasilache, aartbik, ftynse

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D83666
2020-07-13 12:26:03 +02:00
Frederik Gossen 9df6afbb5c [MLIR][Shape] Lower `shape.any`
Lower `shape.any` to its first operand.

Differential Revision: https://reviews.llvm.org/D83123
2020-07-13 08:30:05 +00:00
River Riddle 572c2905ae [mlir][ODS] Add support for specifying the namespace of an interface.
The namespace can be specified using the `cppNamespace` field. This matches the functionality already present on dialects, enums, etc. This fixes problems with using interfaces on operations in a different namespace than the interface was defined in.

Differential Revision: https://reviews.llvm.org/D83604
2020-07-12 14:18:32 -07:00
Rahul Joshi 032810f589 [NFC] Fix comment style in MLIR unittests to conform to LLVM coding standards.
Differential Revision: https://reviews.llvm.org/D83632
2020-07-12 07:27:02 -07:00
Mehdi Amini 44b0b7cf66 Fix one memory leak in the MLIRParser by using std::unique_ptr to hold the new block pointer
This is NFC when there is no parsing error.

Differential Revision: https://reviews.llvm.org/D83619
2020-07-11 20:05:37 +00:00
Mehdi Amini 3b04af4d84 Fix some memory leak in MLIRContext with respect to registered types/attributes interfaces
Differential Revision: https://reviews.llvm.org/D83618
2020-07-11 20:05:29 +00:00
Yash Jain 102828249c [MLIR] Parallelize affine.for op to 1-D affine.parallel op
Introduce pass to convert parallel affine.for op into 1-D affine.parallel op.
Run using --affine-parallelize. Removes test-detect-parallel: pass for checking
parallel affine.for ops.

Signed-off-by: Yash Jain <yash.jain@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D83193
2020-07-11 21:33:25 +05:30
Mauricio Sifontes 16e9ccb2be Create TestReducer pass
- Create a pass that generates bugs based on trivially defined behavior for the purpose of testing the MLIR Reduce Tool.
- Implement the functionality inside the pass to crash mlir-opt in the presence of an operation with the name "crashOp".
- Register the pass as a test pass in the mlir-opt tool.

Reviewed by: jpienaar

Differential Revision: https://reviews.llvm.org/D83422
2020-07-11 00:46:57 +00:00
Thomas Raoux 6d5aeb0dce [mlir][linalg] Improve aliasing approximation for hoisting transfer read/write
Improve the logic deciding if it is safe to hoist vector transfer read/write
out of the loop. Change the logic to prevent hoisting operations if there are
any unknown access to the memref in the loop no matter where the operation is.
For other transfer read/write in the loop check if we can prove that they
access disjoint memory and ignore them in this case.

Differential Revision: https://reviews.llvm.org/D83538
2020-07-10 14:55:04 -07:00
Nicolas Vasilache ec2f2cec76 [mlir][Vector] Add folding for vector.transfer ops
This revision folds vector.transfer operations by updating the `masked` bool array attribute when more unmasked dimensions can be discovered.

Differential revision: https://reviews.llvm.org/D83586
2020-07-10 16:49:12 -04:00
aartbik 365434a584 [mlir] [VectorOps] Merge OUTER/AXPY vector.contract lowering into single case
We temporarily had separate OUTER lowering (for matmat flavors) and
AXPY lowering (for matvec flavors). With the new generalized
"vector.outerproduct" semantics, these cases can be merged into
a single lowering method. This refactoring will simplify future
decisions on cost models and lowering heuristics.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D83585
2020-07-10 13:11:54 -07:00
aartbik 9bf6354301 [mlir] [VectorOps] Allow AXPY to be expressed as special case of OUTERPRODUCT
This specialization allows sharing more code where an AXPY follows naturally
in cases where an OUTERPRODUCT on a scalar would be generated.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D83453
2020-07-10 12:23:24 -07:00
Nicolas Vasilache a490d387e6 [mlir][Vector] Add ExtractOp folding when fed by a TransposeOp
TransposeOp are often followed by ExtractOp.
In certain cases however, it is unnecessary (and even detrimental) to lower a TransposeOp to either a flat transpose (llvm.matrix intrinsics) or to unrolled scalar insert / extract chains.

Providing foldings of ExtractOp mitigates some of the unnecessary complexity.

Differential revision: https://reviews.llvm.org/D83487
2020-07-10 11:09:27 -04:00
Nicolas Vasilache 56c638b5c1 [mlir][Linalg] Generalize Vectorization of Linalg contractions
This revision adds support for vectorizing named and generic contraction ops to vector.contract. Cases in which the memref is 0-D are special cased to emit std.load/std.store instead of vector.transfer. Relevant tests are added.

Differential revision: https://reviews.llvm.org/D83307
2020-07-10 10:28:34 -04:00
Nicolas Vasilache 22c8a08fd8 [mlir][Vector] Fold chains of ExtractOp
This revision adds folding to ExtractOp by simply concatenating the position attributes.
2020-07-10 09:32:02 -04:00
George Mitenkov eb6b7c5d4f [MLIR][SPIRVToLLVM] Conversion of SPIR-V struct type without offset
This patch introduces type conversion for SPIR-V structs. Since
handling offset case requires thorough testing, it was left out
for now. Hence, only structs with no offset are currently
supported. Also, structs containing member decorations cannot
be translated.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D83403
2020-07-10 10:15:45 +03:00
Stella Laurenzo c20c1960c1 Add Python bindings guide.
Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D83527
2020-07-09 20:49:39 -07:00
ergawy 3847a6ae75 [MLIR][SPIRV] Support two memory access attributes in OpCopyMemory.
This commit augments spv.CopyMemory's implementation to support 2 memory
access operands. Hence, more closely following the spec. The following
changes are introduces:

- Customize logic for spv.CopyMemory serialization and deserialization.
- Add 2 additional attributes for source memory access operand.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D83241
2020-07-09 20:23:35 -04:00
Stella Laurenzo 722475a375 Initial boiler-plate for python bindings.
Summary:
* Native '_mlir' extension module.
* Python mlir/__init__.py trampoline module.
* Lit test that checks a message.
* Uses some cmake configurations that have worked for me in the past but likely needs further elaboration.

Subscribers: mgorny, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D83279
2020-07-09 12:03:58 -07:00
Jeremy Bruestle 2ede891875 [MLIR] IR changes to add yield semantics for affine.if and affine.parallel
Reviewed By: bondhugula, flaub

Differential Revision: https://reviews.llvm.org/D82600
2020-07-09 12:12:42 -07:00
George Mitenkov 28cd3cbc12 [MLIR][SPIRVToLLVM] Conversion of SPIR-V array, runtime array, and pointer types
This patch adds type conversion for 4 SPIR-V types: array, runtime array, pointer
and struct. This conversion is integrated using a separate function
`populateSPIRVToLLVMTypeConversion()` that adds new type conversions. At the moment,
this is a basic skeleton that allows to perfom conversion from SPIR-V array,
runtime array and pointer types to LLVM typesystem. There is no support of array
strides or storage classes. These will be supported on the case by case basis.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D83399
2020-07-09 18:11:45 +03:00
George Mitenkov 5d075beae7 [MLIR][SPIRVToLLVM] SPIR-V types size in bytes function
Added `getSizeInBytes()` function as a class member to several SPIR-V types:
`ScalarType`, `ArrayType` and `VectorType`. This function aims at exposing
the functionality of `getTypeNumBytes()` from `SPIRVLowering.cpp`. Support
of more types will be added on demand.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D83285
2020-07-09 17:43:48 +03:00
Benjamin Kramer b44470547e Make helpers static. NFC. 2020-07-09 13:48:56 +02:00
Tres Popp 2ef71cb7fd [mlir] Add additional Canonicalization of shape.cstr_broadcastable.
Summary:
Added canonicalization and folding was:
- Folding when either input is an attribute indicating a scalar input
which can always be broadcasted.
- Canonicalization where it can be determined that either input shape is
a scalar.
- Canonicalization where the partially specified input shapes can be
proven to be broadcastable always.

Differential Revision: https://reviews.llvm.org/D83194
2020-07-09 11:23:25 +02:00
Stella Laurenzo abd6574b45 Add missing CMake bool canonicalizations.
Summary:
* This allows these flags to be passed on the command line with normal CMake bool-interpreted values like ON/OFF instead of requiring 0/1.
* As-is, if passing ON/OFF, these will cause a parse error in lit.site.cfg.py because Python tries to interpret the string literally.

Reviewers: stephenneuendorffer

Subscribers: mgorny, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D83451
2020-07-08 17:56:48 -07:00
River Riddle 24aa4efffd [mlir] Print 0 element DenseElementsAttr as dense<> to fix parser bugs with expected shape.
Depending on where the 0 dimension is within the shape, the parser will currently reject .mlir generated by the printer.

Differential Revision: https://reviews.llvm.org/D83445
2020-07-08 18:44:23 -07:00
aartbik 1bfdf7c7e3 [mlir] [VectorOps] Expose lowering pass options programmatically
The ConvertVectorToLLVM pass defines options that can be passed
on the command line (currently only reassociation of FP reductions
through -convert-vector-to-llvm='reassociate-fp-reductions). This
CL enables setting these options programmatically (forward looking
to more options than just reassociation, as well as setting the
values from code rather than command line).

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D83420
2020-07-08 14:58:07 -07:00
Nicolai Hähnle 3fa989d4fd DomTree: remove explicit use of DomTreeNodeBase::iterator
Summary:
Almost all uses of these iterators, including implicit ones, really
only need the const variant (as it should be). The only exception is
in NewGVN, which changes the order of dominator tree child nodes.

Change-Id: I4b5bd71e32d71b0c67b03d4927d93fe9413726d4

Reviewers: arsenm, RKSimon, mehdi_amini, courbet, rriddle, aartbik

Subscribers: wdng, Prazek, hiraditya, kuhar, rogfer01, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, vkmr, Kayjukh, jurahul, msifontes, cfe-commits, llvm-commits

Tags: #clang, #mlir, #llvm

Differential Revision: https://reviews.llvm.org/D83087
2020-07-08 18:18:49 +02:00
Alexander Belyaev 1ea289681a [mlir] Add ViewLikeOpInterface to std.memref_cast.
Summery:  It's needed for correct work of BufferPlacement.

Differential Revision: https://reviews.llvm.org/D83385
2020-07-08 14:32:23 +02:00
George Mitenkov 7a4e39b326 [MLIR][SPIRVToLLVM] Implementation of spv.BitFieldSExtract and spv.BitFieldUExtract patterns
This patch adds conversion patterns for `spv.BitFieldSExtract` and `spv.BitFieldUExtract`.
As in the patch for `spv.BitFieldInsert`, `offset` and `count` have to be broadcasted in
vector case and casted to match the type of the base.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82640
2020-07-08 12:37:37 +03:00
George Mitenkov 00580349c3 [MLIR][SPIRVToLLVM] Miscellaneous ops conversion: select, fmul and undef
This patch introduces 3 new direct conversions for SPIR-V ops:
- `spv.Select`
- `spv.Undef`
- `spv.FMul` that was skipped in the patch with arithmetic ops

Differential Revision: https://reviews.llvm.org/D83291
2020-07-08 11:06:04 +03:00
Mehdi Amini f54d0e36be Rename `xla_lhlo.terminator` into `return` in SCF parallel loop test (NFC)
It seems that these were inserted here inadvertently instead of using
standard `return`.
2020-07-08 04:05:43 +00:00
HazemAbdelhafez 34c4852015 [mlir][spirv] Add MatrixTimesMatrix operation
Add MatrixTimesMatrix operation to SPIRV Dialect and add NoSideEffect trait
to Matrix ops.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82671
2020-07-07 21:32:50 -04:00
Rahul Joshi 74145d5841 [MLIR] Combine the 2 overloads of FuncOp::build() into one.
- This will eliminate the need to pass an empty `ArrayRef<NamedAttribute>{}` when
  no named attributes are required on the function.

Differential Revision: https://reviews.llvm.org/D83356
2020-07-07 18:22:22 -07:00
Mauricio Sifontes ec04ce4623 Create the MLIR Reduce framework
Create the framework and testing environment for MLIR Reduce - a tool
with the objective to reduce large test cases into smaller ones while
preserving their interesting behavior.

Implement the functionality to parse command line arguments, parse the
MLIR test cases into modules and run the interestingness tests on
the modules.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D82803
2020-07-07 23:42:53 +00:00
Nicolas Vasilache 24ed3a9403 [mlir][Vector] Add ExtractOp folding
This revision adds foldings for ExtractOp operations that come from previous InsertOp.
InsertOp have cumulative semantic where multiple chained inserts are necessary to produce the final value from which the extracts are obtained.
Additionally, TransposeOp may be interleaved and need to be tracked in order to follow the producer consumer relationships and properly compute positions.

Differential revision: https://reviews.llvm.org/D83150
2020-07-07 16:48:49 -04:00
aartbik 6404fb428a [mlir] [VectorOps] [integration-test] Add i64 typed outer product
Yields proper SIMD vpmullq/vpaddq on x86.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D83328
2020-07-07 12:34:41 -07:00
Alexander Belyaev 1a2ed71a8a [mlir] Support unranked types in func signature conversion in BufferPlacement.
Currently, only ranked tensor args and results can be converted to memref types.

Differential Revision: https://reviews.llvm.org/D83324
2020-07-07 19:43:48 +02:00
Sean Silva a084b94f11 [mlir] Convert function signatures before converting globals
Summary: This allows global initializers to reference functions.

Differential Revision: https://reviews.llvm.org/D83266
2020-07-07 10:40:02 -07:00
Mehdi Amini e10e034f4b Revert "Create the framework and testing environment for MLIR Reduce - a tool"
This reverts commit 28a45d54a7.

Windows bot is broken with:

LLVM ERROR: Error running interestingness test: posix_spawn failed: Permission denied
2020-07-07 15:47:09 +00:00
Benjamin Kramer cca4ac523e [mlir][VectorOps] Lower vector.outerproduct of int vectors
vector.fma and mulf don't work on integers. Use a muli/addi pair or
plain muli instead.

Differential Revision: https://reviews.llvm.org/D83292
2020-07-07 14:40:07 +02:00
Lei Zhang b80508703f [mlir][spirv] Introduce OwningSPIRVModuleRef for ownership
Similar to OwningModuleRef, OwningSPIRVModuleRef signals ownership
transfer clearly. This is useful for APIs like spirv::deserialize,
where a spirv::ModuleOp is returned by deserializing SPIR-V binary
module.

This addresses the ASAN error as reported in
https://bugs.llvm.org/show_bug.cgi?id=46272

Differential Revision: https://reviews.llvm.org/D81652
2020-07-07 08:29:27 -04:00
River Riddle 9db53a1827 [mlir][NFC] Remove usernames and google bug numbers from TODO comments.
These were largely leftover from when MLIR was a google project, and don't really follow LLVM guidelines.
2020-07-07 01:40:52 -07:00
Martin Waitz 72df59d590 [mlir] resolve types from attributes in assemblyFormat
An operation can specify that an operation or result type matches the
type of another operation, result, or attribute via the `AllTypesMatch`
or `TypesMatchWith` constraints.

Use these constraints to also automatically resolve types in the
automatically generated assembly parser.
This way, only the attribute needs to be listed in `assemblyFormat`,
e.g. for constant operations.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D78434
2020-07-07 04:40:01 +00:00
Mauricio Sifontes 28a45d54a7 Create the framework and testing environment for MLIR Reduce - a tool
with the objective to reduce large test cases into smaller ones while
preserving their interesting behavior.

Implement the framework to parse the command line arguments, parse the
input MLIR test case into a module and call reduction passes on the MLIR module.

Implement the Tester class which allows the different reduction passes to test the
interesting behavior of the generated reduced variants of the test case and keep track
of the most reduced generated variant.
2020-07-07 01:59:11 +00:00
Jacques Pienaar 2a19672af5 [mlir] Change ODS to have include and exclude regex
This makes it easier to have a "remainder" include rule. And also makes it easier to read the command line flag.
2020-07-06 09:55:10 -07:00
Rahul Joshi 52af9c59e3 [MLIR] Add a NoRegionArguments trait
- This trait will verify that all regions attached to an Op have no arguments
- Fixes https://bugs.llvm.org/show_bug.cgi?id=46521 : Add trait NoRegionArguments

Differential Revision: https://reviews.llvm.org/D83016
2020-07-06 09:05:38 -07:00
Nicolas Vasilache bd87c6bce1 [mlir][Vector] Add custom slt / SCF.if folding to VectorToSCF
scf.if currently lacks folding on true / false conditionals.
Such foldings are a bit more involved than can be addressed immediately.
This revision introduces an eager folding  for lowering vector.transfer operations in the presence of unrolling.

Differential revision: https://reviews.llvm.org/D83146
2020-07-06 08:21:21 -04:00
Nicolas Vasilache 05c65dc0fe [mlir][Vector] Add a VectorUnrollInterface and expose UnrollVectorPattern.
The UnrollVectorPattern is can be used in a programmable fashion by:
```
OwningRewritePatternList patterns;
    patterns.insert<UnrollVectorPattern<AddFOp>>(ArrayRef<int64_t>{2, 2}, ctx);
    patterns.insert<UnrollVectorPattern<vector::ContractionOp>>(
        ArrayRef<int64_t>{2, 2, 2}, ctx);
    ...
    applyPatternsAndFoldGreedily(getFunction(), patterns);
```

Differential revision: https://reviews.llvm.org/D83064
2020-07-06 08:09:06 -04:00
Mehdi Amini fbc06b2280 Revert "[MLIR] Parallelize affine.for op to 1-D affine.parallel op"
This reverts commit 5f2843857f.
This broke the build when -DDBUILD_SHARED_LIBS=ON is used.
2020-07-04 20:55:47 +00:00
Yash Jain 5f2843857f [MLIR] Parallelize affine.for op to 1-D affine.parallel op
Introduce pass to convert parallel affine.for op into 1-D
affine.parallel op. Run using --affine-parallelize. Removes
test-detect-parallel: pass for checking parallel affine.for ops.

Differential Revision: https://reviews.llvm.org/D82672
2020-07-04 19:09:23 +05:30
Uday Bondhugula 6d6d5db251 [MLIR][Linalg] Generate the right type of load/store when lowering max/min pooling ops
While lowering min/max pooling ops to loops, generate the right kind of
load/stores (std or affine) instead of always generating std
load/stores.

Differential Revision: https://reviews.llvm.org/D83080
2020-07-04 14:55:02 +05:30
Julian Gross 91c320e9d8 [mlir] Add check for ViewLikeOpInterface that creates additional aliases.
ViewLikeOpInterfaces introduce new aliases that need to be added to the alias
list. This is necessary to place deallocs in the right positions.

Differential Revision: https://reviews.llvm.org/D83044
2020-07-03 16:38:21 +02:00
Ehsan Toosi 0f03b2bfda [mlir] Add redundant copy removal transform
This pass removes redundant dialect-independent Copy operations in different
situations like the following:

%from = ...
%to = ...
... (no user/alias for %to)
copy(%from, %to)
... (no user/alias for %from)
dealloc %from
use(%to)

Differential Revision: https://reviews.llvm.org/D82757
2020-07-03 15:36:25 +02:00
aartbik ee01c7a740 [mlir] [VectorOps] Add choice between dot and axpy lowering of vector.contract
Default vector.contract lowering essentially yields a series of sdot/ddot
operations. However, for some layouts a series of saxpy/daxpy operations,
chained through fma are more efficient. This CL introduces a choice between
the two lowering paths. A default heuristic is to follow.

Some preliminary avx2 performance numbers for matrix-times-vector.
Here, dot performs best for 64x64 A x b and saxpy for 64x64 A^T x b.

```
------------------------------------------------------------
            A x b                          A^T x b
------------------------------------------------------------
GFLOPS    sdot (reassoc)    saxpy    sdot (reassoc)    saxpy
------------------------------------------------------------
1x1        0.6               0.9       0.6             0.9
2x2        2.5               3.2       2.4             3.5
4x4        6.4               8.4       4.9             11.8
8x8       11.7               6.1       5.0             29.6
16x16     20.7              10.8       7.3             43.3
32x32     29.3               7.9       6.4             51.8
64x64     38.9                                         79.3
128x128   32.4                                         40.7
------------------------------------------------------------
```

Reviewed By: nicolasvasilache, ftynse

Differential Revision: https://reviews.llvm.org/D83012
2020-07-02 13:21:17 -07:00
Lei Zhang 08679af900 Revert "[MLIR][SPIRV] Support two memory access attributes in OpCopyMemory."
This reverts commit ef2f46e1f6, which
likely triggers a compiler internal error for MSVC.

Differential Revision: https://reviews.llvm.org/D83075
2020-07-02 15:57:25 -04:00
George Mitenkov 1cfaaf6455 [MLIR][SPIRVToLLVM] Convert spv.constant scalars and vectors
This patch introduces conversion pattern for `spv.constant` with scalar
and vector types. There is a special case when the constant value is a
signed/unsigned integer (vector of integers). Since LLVM dialect does not
have signedness semantics, the types had to be converted to signless ints.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82936
2020-07-02 14:26:58 -04:00
ergawy ef2f46e1f6 [MLIR][SPIRV] Support two memory access attributes in OpCopyMemory.
This commit augments spv.CopyMemory's implementation to support 2 memory
access operands. Hence, more closely following the spec. The following
changes are introduces:

- Customize logic for spv.CopyMemory serialization and deserialization.
- Add 2 additional attributes for source memory access operand.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82710
2020-07-02 13:17:22 -04:00
George Mitenkov 8119a374bc [MLIR][SPIRVToLLVM] SPIR-V function call conversion pattern
Added conversion pattern for SPIR-V `FunctionCallOp`. Based on
specification, it returns no results or a single result, so
can be mapped directly to LLVM dialect's `llvm.call`.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D83030
2020-07-02 12:38:27 -04:00
George Mitenkov 03fe7eb16f [MLIR][SPIRVToLLVM] Implementation of spv.BitFieldInsert pattern
This patch introduces conversion pattern for `spv.BitFiledInsert` op,
as well as some utility functions to facilitate code reading.
Since `spv.BitFiledInsert` may take both vector and integer operands,
this case was specifically handled by broadcasting values (`count`
and `offset` here) to vectors. Moreover, the types had to be converted
to same bitwidth in order to conform with LLVM dialect rules.
This was done with `zext` when extending (Note that `count` and
`offset` are treated as unsigned) and `trunc` in the opposite case.
For the latter one, truncation is safe since the op is defined only when
`count`/`offset`/their sum is less than the bitwidth of the result.
This introduces a natural bound of the value of 64, which can be
expressed as `i8`.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D82639
2020-07-02 12:19:12 -04:00
Arjun P 10a898b3ec [MLIR] Exact integer emptiness checks for FlatAffineConstraints
This patch adds the capability to perform exact integer emptiness checks for FlatAffineConstraints using the General Basis Reduction algorithm (GBR). Previously, only a heuristic was available for emptiness checks, which was not guaranteed to always give a conclusive result.

This patch adds a `Simplex` class, which can be constructed using a `FlatAffineConstraints`, and can find an integer sample point (if one exists) using the GBR algorithm. Additionally, it adds two classes `Matrix` and `Fraction`, which are used by `Simplex`.

The integer emptiness check functionality can be accessed through the new `FlatAffineConstraints::isIntegerEmpty()` function, which runs the existing heuristic first and, if that proves to be inconclusive, runs the GBR algorithm to produce a conclusive result.

Differential Revision: https://reviews.llvm.org/D80860
2020-07-02 19:53:27 +05:30
River Riddle c59aec0ca1 [mlir][OpFormatGen] Add support for resolving variadic types from non-variadic
This enables better support for traits such as SameOperandsAndResultType, and other situations in which a variadic operand may be resolved from a non-variadic.

Differential Revision: https://reviews.llvm.org/D83011
2020-07-01 22:27:08 -07:00
Thomas Raoux 0670f855a7 [mlir][spirv] Add support for lowering scf.for scf/if with return value
This allow lowering to support scf.for and scf.if with results. As right now
spv region operations don't have return value the results are demoted to
Function memory. We create one allocation per result right before the region
and store the yield values in it. Then we can load back the value from
allocation to be able to use the results.

Differential Revision: https://reviews.llvm.org/D82246
2020-07-01 17:08:08 -07:00
Thomas Raoux fbce9855e9 [mlir][NFC] Move conversion of scf to spir-v ops in their own file
Move patterns for scf to spir-v ops in their own file/folder.

Differential Revision: https://reviews.llvm.org/D82914
2020-07-01 17:06:50 -07:00
Nicolas Vasilache 7d9518c800 [mlir][Linalg] Add an option to use Alloca instead of malloc/free pairs.
Summary: A relevant test is also added.

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82959
2020-07-01 09:44:01 -04:00
River Riddle f625f5231a [mlir] Remove the default template parameters from AttrBase and TypeBase.
MSVC 2017 doesn't support the case where a trailing variadic template list comes after template types with default parameters. Until we upgrade to VS 2019, we can't use the simplified definitions.
2020-06-30 21:55:32 -07:00
River Riddle 5d699d18b3 [mlir] Remove locking for dialect/operation registration.
Moving forward dialects should only be registered in a thread safe context. This matches the existing usage we have today, but it allows for removing quite a bit of expensive locking from the context.

This led to ~.5 a second compile time improvement when running one conversion pass on a very large .mlir file(hundreds of thousands of operations).

Differential Revision: https://reviews.llvm.org/D82595
2020-06-30 15:52:33 -07:00
River Riddle 2e2cdd0a52 [mlir] Refactor InterfaceGen to support generating interfaces for Attributes and Types.
This revision adds support to ODS for generating interfaces for attributes and types, in addition to operations. These interfaces can be specified using `AttrInterface` and `TypeInterface` in place of `OpInterface`. All of the features of `OpInterface` are supported except for the `verify` method, which does not have a matching representation in the Attribute/Type world. Generating these interface can be done using `gen-(attr|type)-interface-(defs|decls|docs)`.

Differential Revision: https://reviews.llvm.org/D81884
2020-06-30 15:52:33 -07:00
River Riddle 9fbb2de8e4 [mlir] Add support for defining Traits and Interfaces on Attributes/Types.
This revisions add mechanisms to Attribute/Type for attaching traits and interfaces. The mechanisms are modeled 1-1 after those for operations to keep the system consistent. AttrBase and TypeBase now accepts a trailing list of `Trait` types that will be attached to the object. These traits should inherit from AttributeTrait::TraitBase and TypeTrait::TraitBase respectively as necessary. A followup commit will refactor the interface gen mechanisms in ODS to support Attribute/Type interface generation and add tests for the mechanisms.

Differential Revision: https://reviews.llvm.org/D81883
2020-06-30 15:52:32 -07:00
Alex Zinenko 4ab4398045 [mlir] minor tweaks in standard-to-llvm lowering
Fix a typo in the documentation and simplify the condition to drop
braces. Addresses post-commit review of https://reviews.llvm.org/D82647.
2020-06-30 21:19:19 +02:00
Marius Brehler 0f43fce783 [mlir] Fix case in MLIRGPUtoGPURuntimeTransforms
Summary:
This changes the casing of MLIRGPUtoGPURuntimeTransforms to be consistent
with other transform libraries.

Differential Revision: https://reviews.llvm.org/D82841
2020-06-30 20:48:47 +02:00
Marius Brehler 7099d8e4f7 [mlir] Fix case in MLIRGPUtoNVVMTransforms
Summary:
This changes the casing of MLIRGPUtoNVVMTransforms to be consistent
with other transform libraries.

Reviewers: stephenneuendorffer, herhut

Reviewed By: herhut

Subscribers: jholewinski, mgorny, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82842
2020-06-30 20:44:25 +02:00
Marius Brehler cf6ed682f0 [mlir] Fix case in MLIRGPUtoROCDLTransforms
Summary:
This changes the casing of MLIRGPUtoROCDLTransforms to be consistent
with other transform libraries.

Differential Revision: https://reviews.llvm.org/D82843
2020-06-30 20:43:15 +02:00
aartbik 63b3933d0c [mlir] [VectorOps] Replace zero fma with mult for vector.contract
More efficient implementation of the multiply-reduce pair,
no need to add in a zero vector. Microbenchmarking on AVX2
yields the following difference in vector.contract speedup
(over strict-order scalar reduction).

SPEEDUP     SIMD-fma SIMD-mul
4x4	    1.45 	 2.00
8x8	    1.40 	 1.90
32x32    	5.32 	 5.80

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D82833
2020-06-30 09:04:20 -07:00
Marcel Koester 6f5da84f7b [mlir] Extended BufferPlacement to support nested region control flow.
Summary: The current BufferPlacement implementation does not support
nested region control flow. This CL adds support for nested regions via
the RegionBranchOpInterface and the detection of branch-like
(ReturnLike) terminators inside nested regions.

Differential Revision: https://reviews.llvm.org/D81926
2020-06-30 12:10:01 +02:00
Marius Brehler 446b90135f [mlir] Fix case in MLIRGPUtoVulkanTransforms
This changes the casing of MLIRGPUtoVulkanTransforms to be consistent
with other transform libraries.

Differential Revision: https://reviews.llvm.org/D82840
2020-06-30 01:47:01 -07:00
Frederik Gossen 8577a090f5 [MLIR][Shape] Fix lowering of `shape.get_extent`
The declarative conversion patterns caused crashes in the asan configuration.
The non-declarative implementation circumvents this.

Differential Revision: https://reviews.llvm.org/D82797
2020-06-30 08:35:24 +00:00
River Riddle 6b9a706200 Add front/back accessors to indexed_accessor_range.
These map to the similar accessors on ArrayRef and other random access containers.

This fixes a compilation error on MLIR ODS for variadic operands/results, which relied on the availability of front in certain situations.
2020-06-29 22:41:15 -07:00
George Mitenkov 3819789be6 [MLIR][SPIRVToLLVM] Added Bitcast conversion pattern
Added conversion pattern and tests for `spv.Bitcast` op.  This one has
a direct mapping in LLVM dialect so `DirectConversionPattern` was used.

Differential Revision: https://reviews.llvm.org/D82748
2020-06-29 20:32:48 -04:00
Jacques Pienaar 71b9d89df7 [ods] Update Operator to record Arg->[Attr|Operand]Index mapping
Also fixed bug in type inferface generator to address bug where operands and
attributes are interleaved.

Differential Revision: https://reviews.llvm.org/D82819
2020-06-29 16:40:52 -07:00
George Mitenkov cd1bc5c15d [MLIR][SPIRVToLLVM] Convert bitwise and logical not
This patch introduces new conversion patterns for bit and logical
negation op: `spv.Not` and `spv.LogicalNot`. They are implemented
by applying xor on the operand and mask with all bits set.

Differential Revision: https://reviews.llvm.org/D82637
2020-06-29 19:16:50 -04:00
Rahul Joshi ee394e6842 [MLIR] Add variadic isa<> for Type, Value, and Attribute
- Also adopt variadic llvm::isa<> in more places.
- Fixes https://bugs.llvm.org/show_bug.cgi?id=46445

Differential Revision: https://reviews.llvm.org/D82769
2020-06-29 15:04:48 -07:00
Adam D Straw 25055a4fb9 [mlir] add unsigned comparison builders to Affine EDSC
Current Affine comparison builders, which use operator overload, default to signed comparison.  This creates the possibility of misuse of these builders and potential correctness issues when dealing with unsigned integers.  This change makes the distinction between signed and unsigned comparison builders and forces the caller to make a choice between the two.

Differential Revision: https://reviews.llvm.org/D82323
2020-06-29 23:30:49 +02:00
aartbik 4a80f19078 [mlir] [VectorOps] Extend vector reduction integration test with reassoc=true cases.
Reviewed By: reidtatge

Differential Revision: https://reviews.llvm.org/D82674
2020-06-29 13:28:20 -07:00
Christopher Tetreault 5cba1c6336 [SVE] Remove calls to VectorType::getNumElements from mlir
Reviewers: efriedma, ftynse, rriddle

Reviewed By: ftynse, rriddle

Subscribers: tschuett, rkruppe, psnobl, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82583
2020-06-29 10:29:39 -07:00
Stephan Herhut 67ecd7e296 [mlir] Clean up NVVM intrinsics definitions a little.
Differential Revision: https://reviews.llvm.org/D82750
2020-06-29 16:32:17 +02:00
Tobias Gysi 10643c9ad8 [mlir] make the bitwidth of device side index computations configurable (reland)
Summary:
The patch makes the index type lowering of the GPU to NVVM/ROCDL conversion configurable. It introduces a pass option that controls the bitwidth used when lowering index computations and uses the LowerToLLVMOptions structure to control the Standard to LLVM lowering.

This commit fixes a use-after-free bug introduced by the reverted commit d10b1a3. It implements the following changes:
- Added a getDefaultOptions method to the LowerToLLVMOptions struct that returns a reference to statically allocated default options.
- Use the getDefaultOptions method to provide default LowerToLLVMOptions (instead of an initializer list).
- Added comments to clarify the required lifetime of the LowerToLLVMOptions

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D82475
2020-06-29 12:22:39 +02:00
Alex Zinenko cba733edf5 [mlir] LLVM dialect: use addressof instead of constant to create function pointers
`llvm.mlir.constant` was originally introduced as an LLVM dialect counterpart
to `std.constant`. As such, it was supporting "function pointer" constants
derived from the symbol name. This is different from `std.constant` that allows
for creation of a "function" constant since MLIR, unlike LLVM IR, supports
this. Later, `llvm.mlir.addressof` was introduced as an Op that obtains a
constant pointer to a global in the LLVM dialect. It naturally extends to
functions (in LLVM IR, functions are globals) and should be used for defining
"function pointer" values instead.

Fixes PR46344.

Differential Revision: https://reviews.llvm.org/D82667
2020-06-29 12:21:33 +02:00
Frederik Gossen d876e3202a [MLIR][Shape] Lower `shape.get_extent` to `extract_element` when possible
When the origin of a shape is an extent tensor the operation `get_extent` can be
lowered directly to `extract_element`.
This choice circumvents the necessity to materialize the shape in memory.

Differential Revision: https://reviews.llvm.org/D82645
2020-06-29 08:39:22 +00:00
Frederik Gossen 76d72c941d [MLIR][Shape] Lower `shape.get_extent` to `std.dim` when possible
When the shape is derived from a tensor argument the shape extent can be derived
directly from that tensor with `std.dim`.
This lowering pattern circumvents the necessity to materialize the shape in
memory.

Differential Revision: https://reviews.llvm.org/D82644
2020-06-29 08:38:22 +00:00
Alex Zinenko 42de94f839 [mlir] do not hardcode the name of the undefined function in the error message
The error message in the `std.constant` verifier for function-typed constants
had the name of the undefined function hardcoded to `bar`. Report the actual
name instead.

Differential Revision: https://reviews.llvm.org/D82666
2020-06-29 10:05:06 +02:00
Alex Zinenko fbeceb9ced [mlir] Modernize LLVM dialect rountrip test
This test largely predates MLIR testing guidelines. Update it to match the
guidelines. In particular, avoid pattern-matching SSA value names, avoid
unnecessary CHECK-NEXT, relax assumptions about the form of SSA names.
Value-returning operations are still matched agaist _any_ name in order to
check that the operation indeed produces values.

Differential Revision: https://reviews.llvm.org/D82656
2020-06-29 09:47:36 +02:00
aartbik ceb1b327b5 [mlir] [VectorOps] Add the ability to mark FP reductions with "reassociate" attribute
Rationale:
In general, passing "fastmath" from MLIR to LLVM backend is not supported, and even just providing such a feature for experimentation is under debate. However, passing fine-grained fastmath related attributes on individual operations is generally accepted. This CL introduces an option to instruct the vector-to-llvm lowering phase to annotate floating-point reductions with the "reassociate" fastmath attribute, which allows the LLVM backend to use SIMD implementations for such constructs. Oher lowering passes can start using this mechanism right away in cases where reassociation is allowed.

Benefit:
For some microbenchmarks on x86-avx2, speedups over 20 were observed for longer vector (due to cleaner, spill-free and SIMD exploiting code).

Usage:
mlir-opt --convert-vector-to-llvm="reassociate-fp-reductions"

Reviewed By: ftynse, mehdi_amini

Differential Revision: https://reviews.llvm.org/D82624
2020-06-26 11:03:14 -07:00
Thomas Raoux 0e76c0a9ad [mlir][vulkan-runner] Make vulkan runner use GPU device memory
To be able to have more meaningful performance out of workloadsi going through
the vulkan-runner we need to use buffers from GPU device memory as access to
system memory is significantly slower for GPU with dedicated memory. This adds
code to do a copy through staging buffer as GPU memory cannot always be mapped
on the host.

Differential Revision: https://reviews.llvm.org/D82504
2020-06-26 08:03:06 -07:00
George Mitenkov c8295de4a6 [MLIR][SPIRVToLLVM] Conversion for bitrverse and bitcount ops
Implemented conversion for `spv.BitReverse` and `spv.BitCount`. Since ODS
generates builders in a different way for LLVM dialect intrinsics, I
added attributes to build method in `DirectConversionPattern` class. The
tests for these ops are in `bitwise-ops-to-llvm.mlir`.

Differential Revision: https://reviews.llvm.org/D82286
2020-06-26 10:30:52 -04:00
Denis Khalikov a2004c344b [mlir][spirv] Add RewriteInserts pass.
Add a pass to rewrite sequential chains of `spirv::CompositeInsert`
operations into `spirv::CompositeConstruct` operations.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82198
2020-06-26 09:57:20 -04:00
ergawy d6485ed3a7 [MLIR][SPIRV] Add support for OpCopyMemory.
This patch add support for 'spv.CopyMemory'. The following changes are
introduced:
- 'CopyMemory' op is added to SPIRVOps.td.
- Custom parse and print methods are introduced.
- A few Roundtripping tests are added.

Differential Revision: https://reviews.llvm.org/D82384
2020-06-26 09:43:53 -04:00
Tobias Gysi 652a79659a [mlir] fix off-by-one error in collapseParallelLoops
Summary: The patch fixes an off by one error in the method collapseParallelLoops. It ensures the same normalized bound is used for the computation of the division and the remainder.

Reviewers: herhut

Reviewed By: herhut

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82634
2020-06-26 15:39:46 +02:00
Alex Zinenko 8304ab5799 [mlir] Avoid creating local OpBuilders in Standard-to-LLVM conversion
Conversions of allocation-related operations in Standard-to-LLVM need
declarations of "malloc" and "free" (or equivalents). They use locally created
OpBuilders pointed at the module level to declare these functions if necessary.
This is poorly compatible with the pattern infrastructure that is unaware of
new operations being created. Update the insertion point of the main rewriter
instead.

Differential Revision: https://reviews.llvm.org/D82649
2020-06-26 15:38:00 +02:00
Alex Zinenko 6323065fd6 [mlir] support returning unranked memrefs
Initially, unranked memref descriptors in the LLVM dialect were designed only
to be passed into functions. An assertion was guarding against returning
unranked memrefs from functions in the standard-to-LLVM conversion. This is
insufficient for functions that wish to return an unranked memref such that the
caller does not know the rank in advance, and hence cannot allocate the
descriptor and pass it in as an argument.

Introduce a calling convention for returning unranked memref descriptors as
follows. An unranked memref descriptor always points to a ranked memref
descriptor stored on stack of the current function. When an unranked memref
descriptor is returned from a function, the ranked memref descriptor it points
to is copied to dynamically allocated memory, the ownership of which is
transferred to the caller. The caller is responsible for deallocating the
dynamically allocated memory and for copying the pointed-to ranked memref
descriptor onto its stack.

Provide default lowerings for std.return, std.call and std.indirect_call that
maintain the conversion defined above.

This convention is additionally exercised by a runtime test to guard against
memory errors.

Differential Revision: https://reviews.llvm.org/D82647
2020-06-26 15:37:37 +02:00
Jean-Michel Gorius 05b4ff0a4b [mlir-tblgen] Use fully qualified names in generated code files
Using fully qualified names wherever possible avoids ambiguous class and function names. This is a follow-up to D82371.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D82471
2020-06-26 15:05:33 +02:00
Tung D. Le 2b5d1776ff [MLIR][Affine-loop-fusion] Fix a bug in affine-loop-fusion pass when there are non-affine operations
When there is a mix of affine load/store and non-affine operations (e.g. std.load, std.store),
affine-loop-fusion ignores the present of non-affine ops, thus changing the program semantics.

E.g. we have a program of three affine loops operating on the same memref in which one of them uses std.load and std.store, as follows.
```
affine.for
  affine.store %1
affine.for
  std.load %1
  std.store %1
affine.for
  affine.load %1
  affine.store %1
```
affine-loop-fusion will produce the following result which changed the program semantics:
```
affine.for
  std.load %1
  std.store %1
affine.for
  affine.store %1
  affine.load %1
  affine.store %1
```

This patch is to fix the above problem by checking non-affine users of the memref that are between the source and destination nodes of interest.

Differential Revision: https://reviews.llvm.org/D82158
2020-06-26 18:26:42 +05:30
Tobias Gysi 48f1d4fcd2 [mlir] parallel loop canonicalization
Summary:
The patch introduces a canonicalization pattern for parallel loops. The pattern removes single-iteration loop dimensions if the loop bounds and steps are constants.

Reviewers: herhut, ftynse

Reviewed By: herhut

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82191
2020-06-26 09:57:08 +02:00
Diego Caballero a72887831a [mlir][EDSC] Add divis and diviu and vector.extractelement
Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D82515
2020-06-25 08:11:30 -07:00
Frederik Gossen 66e0f66d8f [MLIR][Shape] Canonicalize subsequent `size_to_index` and `index_to_size`
Eliminate the subsequent applications of `size_to_index` and `index_to_size`.

Differential Revision: https://reviews.llvm.org/D82083
2020-06-25 12:43:17 +00:00
Frederik Gossen bf2a4f3b3a [MLIR][Shape] Canonicalize subsequent `index_to_size` and `size_to_index`
Eliminate the subsequent applications of `index_to_size` and `size_to_index`.

Differential Revision: https://reviews.llvm.org/D82082
2020-06-25 12:02:49 +00:00
Frederik Gossen 5a7cd5db3c [MLIR][Shape] Fix ambiguous symbol 2020-06-25 09:40:08 +00:00
Frederik Gossen e34b88309e [MLIR][Shape] Lower `shape_of` for unranked tensors
Lower `shape_of` for unranked tensors.
Materializes shape in stack-allocated memory.

Differential Revision: https://reviews.llvm.org/D82196
2020-06-25 08:50:45 +00:00
Frederik Gossen 24debf5a76 [MLIR][Shape] Lower `shape.rank`
Lower `shape.rank` to standard dialect.
A shape's size is the same as the extent of the first and only dimension of the
`tensor<?xindex>` it is represented by.

Differential Revision: https://reviews.llvm.org/D82080
2020-06-25 08:44:06 +00:00
Frederik Gossen 7bca97d960 [MLIR][Shape] Add canonicalization pattern for `shape.rank`
Replace any `rank(shape_of(tensor))` that relies on a ranked tensor with the
corresponding constant `const_size`.

Differential Revision: https://reviews.llvm.org/D82077
2020-06-25 08:39:35 +00:00
Frederik Gossen 81469527ec [MLIR][Shape] Add constant folding to `shape.rank`
Add constant folding for the `shape.rank` operation of the shape dialect.

Differential Revision: https://reviews.llvm.org/D82076
2020-06-25 08:32:25 +00:00
Frederik Gossen 2c061998b5 [MLIR][Shape] Add `shape.rank` operation
Add `shape.rank` operation to the shape dialect.

Differential Revision: https://reviews.llvm.org/D82028
2020-06-25 08:26:00 +00:00
Tobias Gysi cd73081605 [mlir] parallel loop tiling optimization for loops with static bounds
Summary: The patch optimizes the tiling of parallel loops with static bounds if the number of loop iterations is an integer multiple of the tile size.

Reviewers: herhut, ftynse, bondhugula

Reviewed By: herhut, ftynse

Subscribers: bondhugula, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82003
2020-06-25 09:21:24 +02:00
Mehdi Amini 5ac47c3f52 Move explicit template class specialization out of the class to fix gcc builds (NFC)
gcc fails with:

   explicit specialization in non-namespace scope
2020-06-25 01:43:21 +00:00
George Mitenkov b5c24c24a4 [MLIR][SPIRVToLLVM] Implementation of SPIR-V module conversion pattern
This patch introduces conversion patterns for `spv.module` and `spv._module_end`.
SPIR-V module is converted into `ModuleOp`. This will play a role of enclosing
scope to LLVM ops. At the moment, SPIR-V module attributes (such as memory model,
etc) are ignored.

Differential Revision: https://reviews.llvm.org/D82468
2020-06-24 20:42:50 -04:00
River Riddle e6a343e491 [mlir][DialectConversion][NFC] Add comment blocks and organize a bit of the code
This helps improve the readability when scrolling through the many functions of ConversionPatternRewriterImpl.
2020-06-24 17:42:10 -07:00
HazemAbdelhafez 2bcb620868 [mlir][spirv] Add TransposeOp
Add Transpose operation to SPIRV dialect.

Differential Revision: https://reviews.llvm.org/D82308
2020-06-24 20:41:54 -04:00
River Riddle 7d1452d837 [mlir] Refactor OpInterface internals to be faster and factor out common bits.
This revision adds a new support header, InterfaceSupport, to contain various generic bits of functionality for implementing "Interfaces". Interfaces embody a mechanism for attaching concept-based polymorphism to a type system. With this refactoring a new InterfaceMap type is added to allow for efficient interface lookups without going through an indirect call. This should provide a decent performance speedup without changing the size of AbstractOperation.

In a future revision, this functionality will also be used to bring Interface like functionality to Attributes and Types.

Differential Revision: https://reviews.llvm.org/D81882
2020-06-24 17:23:58 -07:00
Rahul Joshi d891d738d9 [MLIR][NFC] Adopt variadic isa<>
Differential Revision: https://reviews.llvm.org/D82489
2020-06-24 17:02:44 -07:00
Uday Bondhugula aec5344f48 [MLIR] Fix affine loop fusion private memref alloc
Drop stale code that provided the wrong operands to alloc.

Reported-by: rjnw on discourse

Differential Revision: https://reviews.llvm.org/D82409
2020-06-24 22:19:29 +05:30
Rahul Joshi 60f914e5b1 [NFC][MLIR] Undo anonymous namespace change from https://reviews.llvm.org/D82417
Undo as it does not conform to LLVM coding style
(https://llvm.org/docs/CodingStandards.html#anonymous-namespaces)
2020-06-23 20:21:42 -07:00
Rahul Joshi e7f7137cd7 [MLIR] [NFC] Add new line and empty line before printing modified loop
to make the debug output readable.

Differential Revision: https://reviews.llvm.org/D82417
2020-06-23 17:27:43 -07:00
aartbik ba690195d1 [mlir] [integration-test] Let target check-mlir imply target check-mlir-integration too
Note that this does not mean that check-mlir will run check-mlir-integration
tests for all configurations. You still need to do a set up with the flag
MLIR_INCLUDE_INTEGRATION_TESTS set to ON in order to activate the integration test.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D82413
2020-06-23 15:22:39 -07:00
aartbik 55d09dfc7b [mlir] [VectorOps] Improve vector.create_mask lowering
Use vector compares for the 1-D case. This approach scales much better
than generating insertion operations, and exposes SIMD directly to backend.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D82402
2020-06-23 14:33:41 -07:00
Jean-Michel Gorius 1db1a08dda [mlir] Avoid pontentially ambiguous class name
Summary: The Pass class exists in both the mlir and the llvm namespaces. Use the fully qualified class name to avoid any ambiguities.

Reviewers: rriddle

Reviewed By: rriddle

Subscribers: mehdi_amini, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82371
2020-06-23 21:24:43 +02:00
George Mitenkov a2edbd8170 [MLIR][LLVMDialect] Added bitreverse and ctpop intrinsics
Introduced `llvm.intr.bitreverse` and `llvm.intr.ctpop` LLVM bit
intrinsics to LLVM dialect. These intrinsics help with SPIR-V to
LLVM conversion, allowing a direct mapping from `spv.BitReverse`
and `spv.BitCount` respectively. Tests are added to `roundtrip.mlir`
and `llvm-intrinsics.mlir`.

Differential Revision: https://reviews.llvm.org/D82285
2020-06-23 14:25:35 -04:00
Feng Liu 5048933c47 [mlir] Added the dialect inliner to the SCF dialect
Currently no restrictions are added to the destination regions.

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82336
2020-06-23 10:49:05 -07:00
Tobias Gysi 2ff6fad700 Revert "[mlir] make the bitwidth of device side index computations configurable"
This reverts commit d10b1a38a7.
2020-06-23 19:21:36 +02:00
ergawy 4837562de4 [MLIR][SPIRV] Extend automation script to generate coverage report.
This patch adds a new cli argument to the automation script to generate
a report of the current SPIRV spec instruction coverage. It dumps to the
standard output a YAML string with the coverage information.

Differential Revision: https://reviews.llvm.org/D82006
2020-06-23 11:42:59 -04:00
George Mitenkov a4dc61344f [MLIR][SPIRVToLLVM] Implementation of spv.func conversion, and return ops
This patch provides an implementation for `spv.func` conversion. The pattern
is populated in a separate method added to the pass. At the moment, the type
signature conversion only includes the supported types. The conversion pattern
also matches SPIR-V function control attributes to LLVM function attributes.
Those are modelled as `passthrough` attributes in LLVM dialect. The following
mapping are used:
- None: no attributes passed
- Inline: `alwaysinline` seems to be the right equivalent (`inlinehint` is
  semantically weaker in my opinion)
- DontInline: `noinline`
- Pure and Const: I think those can be modelled as `readonly` and `readnone`
  attributes respectively.

Also, 2 patterns added for return ops conversion (`spv.Return` for void return
and `spv.ReturnValue` for a single value return).

Differential Revision: https://reviews.llvm.org/D81931
2020-06-23 11:34:11 -04:00
Wen-Heng (Jack) Chung 6bb4fc93c2 Fix a corner case in vector.shape_cast when the trailing dimensions are of size 1.
Differential Revision: https://reviews.llvm.org/D82304
2020-06-22 22:00:45 -05:00
Wen-Heng (Jack) Chung b7c4912996 [mlir][mlir-rocm-runner] Remove compile-time warning. NFC.
Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82333
2020-06-22 21:58:40 -05:00
Rahul Joshi c20875a48c [MLIR][NFC] Adopt hasNItems() for SizedRegion predicate
Differential Revision: https://reviews.llvm.org/D82334
2020-06-22 16:43:02 -07:00
Jacques Pienaar ada0d41dbc [mlir][ods] Allow filtering of ops
Add option to filter which op the OpDefinitionsGen run on. This enables having multiple ops together in the same TD file but generating different CC files for them (useful if one wants to use multiclasses or split out 1 dialect into multiple different libraries). There is probably more general query here (e.g., split out all ops that don't have a verify method, or that are commutative) but filtering based on op name (e.g., test.a_op) seemed a reasonable start and didn't require inventing a query specification mechanism here.

Differential Revision: https://reviews.llvm.org/D82319
2020-06-22 14:56:54 -07:00
Hanhan Wang 809bcf4c87 [mlir] Fix a doc link in LinalgBase.td
Differential Revision: https://reviews.llvm.org/D82303
2020-06-22 11:19:18 -07:00
AlexEichenberger 01641197ee [MLIR] Remove TableGen redundant calls to native calls when creating new operations in DRR TableGen files
Summary:
Currently, the TableGen rewrite generates redundant native calls in MLIR DRR files. This is a problem as some native calls may involve significant computations (e.g. when performing constant propagation where every values in a large tensor is touched).

The pattern was as follow:

```c++
if (native-call(args)) tblgen_attrs.emplace_back(rewriter, attribute, native-call(args))
```

The replacement pattern compute `native-call(args)` once and then use it both in the `if` condition and the `emplace_back` call.

Differential Revision: https://reviews.llvm.org/D82101
2020-06-22 08:12:04 -07:00
HazemAbdelhafez 02022ff2e3 [mlir][spirv] Enhance AccessChainOp index type handling
This patch extends the AccessChainOp index type handling to be able to deal with
all Integer type indices (i.e., all bit-widths and signedness symantics).

There were two ways of achieving this:
1- Backward compatible: The new way of handling the indices will assume that
   an index type is i32 by default if not specified in the assembly format,
   this way all the old tests would pass correctly.
2- Enforce the format: This unifies the spv.AccessChain Op format and all the old
   tests had to be updated to reflect this change or else they fail.

I picked option-2 to unify the Op format and avoid having optional index-type fields
that can lead to somewhat confusing tests format and multiple representations for
the same Op with undocumented assumption that an index is i32 unless stated.
Nonetheless, reverting to option-1 should be straightforward if preferred or needed.

Differential Revision: https://reviews.llvm.org/D81763
2020-06-22 10:11:33 -04:00
Jakub Lichman cde2dc2fa6 [mlir] Fix linalg.generic matmul example in the doc
Example of Matmul implementation in linalg.generic operation contained few mistakes that can puzzle new startes when trying to run the example.

Differential Revision: https://reviews.llvm.org/D82289
2020-06-22 13:24:41 +02:00