f3a479f04a
Add stub support for GEPs.
...
Add support for branches (based loosely on X86/InstSelectSimple).
Add support for not visiting phi nodes in the first pass.
Add support for loading bools.
Flesh out support for stores.
llvm-svn: 13418
2004-05-08 04:21:17 +00:00
584308b71a
Add support for copying bool constants to registers.
...
Disable the code that copies long constants to registers - it looks fishy.
Implement some simple casts: integral, smaller than longs, and equal-width
or narrowing only.
llvm-svn: 13413
2004-05-07 21:39:30 +00:00
a2dc6bf6e6
Codegen floating point stores of constants into integer instructions. This
...
allows us to compile:
store float 10.0, float* %P
into:
mov DWORD PTR [%EAX], 1092616192
instead of:
.CPItest_0: # float 0x4024000000000000
.long 1092616192 # float 10
...
fld DWORD PTR [.CPItest_0]
fstp DWORD PTR [%EAX]
llvm-svn: 13409
2004-05-07 21:18:15 +00:00
cecf3f94a4
Make comparisons against the null pointer as efficient as integer comparisons
...
against zero. In particular, don't emit:
mov %ESI, 0
cmp %ECX, %ESI
instead, emit:
test %ECX, %ECX
llvm-svn: 13407
2004-05-07 19:55:55 +00:00
d26074eef1
Missing piece of fix for Bug 333
...
llvm-svn: 13362
2004-05-04 21:41:45 +00:00
f2ff5dd442
Correctly mangle function names when they are used as part of a
...
constant pool member's name.
This is intended to address Bug 333.
Also, fix an anachronistic usage of "M" as a parameter of type Function *.
llvm-svn: 13357
2004-05-04 21:09:02 +00:00
c6f601310f
Remove unneeded check
...
llvm-svn: 13355
2004-05-04 19:35:11 +00:00
22df9a59b4
Improve signed division by power of 2 *dramatically* from this:
...
div:
mov %EDX, DWORD PTR [%ESP + 4]
mov %ECX, 64
mov %EAX, %EDX
sar %EDX, 31
idiv %ECX
ret
to this:
div:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, %EAX
sar %ECX, 5
shr %ECX, 26
mov %EDX, %EAX
add %EDX, %ECX
sar %EAX, 6
ret
Note that the intel compiler is currently making this:
div:
movl 4(%esp), %edx #3.5
movl %edx, %eax #4.14
sarl $5, %eax #4.14
shrl $26, %eax #4.14
addl %edx, %eax #4.14
sarl $6, %eax #4.14
ret #4.14
Which has one less register->register copy. (hint hint alkis :)
llvm-svn: 13354
2004-05-04 19:33:58 +00:00
8c22ece232
Improve code generated for integer multiplications by 2,3,5,9
...
llvm-svn: 13342
2004-05-04 15:47:14 +00:00
7b0a2046d4
Remove unused #include
...
llvm-svn: 13304
2004-05-01 21:29:16 +00:00
acbf0c84de
Iterate over the Machine CFG that Brian added instead of the LLVM CFG.
...
Look at all of the pretty minuses. :)
llvm-svn: 13303
2004-05-01 21:27:53 +00:00
490e804a4e
Add a constructor that got lost
...
llvm-svn: 13297
2004-05-01 11:17:13 +00:00
6ebf67f8b6
Removing MachineResource class.
...
llvm-svn: 13291
2004-04-30 20:40:38 +00:00
4390e4a7fc
Make RequiresFPRegKill() take a MachineBasicBlock arg.
...
In InsertFPRegKills(), just check the MachineBasicBlock for successors
instead of its corresponding BasicBlock.
llvm-svn: 13213
2004-04-28 04:45:55 +00:00
33ff118407
In InsertFPRegKills(), use the machine-CFG itself rather than the
...
LLVM CFG when trying to find the successors of BB.
llvm-svn: 13212
2004-04-28 04:34:16 +00:00
24ec85689b
Update the machine-CFG edges whenever we see a branch.
...
llvm-svn: 13211
2004-04-28 04:19:37 +00:00
444a03b77a
Integrate the rest of my random sparcv9 scribblings into this file
...
llvm-svn: 13204
2004-04-27 22:04:03 +00:00
2d3a7a6ff0
Changes to fix up the inst_iterator to pass to boost iterator checks. This
...
patch was graciously contributed by Vladimir Prus.
llvm-svn: 13185
2004-04-27 15:13:33 +00:00
03cac379bd
Fix file header comments and include guards -- many files have been moved or
...
renamed since they were last spiffed up, or they just never had proper comments
in the first place.
llvm-svn: 13148
2004-04-25 07:04:49 +00:00
42d321ab66
Add a getRegisterInfo() accessor just like on the X86 target.
...
llvm-svn: 13147
2004-04-25 06:32:28 +00:00
4ec08db77c
Regularize file header comment and include guard.
...
Include SparcV9RegisterInfo.h.
Add a getRegisterInfo() accessor and SparcV9RegisterInfo instance, just like
on the X86 target.
llvm-svn: 13146
2004-04-25 06:32:16 +00:00
f70544c583
Add MRegisterInfo subclass for the SparcV9 target (containing only stub
...
functions for now). This automatically turns on the printing of machine
registers using their own real names, instead of goofy things like %mreg(42),
and allows us to migrate code incrementally to the new interface as we see fit.
The register file description it uses is hand-written, so that the register
numbers will match the ones that the SparcV9 target already uses.
Perhaps someday we'll tablegen it.
llvm-svn: 13145
2004-04-25 06:32:05 +00:00
ced65e8792
Fix a typo.
...
llvm-svn: 13136
2004-04-23 21:45:02 +00:00
0b65f8f582
Merge TargetRegInfo.h into SparcV9RegInfo.h, which is its only subclass.
...
This prepares us to be able to de-virtualize and de-abstract it, and
take the register allocator bits out and move them into the register allocator
proper...
llvm-svn: 13127
2004-04-23 18:15:48 +00:00
71509a98c5
Include SparcV9RegInfo.h instead of TargetRegInfo.h.
...
llvm-svn: 13126
2004-04-23 18:15:47 +00:00
fbd43e43a7
Get rid of the old byte-at-a-time emission code used when the Sparc JIT was
...
being tested on X86, as per Chris's request.
llvm-svn: 13124
2004-04-23 18:10:38 +00:00
6e102a7edd
Use emitWordAt() to emit forward-branch fixups.
...
llvm-svn: 13120
2004-04-23 17:11:16 +00:00
fe277c2809
Emit SPARC machine code a word at a time instead of a byte at a time.
...
Use emitWordAt() to emit forward-branch fixups.
llvm-svn: 13119
2004-04-23 17:11:15 +00:00
376ac1bed5
Make SparcV9RegInfo::getRegType() return the right answer for registers
...
of IntCC, FloatCC, and Special types.
Make SparcV9RegInfo::getRegClassIDOfRegType() return the right answer
if you ask for the class corresponding to SpecialRegType.
llvm-svn: 13095
2004-04-21 17:53:58 +00:00
a2f66db6c4
Make it legal to ask for the type of a specialreg
...
llvm-svn: 13078
2004-04-20 20:12:57 +00:00
6c272a93bb
Make it legal to request a load or store of %fsr.
...
llvm-svn: 13073
2004-04-19 19:12:12 +00:00
755651df27
Regularize include guards and remove some excess whitespace.
...
llvm-svn: 13071
2004-04-19 18:53:44 +00:00
2fd2536ea8
Tighten up SparcV9FloatCCRegClass::getRegName()'s assertion - if you ask it for
...
the name of %fsr (as the comment in SparcV9RegClassInfo.h used to suggest)
you would walk off the end of the FloatCCRegName array.
llvm-svn: 13070
2004-04-19 18:53:43 +00:00
85cb77737c
Regularize include guards, remove some excess whitespace and fix some comments.
...
Remove the extra %fsr register from SparcV9FloatCCRegClass.
llvm-svn: 13069
2004-04-19 18:53:42 +00:00
5bee0f3068
Give SparcV9CodeEmitter a head-of-file comment and a PassName.
...
llvm-svn: 12967
2004-04-15 20:23:13 +00:00
e3e2c91997
Remove code to adjust the iterator for llvm.readio and llvm.writeio.
...
The iterator is pointing at the next instruction which should not disappear
when doing the load/store replacement.
llvm-svn: 12954
2004-04-14 21:27:56 +00:00
0174347d9a
Fix typo.
...
llvm-svn: 12953
2004-04-14 21:21:56 +00:00
0dc099c2b5
This is the real fix for Codegen/X86/2004-04-13-FPCMOV-Crash.llx which works
...
even when the "optimization" I added before is turned off. It generates this
extremely pointless code:
test:
fld QWORD PTR [%ESP + 4]
mov %AL, 0
test %AL, %AL
fcmove %ST(0), %ST(0)
ret
Good thing the optimizer will have removed this before code generation
anyway. :)
llvm-svn: 12939
2004-04-14 02:42:32 +00:00
beded72a08
Added support for the llvm.readio and llvm.writeio intrinsics.
...
On x86, memory operations occur in-order, so these are just lowered into
volatile loads and stores.
llvm-svn: 12936
2004-04-13 22:13:14 +00:00
9042e381d8
Implement a small optimization, which papers over the problem in
...
X86/2004-04-13-FPCMOV-Crash.llx
A more robust fix is to follow.
llvm-svn: 12935
2004-04-13 21:56:09 +00:00
6f6e4b9f59
I don't think we have to have 4 extra allocated (but unused) bytes on the stack.
...
llvm-svn: 12905
2004-04-13 18:28:37 +00:00
969795b4ea
I started working on casts, but I don't have anything compilable yet.
...
llvm-svn: 12903
2004-04-13 18:27:46 +00:00
c71b096672
Emit the immediate form of in/out when possible.
...
Fix several bugs in the intrinsics:
1. Make sure to copy the input registers before the instructions that use them
2. Make sure to copy the value returned by 'in' out of EAX into the register
it is supposed to be in.
This fixes assertions when using in/out and linear scan.
llvm-svn: 12896
2004-04-13 17:20:37 +00:00
a340febe52
Add immediate forms of in/out. Use let to shorten lines
...
llvm-svn: 12895
2004-04-13 17:19:31 +00:00
eaa28a29ae
Add support for new instruction type
...
llvm-svn: 12894
2004-04-13 17:18:51 +00:00
27b2e2cdc0
Add support for the printImplicitDefsBefore flag
...
llvm-svn: 12893
2004-04-13 17:18:39 +00:00
bb0f2db881
We don't need to insert TargetData into the PassManager here.
...
llvm-svn: 12874
2004-04-12 21:46:31 +00:00
a24f986333
Fix issues that the local allocator has dealing with instructions that implicitly use ST(0)
...
llvm-svn: 12855
2004-04-12 03:02:48 +00:00
2e2b0ceab9
No really, fix printing for LLC. I gotta get a way for CVS to whine at me if
...
I have unsaved emacs buffers, geeze...
llvm-svn: 12854
2004-04-12 01:52:04 +00:00
ba1038e0f3
Correct printing for LLC and the encoding for the JIT
...
llvm-svn: 12853
2004-04-12 01:50:04 +00:00
Brian Gaeke