Commit Graph

114 Commits

Author SHA1 Message Date
Evan Cheng 3e18e504ae Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.
llvm-svn: 41863
2007-09-11 19:55:27 +00:00
Christopher Lamb cde0ee5221 Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350
llvm-svn: 40518
2007-07-26 07:48:21 +00:00
Evan Cheng ac1591be42 No more noResults.
llvm-svn: 40132
2007-07-21 00:34:19 +00:00
Evan Cheng 94b5a80b93 Change instruction description to split OperandList into OutOperandList and
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;

llvm-svn: 40033
2007-07-19 01:14:50 +00:00
Evan Cheng 0867337075 Remove clobbersPred.
llvm-svn: 38500
2007-07-10 18:07:08 +00:00
Evan Cheng b039c60889 Do away with ImmutablePredicateOperand.
llvm-svn: 37959
2007-07-06 23:21:02 +00:00
Evan Cheng eaa82198c4 Add OptionalDefOperand to stand for optionally defined result.
llvm-svn: 37930
2007-07-06 01:00:16 +00:00
Evan Cheng 756d15ac6f - Added zero_reg def to stand for register 0.
- Added two variants of PredicateOperand: ImmutablePredicateOperand, whose predicate does not change after isel; PredicateDefOperand, which represent a predicate defintion operand.

llvm-svn: 37892
2007-07-05 07:09:09 +00:00
Dan Gohman e8c1e428f2 Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).

llvm-svn: 37728
2007-06-26 00:48:07 +00:00
Dan Gohman 9e82064924 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644
2007-06-19 01:48:05 +00:00
Evan Cheng a7ca624028 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.
llvm-svn: 37643
2007-06-19 01:26:51 +00:00
Christopher Lamb f274efef9f Add support to tablegen for specifying subregister classes on a per register class basis.
llvm-svn: 37572
2007-06-13 22:20:15 +00:00
Evan Cheng d04409154f Added clobbersPred.
llvm-svn: 37466
2007-06-06 10:15:28 +00:00
Evan Cheng cc33218607 Added isPredicable bit to class Instruction.
llvm-svn: 37117
2007-05-16 20:47:01 +00:00
Evan Cheng d194a8603d PredicateOperand can be used as a normal operand for isel.
llvm-svn: 36947
2007-05-08 21:06:08 +00:00
Bill Wendling e6182267d7 Add an "implies" field to features. This indicates that, if the current
feature is set, then the features in the implied list should be set also.
The opposite is also enforced: if a feature in the implied list isn't set,
then the feature that owns that implies list shouldn't be set either.

llvm-svn: 36756
2007-05-04 20:38:40 +00:00
Chris Lattner f65f18b2f9 expose HonorSignDependentRoundingFPMathOption to .td files
llvm-svn: 36658
2007-05-03 00:27:11 +00:00
Nate Begeman 27a625a74b llvm bug #1350, parts 1, 2, and 3.
llvm-svn: 36618
2007-05-01 05:57:02 +00:00
Evan Cheng ac9fdde7f4 Add sub-registers sets.
llvm-svn: 36278
2007-04-20 21:13:46 +00:00
Evan Cheng 461c964d3d Added isReMaterializable.
llvm-svn: 35160
2007-03-19 06:22:07 +00:00
Chris Lattner fa9227ed54 Add calling convention info
llvm-svn: 34661
2007-02-27 06:59:52 +00:00
Dan Gohman 8c8597c4d9 Fix typos in comments.
llvm-svn: 34456
2007-02-20 20:52:03 +00:00
Jim Laskey f9e5445ed4 Make LABEL a builtin opcode.
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
Evan Cheng a557a0028d Comment.
llvm-svn: 33114
2007-01-12 07:25:16 +00:00
Chris Lattner 5c23899c7d add a new field needed by the code emitter generator.
llvm-svn: 31768
2006-11-15 22:55:04 +00:00
Chris Lattner 4905d2c5b4 initial steps to getting the predicate on PPC::BLR right.
llvm-svn: 31437
2006-11-03 23:52:18 +00:00
Chris Lattner 4fcc04a32a remove dead var
llvm-svn: 31436
2006-11-03 23:50:15 +00:00
Evan Cheng 7a6a5b9af5 Add constraints to Instruction class.
llvm-svn: 31332
2006-11-01 00:26:27 +00:00
Chris Lattner adcaf294d7 Move the Imp tblgen class from the X86 backend to common code.
llvm-svn: 30907
2006-10-12 17:49:27 +00:00
Evan Cheng c767acd25a Add code size to target instruction use it as the 3rd isel sorting tie-breaker.
llvm-svn: 29193
2006-07-19 00:24:41 +00:00
Evan Cheng f3cbd7ef31 Added a Flags field to TargetOperandInfo. Currently the only flag is
M_LOOK_UP_PTR_REG_CLASS which allows the register class of the operand to be
resolved via a callback at runtime.

llvm-svn: 28387
2006-05-18 20:44:26 +00:00
Evan Cheng 297e1cb10a Remove CalleeSavedRegisters from class Target.
llvm-svn: 28377
2006-05-18 00:09:53 +00:00
Evan Cheng dcec882286 Remove PointerType from class Target
llvm-svn: 28368
2006-05-17 21:20:27 +00:00
Vladimir Prus 788db2c812 Replace "../whatever.td" with "whatever.td", so that out-of-tree backends
can just add lib/Target to TableGen includes.

llvm-svn: 28318
2006-05-16 06:39:36 +00:00
Chris Lattner fce45ffcd6 Improve comment, patch provided by Vladimir Prus!
llvm-svn: 28307
2006-05-15 18:35:02 +00:00
Chris Lattner 215280d8b9 Update comment.
llvm-svn: 28283
2006-05-14 02:05:19 +00:00
Chris Lattner 85e9909755 Put PHI/INLINEASM into the correct namespace.
llvm-svn: 28037
2006-05-01 17:00:49 +00:00
Evan Cheng 52df74000a Renamed AddedCost to AddedComplexity.
llvm-svn: 27843
2006-04-19 20:38:28 +00:00
Evan Cheng aa3325e925 Allow "let AddedCost = n in" to increase pattern complexity.
llvm-svn: 27834
2006-04-19 18:07:24 +00:00
Jim Laskey 3b338d5566 Add support for dwarf register numbering.
llvm-svn: 27080
2006-03-24 21:13:21 +00:00
Chris Lattner c6b13e21cc Shuffle some includes around
llvm-svn: 27073
2006-03-24 18:52:35 +00:00
Chris Lattner b203355298 Split the valuetypes out of Target.td into ValueTypes.td
llvm-svn: 26490
2006-03-03 01:55:26 +00:00
Evan Cheng 91c574b642 New type v2f32.
llvm-svn: 26435
2006-03-01 01:06:22 +00:00
Evan Cheng 43070b7541 Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).

llvm-svn: 26294
2006-02-20 22:34:53 +00:00
Evan Cheng d98701c639 Subtarget feature can now set any variable to any value
llvm-svn: 25678
2006-01-27 08:09:42 +00:00
Chris Lattner 1240574609 PHI and INLINEASM are now built-in instructions provided by Target.td
llvm-svn: 25674
2006-01-27 01:46:15 +00:00
Evan Cheng 7785e5b3a4 New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
hasInFlag, hasOutFlag.

llvm-svn: 25155
2006-01-09 18:28:21 +00:00
Evan Cheng 14c53b45f5 Added field noResults to Instruction.
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
2005-12-26 09:11:45 +00:00
Evan Cheng 9ae486047e * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)

llvm-svn: 24997
2005-12-23 22:14:32 +00:00
Evan Cheng d296a43f96 Added support to specify predicates.
llvm-svn: 24715
2005-12-14 22:02:59 +00:00