9da02f5ee2
Remove isReg, isImm, and isMBB, and change all their users to use
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isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.
llvm-svn: 41958
2007-09-14 20:33:02 +00:00
272f7304f0
Add support for functions with byval arguments on x86
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llvm-svn: 41953
2007-09-14 15:48:13 +00:00
5196f617a1
Fix comments.
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llvm-svn: 41947
2007-09-14 01:57:02 +00:00
59c39dc197
Initial support for multi-result patterns:
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1.
[(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
(modify EFLAGS)]
This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS.
2.
def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()>
Similar to #1 except this is used for def : Pat patterns.
llvm-svn: 41897
2007-09-12 23:30:14 +00:00
028084efe5
Revise previous patch per review comments.
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Next round of x87 long double stuff.
Getting close now, basically works.
llvm-svn: 41875
2007-09-12 03:30:33 +00:00
66c22e8fd6
Enable indirect encoding for the personality function
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llvm-svn: 41873
2007-09-11 23:55:40 +00:00
3e18e504ae
Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.
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llvm-svn: 41863
2007-09-11 19:55:27 +00:00
50b6730ae4
Added status flags register: EFLAGS.
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llvm-svn: 41862
2007-09-11 19:53:28 +00:00
245dceb06d
Add APInt interfaces to APFloat (allows directly
...
access to bits). Use them in place of float and
double interfaces where appropriate.
First bits of x86 long double constants handling
(untested, probably does not work).
llvm-svn: 41858
2007-09-11 18:32:33 +00:00
74fb0f1a1c
Add a bool to indicate if we should set the "indirect encoding" bit in the Dwarf
...
information for EH.
llvm-svn: 41852
2007-09-11 17:20:55 +00:00
86e0119822
Fold the adjust_trampoline intrinsic into
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init_trampoline. There is now only one
trampoline intrinsic.
llvm-svn: 41841
2007-09-11 14:10:23 +00:00
1a11e1c14f
My compiler warns about the semicolon.
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llvm-svn: 41840
2007-09-11 12:30:25 +00:00
2b8fc31df9
The personality function on Darwin needs a global stub. We then refer to
...
that global stub instead of doing the ".set" thingy we were doing before.
llvm-svn: 41838
2007-09-11 08:27:17 +00:00
f948772f9e
80 col.
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llvm-svn: 41812
2007-09-10 22:22:23 +00:00
8c3c198499
New entry.
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llvm-svn: 41810
2007-09-10 22:16:37 +00:00
6777b72659
Add some notes about better flag handling.
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llvm-svn: 41808
2007-09-10 21:43:18 +00:00
637395e6bd
It's not safe to rematerialize MOV32r0 etc. by simply cloning the original
...
instruction. These are implemented with xor which will modify the conditional
code. They should be rematerialized as move instructions.
llvm-svn: 41802
2007-09-10 20:48:53 +00:00
cef2c0efcc
TableGen no longer emit CopyFromReg nodes for implicit results in physical
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registers. The scheduler is now responsible for emitting them.
llvm-svn: 41781
2007-09-07 23:59:02 +00:00
9929bc403d
Add missing index versions of instructions to the map.
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llvm-svn: 41776
2007-09-07 22:01:02 +00:00
a95cbb0007
Avoid storing and reloading zeros and other constants from stack slots
...
by flagging the associated instructions as being trivially rematerializable.
llvm-svn: 41775
2007-09-07 21:32:51 +00:00
9e70086c8f
Apply feedback from previous patch.
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llvm-svn: 41774
2007-09-07 21:07:57 +00:00
1de0c86717
Add support for having different alignment for objects on call frames.
...
The x86-64 ABI states that objects passed on the stack have
8 byte alignment. Implement that.
llvm-svn: 41768
2007-09-07 14:52:14 +00:00
e2f23a3abf
Add lengthof and endof templates that hide a lot of sizeof computations.
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Patch by Sterling Stein!
llvm-svn: 41758
2007-09-07 04:06:50 +00:00
bed9dc423c
Next round of APFloat changes.
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Use APFloat in UpgradeParser and AsmParser.
Change all references to ConstantFP to use the
APFloat interface rather than double. Remove
the ConstantFP double interfaces.
Use APFloat functions for constant folding arithmetic
and comparisons.
(There are still way too many places APFloat is
just a wrapper around host float/double, but we're
getting there.)
llvm-svn: 41747
2007-09-06 18:13:44 +00:00
189df733ed
Fix a bug in X86InstrInfo::convertToThreeAddress that caused it to codegen:
...
leal (,%rcx,8), %rcx
It should be
leal (,%rcx,8), %ecx
llvm-svn: 41735
2007-09-06 00:14:41 +00:00
b65ef38590
LVXL and STVXL are also a load and store resp.
...
llvm-svn: 41733
2007-09-05 23:47:12 +00:00
b9bf812ba5
Add the 64-bit versions of the DS* Altivec instructions.
...
llvm-svn: 41717
2007-09-05 04:05:20 +00:00
4dbd9f254a
Fix for PR1613: added 64-bit rotate left PPC instructions and patterns.
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llvm-svn: 41711
2007-09-04 20:20:29 +00:00
623dd88775
Mac OS X X86-64 ABI is same as the standard.
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llvm-svn: 41700
2007-09-04 16:44:41 +00:00
50ab26e835
Reapply r41578 with proper fix
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llvm-svn: 41680
2007-09-03 00:36:06 +00:00
da7469f2b5
Revise per review of previous patch.
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llvm-svn: 41645
2007-08-31 17:03:33 +00:00
e636fc05d6
Initial support for calling functions with byval arguments on x86-64
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llvm-svn: 41643
2007-08-31 15:06:30 +00:00
bb8a5cff67
Align i64 and f64 at 8 byte on x86-64.
...
This is mandated table 3.1 at
http://www.x86-64.org/documentation/abi.pdf
llvm-svn: 41642
2007-08-31 12:23:58 +00:00
3cf889f75e
Enhance APFloat to retain bits of NaNs (fixes oggenc).
...
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.
llvm-svn: 41632
2007-08-31 04:03:46 +00:00
ab871baaf8
Instruction formats added used to generate multiply instructions of V5TE.
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llvm-svn: 41629
2007-08-30 23:34:14 +00:00
ff32b62942
Unused relocation type reloc_arm_absolute removed.
...
llvm-svn: 41628
2007-08-30 23:31:35 +00:00
1457b2b3b1
Comments added. It now generates V5TE multiply instructions. However, it is still necessary to model PUWLSH bits more clearly.
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llvm-svn: 41627
2007-08-30 23:29:26 +00:00
73489273ae
ARM instruction table was modified by adding information to generate multiply instruction of V5TE.
...
llvm-svn: 41626
2007-08-30 23:25:47 +00:00
ae1b924c79
JITInfo now resolves function addrs and also relocations. It always emits a stub.
...
llvm-svn: 41625
2007-08-30 23:21:27 +00:00
ebb8540067
Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses.
...
llvm-svn: 41599
2007-08-30 05:54:07 +00:00
9a25d98c86
Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots.
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llvm-svn: 41597
2007-08-30 05:52:20 +00:00
c2081fe573
Mark load instructions with isLoad = 1.
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llvm-svn: 41595
2007-08-30 05:49:43 +00:00
10e18dea2a
Use i64 on a PPC64 machine
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llvm-svn: 41590
2007-08-30 00:59:19 +00:00
d246b2ca5c
Change LegalFPImmediates to use APFloat.
...
Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.
llvm-svn: 41587
2007-08-30 00:23:21 +00:00
7741427a09
Move getX86RegNum into X86RegisterInfo and use it
...
in the trampoline lowering. Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.
llvm-svn: 41577
2007-08-29 19:01:20 +00:00
43318839c9
Added method to get Mips register numbers
...
Changed the stack frame layout, StackGrowsUp fits better to Mips strange stack.
Stack offset calculation bug fixed!
llvm-svn: 41529
2007-08-28 05:13:42 +00:00
14033fb5cb
Changed stack allocation On LowerFORMAL_ARGUMENTS.
...
Added comments about new stack allocation.
Expand SelectCC for i32 results
llvm-svn: 41527
2007-08-28 05:08:16 +00:00
cfd1638e2d
Mask directive completed with CalleeSave info
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Comments for Mips directives added.
llvm-svn: 41526
2007-08-28 05:06:17 +00:00
f55a785e56
Added methods to record SPOffsets from LowerFORMAL_ARGUMENTS
...
llvm-svn: 41525
2007-08-28 05:04:41 +00:00
b602461f48
Add a comment about using libc memset/memcpy or generating inline code.
...
llvm-svn: 41502
2007-08-27 17:48:26 +00:00
Dan Gohman