Commit Graph

288224 Commits

Author SHA1 Message Date
Faisal Vali 764216e1f9 [NFC] Make dependent parameter non-deducible, so that we are forced to use the default template parameter.
This might provide users with more graceful diagnostics if they should ever try and call this function with non-ConceptDecls.

llvm-svn: 330798
2018-04-25 03:54:20 +00:00
Craig Topper bba52806b1 [X86] Auto-generate complete checks. NFC
llvm-svn: 330797
2018-04-25 03:40:45 +00:00
Faisal Vali 699f45887f Fix rC330794 - a parameter that should have been dependent was inadvertently not -
and compiled in MSVC - but not so for the other bots.

The fix was to make it dependent as intended.

llvm-svn: 330796
2018-04-25 03:28:23 +00:00
Yaxun Liu 997e64f8a6 Fix lit test kernel-call.cu failure on ps4 due to dso_local
llvm-svn: 330795
2018-04-25 03:16:07 +00:00
Faisal Vali 936de9d666 [c++2a] [concepts] Add rudimentary parsing support for template concept declarations
This patch is a tweak of changyu's patch: https://reviews.llvm.org/D40381. It differs in that the recognition of the 'concept' token is moved into the machinery that recognizes declaration-specifiers - this allows us to leverage the attribute handling machinery more seamlessly.

See the test file to get a sense of the basic parsing that this patch supports. 

There is much more work to be done before concepts are usable...

Thanks Changyu!

llvm-svn: 330794
2018-04-25 02:42:26 +00:00
Yaxun Liu e21278d938 Fix failure in lit test kernel-call.cu
There is signext on ppc64. Just remove check for function argument.

llvm-svn: 330793
2018-04-25 02:34:04 +00:00
Geoff Berry 2af5f3c1e5 [DivRemPairs] Fix non-determinism in use list order.
Summary:
Use a MapVector instead of a DenseMap for RemMap since it is iteratated
over and the order of iteration can effect the order that new
instructions are created.  This can in turn effect the use list order of
div/rem input values if multiple new instructions are created that share
any input values.

Reviewers: spatel

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D45858

llvm-svn: 330792
2018-04-25 02:17:56 +00:00
Billy Robert O'Neal III 078611eed5 [libcxx] [test] Remove nonportable that errc::is_a_directory produces "Is a directory" from ios_base::failure tests
These io_error asserts that std::errc::is_a_directory has message "Is a directory". On MSVC++ it reports "is a directory" (with a lowercase I). That doesn't matter for the ios_failure component being tested, so just implement in terms of system_category().message().

Reviewed as https://reviews.llvm.org/D45715

llvm-svn: 330791
2018-04-25 01:58:55 +00:00
Yaxun Liu 887c569bcb [HIP] Add hip input kind and codegen for kernel launching
HIP is a language similar to CUDA (https://github.com/ROCm-Developer-Tools/HIP/blob/master/docs/markdown/hip_kernel_language.md ).
The language syntax is very similar, which allows a hip program to be compiled as a CUDA program by Clang. The main difference
is the host API. HIP has a set of vendor neutral host API which can be implemented on different platforms. Currently there is open source
implementation of HIP runtime on amdgpu target (https://github.com/ROCm-Developer-Tools/HIP).

This patch adds support of input kind and language standard hip.

When hip file is compiled, both LangOpts.CUDA and LangOpts.HIP is turned on. This allows compilation of hip program as CUDA
in most cases and only special handling of hip program is needed LangOpts.HIP is checked.

This patch also adds support of kernel launching of HIP program using HIP host API.

When -x hip is not specified, there is no behaviour change for CUDA.

Patch by Greg Rodgers.
Revised and lit test added by Yaxun Liu.

Differential Revision: https://reviews.llvm.org/D44984

llvm-svn: 330790
2018-04-25 01:10:37 +00:00
Richard Trieu 7282d320b7 [ODRHash] Hash template arguments of methods.
llvm-svn: 330789
2018-04-25 00:31:15 +00:00
Rafael Espindola 61376d9bed Bring r329960 back.
The fix is to copy Used when replacing the symbol.

Original message:

Do not keep shared symbols created from garbage-collected eliminated DSOs.

If all references to a DSO happen to be weak, and if the DSO is
specified with --as-needed, the DSO is not added to DT_NEEDED.
If that happens, we also need to eliminate shared symbols created
from the DSO. Otherwise, they become dangling references that point
to non-exsitent DSO.

Fixes https://bugs.llvm.org/show_bug.cgi?id=36991

Differential Revision: https://reviews.llvm.org/D45536

llvm-svn: 330788
2018-04-25 00:29:13 +00:00
Chandler Carruth 69e68f8468 [PM/LoopUnswitch] Begin teaching SimpleLoopUnswitch to use the new
update API for dominators rather than doing manual, hacky updates.

This is just the first step, but in some ways the most important as it
moves the non-trivial unswitching to update the domtree rather than
fully recalculating it each time.

Subsequent patches should remove the custom update logic used by the
trivial unswitch and replace it with uses of the update API.

This also fixes a number of bugs I was seeing when testing non-trivial
unswitch due to it querying the quasi-correct dominator tree. Now the
tree is 100% correct and safe to query. That said, there are still more
bugs I can see with non-trivial unswitch just running over the test
suite, so more bugfix patches are needed as well.

Thanks to both Sanjoy and Fedor for reviews and testing!

Differential Revision: https://reviews.llvm.org/D45943

llvm-svn: 330787
2018-04-25 00:18:07 +00:00
Bob Haarman 8832f88996 [COFF] create MemoryBuffers without requiring NUL terminators
Summary:
In a number of places in the COFF linker, we were calling
MemoryBuffer::getFile() with default parameters. This causes LLVM to
NUL-terminate the buffers, which can prevent them from being memory
mapped. Since we operate on binary and do not use NUL as an indicator
of the end of the file content, this change causes us to not require
the NUL terminator anymore.

Reviewers: ruiu, pcc

Reviewed By: ruiu

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45909

llvm-svn: 330786
2018-04-24 23:16:39 +00:00
Rui Ueyama ffa650a183 Style fix.
llvm-svn: 330785
2018-04-24 23:09:57 +00:00
Rafael Espindola a8d0b87f50 Add a test. NFC.
This would have found the issue in r329960.

llvm-svn: 330784
2018-04-24 23:03:58 +00:00
Jessica Paquette 4f56428de1 [MachineOutliner] Check for explicit uses of LR/W30 in MI operands
Before, the outliner would grab ADRPs that used LR/W30. This patch fixes
that by checking for explicit uses of those registers before the special-casing
for ADRPs.

This also adds a test that ensures that those sorts of ADRPs won't be outlined.

llvm-svn: 330783
2018-04-24 22:38:15 +00:00
Craig Topper f3cefad255 [DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
We were previously prefering ZEXTLOAD over EXTLOAD if it is legal. This triggers during X86's promotion of i16->i32. Not sure about other targets.

Using ZEXTLOAD can prevent folding it to SEXTLOAD later if we were to promote a sign extended operand like we would need for SRA. However, X86 doesn't currently promote i16 SRA. I was looking into doing that which is how I found this issue.

This is also blocking our ability to fold 4 byte aligned EXTLOADs with "loadi32". This is what caused most of the test changes here.

Differential Revision: https://reviews.llvm.org/D45585#inline-402825

llvm-svn: 330781
2018-04-24 22:35:27 +00:00
Dan Albert 07b0059083 Revert "[Driver] Android triples are not aliases for other triples."
Revering while I diagnose the failures.

This reverts commit 82dc3bf2157da280420f80e654292cb05e0dc5f7.

llvm-svn: 330780
2018-04-24 22:06:40 +00:00
Reid Kleckner 891c8fb753 Fix path separator checks on Windows
llvm-svn: 330779
2018-04-24 22:03:07 +00:00
Warren Ristow b960d2cb40 [X86] Account for partial stack slot spills (PR30821)
Previously, _any_ store or load instruction was considered to be
operating on a spill if it had a frameindex as an operand, and thus
was fair game for optimisations such as "StackSlotColoring". This
usually works, except on architectures where spills can be partially
restored, for example on X86 where a spilt vector can have a single
component loaded (zeroing the rest of the target register). This can be
mis-interpreted and the zero extension unsoundly eliminated, see
pr30821.

To avoid this, this commit optionally provides the caller to
isLoadFromStackSlot and isStoreToStackSlot with the number of bytes
spilt/loaded by the given instruction. Optimisations can then determine
that a full spill followed by a partial load (or vice versa), for
example, cannot necessarily be commuted.

Patch by Jeremy Morse!

Differential Revision: https://reviews.llvm.org/D44782

llvm-svn: 330778
2018-04-24 22:01:50 +00:00
Alexander Shaposhnikov b3bfd3b028 [llvm-objcopy] Adjust the help message
Capitalize the first letter, 
make the text a bit more consistent.
NFC.

Differential revision: https://reviews.llvm.org/D46025

llvm-svn: 330777
2018-04-24 21:44:13 +00:00
Reid Kleckner 5176039795 Bring back APInt self-move assignment check for MSVC only
Summary:
It was removed about a year ago in r300477. Bring it back, along with
its unittest, when the MSVC STL is in use. The MSVC STL performs
self-assignment in std::shuffle. These days, llvm::sort calls
std::shuffle when expensive checks are enabled to help find
non-determinism bugs.

Reviewers: craig.topper, chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46028

llvm-svn: 330776
2018-04-24 21:41:50 +00:00
Tom Stellard a2be8f4c35 AMDGPU: Remove deprecated llvm.AMDGPU.kilp intrinsic
Summary: This is no longer used by mesa since its 18.0.0 release.

Reviewers: nhaehnle

Reviewed By: nhaehnle

Subscribers: arsenm, kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D45988

llvm-svn: 330775
2018-04-24 21:37:57 +00:00
Tom Stellard 257882ff72 AMDGPU/GlobalISel: Fall-back to SelectionDAG for non-void functions
Reviewers: arsenm, nhaehnle

Reviewed By: nhaehnle

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45843

llvm-svn: 330774
2018-04-24 21:29:36 +00:00
Mandeep Singh Grang 434d4c0b88 [docs] Add a note on non-deterministic sorting order of equal elements
Reviewers: RKSimon, t.p.northover, dexonsmith

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45831

llvm-svn: 330773
2018-04-24 21:25:57 +00:00
Jonathan Coe b9b3a62727 [clang-tidy] Improve bugprone-unused-return-value check
Summary:
Add support for checking class template member functions.

Also add the following functions to be checked by default:

- std::unique_ptr::release
- std::basic_string::empty
- std::vector::empty

Reviewers: alexfh, hokein, aaron.ballman, ilya-biryukov

Reviewed By: aaron.ballman

Subscribers: jbcoe, xazax.hun, cfe-commits

Tags: #clang-tools-extra

Differential Revision: https://reviews.llvm.org/D45891

Patch by khuttun (Kalle Huttunen)

llvm-svn: 330772
2018-04-24 21:25:16 +00:00
Roman Lebedev 54df09e8fe [X86][AArch64][NFC] Add tests for masked merge unfolding with %y = const
The fold was added in D45733.

This appears to be a regression.

llvm-svn: 330771
2018-04-24 21:23:22 +00:00
Dan Albert 2368aed43c [Driver] Android triples are not aliases for other triples.
Summary:
Android targets should never use tools/libraries for non-Android
targets or vice versa.

Reviewers: srhines, george.burgess.iv, eugenis

Reviewed By: eugenis

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D45597

llvm-svn: 330770
2018-04-24 21:18:37 +00:00
Daniel Neilson 3c148720fa [CaptureTracking] Fixup const correctness of DomTree arg (NFC)
Summary:
The PointerMayBeCapturedBefore function's DomTree arg should be
const instead of non-const. There are no non-const uses of it
in the function.

llvm-svn: 330769
2018-04-24 21:12:45 +00:00
Sanjay Patel 54795bb16b [InstCombine] move tests for select with bit-test of condition; NFC
These are all but 1 of the select-of-constant tests that appear 
to be transformed within foldSelectICmpAnd() and the block above 
it predicated by decomposeBitTestICmp().

As discussed in D45862 (and can be seen in several tests here),
we probably want to stop doing those transforms because they
can increase the instruction count without benefitting other
passes or codegen.

The 1 test not included here is a urem test where the bit hackery
allows us to remove a urem. To preserve killing that urem, we 
should do some stronger known-bits analysis or pattern matching of 
'urem x, (select-of-pow2-constants)'.

llvm-svn: 330768
2018-04-24 21:06:06 +00:00
Tom Stellard c7709e1c29 AMDGPU/GlobalISel: Add support for amdgpu_ps calling convention
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45837

llvm-svn: 330767
2018-04-24 20:51:28 +00:00
Artem Dergachev a4e557f908 [analyzer] Add support for the note diagnostic pieces to plist output format.
Note diagnostic pieces are an additional way of highlighting code sections to
the user. They aren't part of the normal path diagnostic sequence. They can
also be attached to path-insensitive reports.

Notes are already supported by the text output and scan-build.

Expanding our machine-readable plist output format to be able to represent notes
opens up the possibility for various analyzer GUIs to pick them up.

Patch by Umann Kristóf!

Differential Revision: https://reviews.llvm.org/D45407

llvm-svn: 330766
2018-04-24 20:45:48 +00:00
Richard Smith c1aaf8ebb7 Remove 'noexcept's that do not match between header and source file.
This code is ill-formed, but under -fno-exceptions compilers generally accept it (at least, prior to C++17). This allows this code to be built by Clang in C++17 mode.

llvm-svn: 330765
2018-04-24 20:33:37 +00:00
Chandler Carruth 7e1c3345a0 [wasm] Fix uninitialized memory introduced in r330749.
Found with MSan. This was causing all the WASM MC tests to fail about
10% of the time.

llvm-svn: 330764
2018-04-24 20:30:56 +00:00
Rafael Espindola b71251ca71 [bugpoint] Fix crash when testing for miscompilation.
Method BugDriver::performFinalCleanups(...) would delete Module object
it worked on, which was also deleted by its caller
(e.g. TestCodeGenerator(...)). Changed the code to avoid double delete
and make Module ownership slightly clearer.

Patch by Andrzej Janik.

llvm-svn: 330763
2018-04-24 20:15:27 +00:00
Sam McCall bdc0fe55d1 [Support] fix countLeadingZeros for types shorter than int
llvm-svn: 330762
2018-04-24 20:08:05 +00:00
Shoaib Meenai f2650df77d [cmake] Fix libc++ detection
-stdlib=libc++ is added to both the compilation and the link flags, but
the logic for adding it was only checking if it was supported during
compilation and not linking. This could lead to false positives, for
example when using clang with libstdc++ (where the compiler would
support -stdlib=libc++ but then linking would fail because of libc++
actually being unavailable).

llvm-svn: 330761
2018-04-24 19:47:39 +00:00
Simon Pilgrim c4d25a2922 [X86][SKX] Setup WriteFMul and remove unnecessary InstRW scheduler overrides.
llvm-svn: 330760
2018-04-24 19:22:01 +00:00
Aaron Ballman 93c6ba1d9d Improve -Warray-bounds to handle multiple array extents rather than only handling the top-most array extent.
Patch by Bevin Hansson.

llvm-svn: 330759
2018-04-24 19:21:04 +00:00
Vedant Kumar 4ce143088c [test] Update llc checks for CodeGen/X86/avg.ll
The output of update_llc_test_checks.py on this test file has changed,
so the test file should be updated to minimize source changes in future
patches.

The test updates for this file appear to be limited to relaxations of
the form:

  -; SSE2-NEXT:    movq %rdi, -{{[0-9]+}}(%rsp) # 8-byte Spill
  +; SSE2-NEXT:    movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill

This was suggested in https://reviews.llvm.org/D45995.

llvm-svn: 330758
2018-04-24 19:20:18 +00:00
Andrea Di Biagio ba625f0a86 [llvm-mca] Remove unused flag -verbose. NFC
I forgot to remove it at r329794.

llvm-svn: 330757
2018-04-24 19:14:56 +00:00
Simon Pilgrim 27bc83e228 [X86] Split off PHMINPOSUW to their own schedule class
This also fixes Jaguar's schedule which was treating it as the WriteVecIMul default. 

llvm-svn: 330756
2018-04-24 18:49:25 +00:00
Joel E. Denny 8a475307bd [lit] Report line number for failed RUN command
When debugging test failures with -vv (or -v in the case of the
internal shell), this makes it easier to locate the RUN line that
failed.  For example, clang's test/Driver/linux-ld.c has 892 total RUN
lines, and clang's test/Driver/arm-cortex-cpus.c has 424 RUN lines
after concatenation for line continuations.

When reading the generated shell script, this also makes it easier to
locate the RUN line that produced each command.

To support reporting RUN line numbers in the case of the internal
shell, this patch extends the internal shell to support the null
command, ":", except pipelines are not supported.

Reviewed By: asmith, delcypher

Differential Revision: https://reviews.llvm.org/D44598

llvm-svn: 330755
2018-04-24 18:43:25 +00:00
Benjamin Kramer 080436fd0f [clangd] Commit a heinous crime to make test hermetic and not depend on the standard library being around.
llvm-svn: 330754
2018-04-24 18:40:44 +00:00
Artem Belevich 3cce307799 [CUDA] Enable CUDA compilation with CUDA-9.2
Differential Revision: https://reviews.llvm.org/D45827

llvm-svn: 330753
2018-04-24 18:23:19 +00:00
Stanislav Mekhanoshin a4bfb3c446 [AMDGPU] Truncate packed inline constant
If a packed inline constant is sign extended it must be truncated
after the shift. I.e. a constant (0xH0000, 0xHBC00), will be represented
as 0xFFFFFFFFBC000000 in the IR because the immediate is sign extended
to 64 bit. After the value shifted right by 16 to use it in a low part
with op_sel_hi it becomes 0xFFFFFFFFBC00 and does not qualify as inline
constant any longer.

Fixed the error and added verification code. Without the fix and with
the verification bug is causing pk_max_f16_literal.ll to fail.

Differential Revision: https://reviews.llvm.org/D45987

llvm-svn: 330752
2018-04-24 18:17:55 +00:00
Simon Pilgrim 81cb67ad82 [XOP] v4i32 IFMA 'VPMACS' instructions should use the WritePMULLD schedule class
llvm-svn: 330751
2018-04-24 18:13:57 +00:00
Sam Clegg 1bfdabacfe [WebAssembly] Match llvm-side change to reloc section header
Differential Revision: https://reviews.llvm.org/D45795

llvm-svn: 330750
2018-04-24 18:11:47 +00:00
Sam Clegg 6f08c84ae5 [WebAssembly] Use section index in relocation section header
Rather than referring to sections my their code, use the
absolute index of the target section within the module.

See https://github.com/WebAssembly/tool-conventions/issues/52

Differential Revision: https://reviews.llvm.org/D45980

llvm-svn: 330749
2018-04-24 18:11:36 +00:00
Florian Hahn 97ae30b8d6 [LoopInterchange] Add REQUIRES: asserts to test.
llvm-svn: 330748
2018-04-24 18:10:52 +00:00