dfa9dbceaa
Add -sse[,2,3] arguments to LLC
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llvm-svn: 16018
2004-08-24 08:18:44 +00:00
1d088db15e
Disable the pattern isel
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llvm-svn: 15787
2004-08-15 23:02:17 +00:00
8d06c43f01
Remove some (LARGE) abandoned code for the release. If this is ever needed
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again in the future, it can be resurrected out of CVS
llvm-svn: 15112
2004-07-22 21:30:35 +00:00
de647007d3
Tablgen files for really simple instruction selector
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llvm-svn: 12714
2004-04-06 19:34:00 +00:00
5d236005b0
Clean up a lot of the code I added yesterday by exposing the IntrinsicLowering
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implementation from the TargetMachine directly.
llvm-svn: 10636
2003-12-28 21:23:38 +00:00
c45a033b42
implement support for the intrinsic lowering functionality
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llvm-svn: 10629
2003-12-28 09:47:19 +00:00
904cd6d48c
Add a floating point killer pass. This pass runs before register
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allocaton on the X86 to add information to the machine code denoting
that our floating point stackifier cannot handle virtual point
register that are alive across basic blocks. This pass adds an
implicit def of all virtual floating point register at the end of each
basic block.
llvm-svn: 10446
2003-12-13 05:36:22 +00:00
6d760d7cb3
Add an option to enable the SSA based peephole optimizer.
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Eventually this pass will provide substantially better code in the interim between when we
have a crappy isel and nice isel. Unfortunately doing so requires fixing the backend to
actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE
pass for machine code. Each of these is a fairly substantial job, so this will remain disabled
for the immediate future. :(
llvm-svn: 10276
2003-12-01 05:18:30 +00:00
960707c335
Put all LLVM code into the llvm namespace, as per bug 109.
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llvm-svn: 9903
2003-11-11 22:41:34 +00:00
29265fe981
Added LLVM copyright header.
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llvm-svn: 9321
2003-10-21 15:17:13 +00:00
1a6f2b83ab
Factory methods for FunctionPasses now return type FunctionPass *.
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Correct one of the functions' comments.
llvm-svn: 7816
2003-08-13 18:15:29 +00:00
e61db425e8
Add support for a pattern matching instruction selector. This is still in
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the early implementation phases, so it is disabled by default
llvm-svn: 7719
2003-08-11 14:59:22 +00:00
bb8bdc04a7
Start using tablegen'd instruction enum list
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llvm-svn: 7542
2003-08-03 21:57:05 +00:00
8b31688bb1
Switch over to tablegen generated header files
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llvm-svn: 7512
2003-08-03 15:48:55 +00:00
a2e2f5cc45
Rename function to be more consistent with filename
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llvm-svn: 7352
2003-07-26 23:49:58 +00:00
a92dce471b
Printer.cpp: Ditch addRequired/getAnalysis, because they leave
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Printer::doFinalization() out in the cold. Now we pass in a TargetMachine
to Printer's constructor and get the TargetData from the TargetMachine.
Don't pass TargetMachine or MRegisterInfo objects around in the Printer.
Constify TargetData references.
X86.h: Update comment and prototype of createX86CodePrinterPass().
X86TargetMachine.cpp: Update callers of createX86CodePrinterPass().
llvm-svn: 7275
2003-07-23 20:25:08 +00:00
0addbab5e2
Add namespace comments for doxygen
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llvm-svn: 6581
2003-06-03 15:31:23 +00:00
61e1195e89
Move passes out to Passes.h
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llvm-svn: 5227
2003-01-13 00:45:29 +00:00
4937643df9
* Most pass ctor functions don't take TM arguments anymore
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* New createPrologEpilogCodeInserter() function
llvm-svn: 5181
2002-12-28 20:26:16 +00:00
d44d25323d
Try #2 to get alias set stuff to work
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llvm-svn: 5077
2002-12-16 16:14:51 +00:00
36d6f4a303
Add info about register aliases, add prototype for createLocalRegisterAllocator
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llvm-svn: 5075
2002-12-16 15:55:51 +00:00
0b9f0b5faf
Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator
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llvm-svn: 5071
2002-12-16 14:38:13 +00:00
0d80874f6c
* Move information about Implicit Defs/Uses into X86InstrInfo.def.
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* Expose information about implicit defs/uses of register through the
MachineInstrInfo.h file.
llvm-svn: 4877
2002-12-03 05:42:53 +00:00
0018e8d5fc
Start to add more information to instr.def
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llvm-svn: 4741
2002-11-18 05:37:11 +00:00
02a3d837c2
Convert backend to use passes, implement X86TargetMachine
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llvm-svn: 4421
2002-10-29 22:37:54 +00:00
27d247978b
Rename X86InstructionInfo to X86InstrInfo
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llvm-svn: 4413
2002-10-29 21:05:24 +00:00
6c3f9c1b8f
Be compatible with sparc backend
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llvm-svn: 4395
2002-10-29 17:43:38 +00:00
1303f2f057
Initial stab at MachineInstr'ication
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llvm-svn: 4367
2002-10-28 23:55:19 +00:00
d92fb0058b
Initial checkin of X86 backend.
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We can instruction select exactly one instruction 'ret void'. Wow.
llvm-svn: 4284
2002-10-25 22:55:53 +00:00
Chris Lattner