Commit Graph

270637 Commits

Author SHA1 Message Date
Sanjay Patel e6b48a1b02 [InstCombine] improve demanded vector elements analysis of insertelement
Recurse instead of returning on the first found optimization. Also, return early in the caller
instead of continuing because that allows another round of simplification before we might
potentially lose undef information from a shuffle mask by eliminating the shuffle.

As noted in the review, we could probably do better and be more efficient by moving all of
demanded elements into a separate pass, but this is yet another quick fix to instcombine.

Differential Revision: https://reviews.llvm.org/D37236

llvm-svn: 312248
2017-08-31 15:57:17 +00:00
Reid Kleckner 08f5fd51cc [codeview] Generalize DIExpression parsing to handle load chains
Summary:
Hopefully this also clarifies exactly when and why we're rewriting
certiain S_LOCALs using reference types: We're using the reference type
to stand in for a zero-offset load.

Reviewers: inglorion

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D37309

llvm-svn: 312247
2017-08-31 15:56:49 +00:00
Alex Lorenz 341317fda4 Revert r312240
The buildbots have shown that -Wstrict-prototypes behaves differently in GCC
and Clang so we should keep it disabled until Clang follows GCC's behaviour

llvm-svn: 312246
2017-08-31 15:51:23 +00:00
Konstantin Zhuravlyov fafad15b90 Update test:
- REQUIRES: x86_64-linux -> REQUIRES: shell

Differential Revision: https://reviews.llvm.org/D37316

llvm-svn: 312245
2017-08-31 15:35:33 +00:00
Saleem Abdulrasool 0a322c6c81 Driver: extract ARCMT flag construction (NFC)
Extract the ARC migration tool flag handling into its own function.
This simplifies the flow of the clang frontend command line construction
function.  NFC.

llvm-svn: 312244
2017-08-31 15:35:01 +00:00
Daniel Jasper c0a976d417 Revert r311525: "[XRay][CodeGen] Use PIC-friendly code in XRay sleds; remove synthetic references in .text"
Breaks builds internally. Will forward repo instructions to author.

llvm-svn: 312243
2017-08-31 15:17:17 +00:00
Dinar Temirbulatov 8870a14e4e [SLPVectorizer] Move out Entry->NeedToGather check and assert of inner loop as invariant, NFCI.
llvm-svn: 312242
2017-08-31 14:10:07 +00:00
Yael Tsafrir 185c81725e [X86] Added run line to intrinsics upgrade test. NFC.
llvm-svn: 312241
2017-08-31 13:56:22 +00:00
Alex Lorenz fbac1ae062 Build LLVM with -Wstrict-prototypes enabled
Clang 5 supports -Wstrict-prototypes. We should use it to catch any C
declarations that declare a non-prototype function.

rdar://33705313

Differential Revision: https://reviews.llvm.org/D36669

llvm-svn: 312240
2017-08-31 13:23:24 +00:00
Siddharth Bhat 56572c6a5e [PPCGCodeGen] Convert intrinsics to libdevice functions whenever possible.
This is useful when we face certain intrinsics such as `llvm.exp.*`
which cannot be lowered by the NVPTX backend while other intrinsics can.

So, we would need to keep blacklists of intrinsics that cannot be
handled by the NVPTX backend. It is much simpler to try and promote
all intrinsics to libdevice versions.

This patch makes function/intrinsic very uniform, and will always try to use
a libdevice version if it exists.

Differential Revision: https://reviews.llvm.org/D37056

llvm-svn: 312239
2017-08-31 13:03:37 +00:00
Benjamin Kramer 80df642395 [BinaryFormat] Fix out of bounds read.
Found by OSS-FUZZ!
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=3220

llvm-svn: 312238
2017-08-31 12:50:42 +00:00
Ashutosh Nema bfcac0b480 AMD family 17h (znver1) scheduler model update.
Summary:
This patch enables the following:
1) Regex based Instruction itineraries for integer instructions.
2) The instructions are grouped as per the nature of the instructions
   (move, arithmetic, logic, Misc, Control Transfer). 
3) FP instructions and their itineraries are added which includes values
   for SSE4A, BMI, BMI2 and SHA instructions.

Patch by Ganesh Gopalasubramanian

Reviewers: RKSimon, craig.topper

Subscribers: vprasad, shivaram, ddibyend, andreadb, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D36617

llvm-svn: 312237
2017-08-31 12:38:35 +00:00
Alex Bradbury 23a86ea4b4 [Docs] Update CodingStandards to recommend range-based for loops
The CodingStandards section on avoiding the re-evaluation of end() hasn't been
updated since range-based for loops were adopted in the LLVM codebase. This
patch adds a very brief section that documents how range-based for loops
should be used wherever possible. It also moves example code in
CodingStandards to use range-based for loops and auto when appropriate.

Differential Revision: https://reviews.llvm.org/D37264

llvm-svn: 312236
2017-08-31 12:34:20 +00:00
Benjamin Kramer cbc7ee45f9 [Object] Verify object sizes before handing out StringRefs pointing out
of bounds.

This can only happen on corrupt input. Found by OSS-FUZZ!
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=3228

llvm-svn: 312235
2017-08-31 12:27:10 +00:00
Igor Breger 42f8bfc056 [GlobalISel][X86] Refactor X86LegalizerInfo. NFC.
llvm-svn: 312234
2017-08-31 11:40:03 +00:00
George Rimar b08c249a4b [ELF] - Removed unused dummy methods. NFC.
llvm-svn: 312233
2017-08-31 11:05:38 +00:00
Dmitry Vyukov 7097b4d22d docs: don't say that data flow tracing interface is unstable
We are starting to use data flow tracing in kernel.
The interface is not subject to change anymore.

Reviewed in https://reviews.llvm.org/D37303

llvm-svn: 312232
2017-08-31 11:02:44 +00:00
George Rimar b2051f176c [ELF] - Fix comment. NFC.
llvm-svn: 312231
2017-08-31 10:14:10 +00:00
Martin Storsjo 376cce2ec8 [cmake] Fix the list of arm32 architectures
This was accidentally changed in SVN r311924, which was only
supposed to change the behaviour for x86.

llvm-svn: 312230
2017-08-31 10:01:36 +00:00
Martin Storsjo 7bfb697259 Revert r312224: "[ItaniumCXXABI] Always use linkonce_odr linkage for RTTI data on MinGW"
Breaks on buildbot:
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/4548/steps/test-check-all/logs/stdio

The test in CodeGenCXX/virt-dtor-key.cpp tests using %itanium_abi_triple;
on non-windows platforms, this resolves to the current platform triple
(where there was no behaviour change), while on windows, it resolves to
a mingw triple (where the behaviour was intentionally changed).

llvm-svn: 312229
2017-08-31 09:46:27 +00:00
Sam Parker 5f9346471c [AArch64] v8.3-a complex number support
New instructions are added to AArch32 and AArch64 to aid
floating-point multiplication and addition of complex numbers,
where the complex numbers are packed in a vector register as a
pair of elements. The Imaginary part of the number is placed in the
more significant element, and the Real part of the number is placed
in the less significant element.

Differential Revision: https://reviews.llvm.org/D36792

llvm-svn: 312228
2017-08-31 09:27:04 +00:00
Sean Eveson e15300ecf5 [llvm-cov] Read in function names for filtering from a text file.
Summary: Add a -name-whitelist option, which behaves in the same way as -name, but it reads in multiple function names from the given input file(s).

Reviewers: vsk

Reviewed By: vsk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D37111

llvm-svn: 312227
2017-08-31 09:11:31 +00:00
Sam Parker b036757f3d [ARM] Reverse PostRASched subtarget feature logic
Replace the UsePostRAScheduler SubtargetFeature with
DisablePostRAScheduler, which is then used by Swift and Cyclone.
This patch maintains enabling PostRA scheduling for other Thumb2
capable cores and/or for functions which are being compiled in Arm
mode.

Differential Revision: https://reviews.llvm.org/D37055

llvm-svn: 312226
2017-08-31 08:57:51 +00:00
Sam Parker a42d8a9164 [AArch64] IDSAR6 register assembler support
The IDSAR6 system register has been introduced to identify the
v8.3-a Javascript data type conversion and v8.2-a dot product
support.

Differential Revision: https://reviews.llvm.org/D37068

llvm-svn: 312225
2017-08-31 08:36:45 +00:00
Martin Storsjo cd7d552e04 [ItaniumCXXABI] Always use linkonce_odr linkage for RTTI data on MinGW
This fixes cases where dynamic classes produced RTTI data with
external linkage, producing linker errors about duplicate symbols.

This touches code close to what was changed in SVN r244266, but
this change doesn't break the tests added in that revision.

Differential revision: https://reviews.llvm.org/D37206

llvm-svn: 312224
2017-08-31 08:29:59 +00:00
Martin Storsjo 865d01a3cf [AArch64] Support COFF linker directives
This is similar to what was done for ARM in SVN r269574; the code
and the test are straight copypaste to the corresponding AArch64
code and test directory.

Differential revision: https://reviews.llvm.org/D37204

llvm-svn: 312223
2017-08-31 08:28:48 +00:00
Raphael Isemann 70686a1590 [analyzer] Performance optimizations for the CloneChecker
Summary:
This patch  aims at optimizing the CloneChecker for larger programs. Before this
patch we took around 102 seconds to analyze sqlite3 with a complexity value of
50. After this patch we now take 2.1 seconds to analyze sqlite3.

The biggest performance optimization is that we now put the constraint for group
size before the constraint for the complexity. The group size constraint is much
faster in comparison to the complexity constraint as it only does a simple
integer comparison. The complexity constraint on the other hand actually
traverses each Stmt and even checks the macro stack, so it is obviously not able
to handle larger amounts of incoming clones. The new order filters out all the
single-clone groups that the type II constraint generates in a faster way before
passing the fewer remaining clones to the complexity constraint. This reduced
runtime by around 95%.

The other change is that we also delay the verification part of the type II
clones back in the chain of constraints. This required to split up the
constraint into two parts - a verification and a hash constraint (which is also
making it more similar to the original design of the clone detection algorithm).
The reasoning for this is the same as before: The verification constraint has to
traverse many statements and shouldn't be at the start of the constraint chain.
However, as the type II hashing has to be the first step in our algorithm, we
have no other choice but split this constrain into two different ones. Now our
group size and complexity constrains filter out a chunk of the clones before
they reach the slow verification step, which reduces the runtime by around 8%.

I also kept the full type II constraint around - that now just calls it's two
sub-constraints - in case someone doesn't care about the performance benefits
of doing this.

Reviewers: NoQ

Reviewed By: NoQ

Subscribers: klimek, v.g.vassilev, xazax.hun, cfe-commits

Differential Revision: https://reviews.llvm.org/D34182

llvm-svn: 312222
2017-08-31 07:10:46 +00:00
Max Kazantsev 0a9c1ef2eb [IRCE] Identify loops with latch comparison against current IV value
Current implementation of parseLoopStructure interprets the latch comparison as a
comarison against `iv.next`. If the actual comparison is made against the `iv` current value
then the loop may be rejected, because this misinterpretation leads to incorrect evaluation
of the latch start value.

This patch teaches the IRCE to distinguish this kind of loops and perform the optimization
for them. Now we use `IndVarBase` variable which can be either next or current value of the
induction variable (previously we used `IndVarNext` which was always the value on next iteration).

Differential Revision: https://reviews.llvm.org/D36215

llvm-svn: 312221
2017-08-31 07:04:20 +00:00
Boris Kolpackov d30446fd77 [modules] Add ability to specify module name to module file mapping (reapply)
Extend the -fmodule-file option to support the [<name>=]<file> value format.
If the name is omitted, then the old semantics is preserved (the module file
is loaded whether needed or not). If the name is specified, then the mapping
is treated as just another prebuilt module search mechanism, similar to
-fprebuilt-module-path, and the module file is only loaded if actually used
(e.g., via import). With one exception: this mapping also overrides module
file references embedded in other modules (which can be useful if module files
are moved/renamed as often happens during remote compilation).

This override semantics requires some extra work: we now store the module name
in addition to the file name in the serialized AST representation.

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D35020

llvm-svn: 312220
2017-08-31 06:26:43 +00:00
Daniel Jasper b8198f02e6 Revert r312194: "[MachineOutliner] Add missed optimization remarks for the outliner."
Breaks on buildbot:
http://bb.pgr.jp/builders/test-llvm-i686-linux-RA/builds/6026/steps/test_llvm/logs/LLVM%20%3A%3A%20CodeGen__AArch64__machine-outliner-remarks.ll

llvm-svn: 312219
2017-08-31 06:22:35 +00:00
Nico Weber 0b981ec419 Remove accidental newline.
llvm-svn: 312218
2017-08-31 06:18:26 +00:00
Boris Kolpackov b83213e1c9 Fix path regex in test to match on Windows
llvm-svn: 312217
2017-08-31 06:18:08 +00:00
Nico Weber bf2260ca62 Suppress -Wdelete-non-virtual-dtor warnings about classes defined in system headers.
r312167 made it so that we emit Wdelete-non-virtual-dtor from delete statements
that are in system headers (e.g. std::unique_ptr). That works great on Linux
and macOS, but on Windows there are non-final classes that are defined in
system headers that have virtual methods but non-virtual destructors and yet
get deleted through a base class pointer (e.g. ATL::CAccessToken::CRevert). So
paddle back a bit and don't emit the warning if it's about a class defined in a
system header.

https://reviews.llvm.org/D37324

llvm-svn: 312216
2017-08-31 06:17:08 +00:00
Max Kazantsev a22742be5a [IRCE][NFC] Rename IndVarNext to IndVarBase
Renaming as a preparation step to generalizing IRCE for comparison not only against
the next value of an indvar, but also against the current.

Differential Revision: https://reviews.llvm.org/D36509

llvm-svn: 312215
2017-08-31 05:58:15 +00:00
Eric Christopher e42ac21499 Temporarily revert "Update branch coalescing to be a PowerPC specific pass"
From comments and code review it wasn't intended to be enabled by default yet.

This reverts commit r311588.

llvm-svn: 312214
2017-08-31 05:56:16 +00:00
Matt Arsenault 376f1bd73c AMDGPU: Don't assert in TTI with fp32 denorms enabled
Also refine for f16 and rcp cases.

llvm-svn: 312213
2017-08-31 05:47:00 +00:00
Vitaly Buka 285f265c09 Revert "llvm-mt: Fix release of OutputDoc"
Multiple bots are broken.

This reverts commit r312207.

llvm-svn: 312212
2017-08-31 05:32:36 +00:00
Tobias Grosser c43d0360cc [BlockGenerator] Generate entry block of regions from instruction lists
The adds code generation support for the previous commit.

This patch has been re-applied, after the memory issue in the previous patch
has been fixed.

llvm-svn: 312211
2017-08-31 03:17:35 +00:00
Tobias Grosser bd15d13d4e [ScopInfo] Use statement lists for entry blocks of region statements
By using statement lists in the entry blocks of region statements, instruction
level analyses also work on region statements.

We currently only model the entry block of a region statements, as this is
sufficient for most transformations the known-passes currently execute. Modeling
instructions in the presence of control flow (e.g. infinite loops) is left
out to not increase code complexity too much. It can be added when good use
cases are found.

This change set is reapplied, after a memory corruption issue had been fixed.

llvm-svn: 312210
2017-08-31 03:15:56 +00:00
Tobias Grosser d3edc16416 Revert "[ScopInfo] Use statement lists for entry blocks of region statements"
This reverts commit r312128. It aused some memory issues.

llvm-svn: 312209
2017-08-31 02:43:49 +00:00
Tobias Grosser 6f1f5cbb5b Revert "[BlockGenerator] Generate entry block of regions from instruction lists"
This reverts commit r312129. It caused some memory issues.

llvm-svn: 312208
2017-08-31 02:43:27 +00:00
Vitaly Buka a5fa6308da llvm-mt: Fix release of OutputDoc
Summary:
xmlDoc needs to be released with xmlFreeDoc.
Reset root element before release to avoid release of CombinedRoot owned
by CombinedDoc,

Reviewers: ecbeckmann, rnk, zturner, ruiu

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D37321

llvm-svn: 312207
2017-08-31 02:38:58 +00:00
Matt Arsenault 67e72dee79 AMDGPU: Use set for tracked registers
The majority of the time spent in the pass checking
for the register reads. Rather than searching all of
the defined registers for uses in each instruction,
use a set of defined registers and check the operands
of the instruction.

This process still is algorithmically not great,
but with the additional trick of skipping the analysis
for addresses with one use, this brings one slow
testcase into a reasonable range.

llvm-svn: 312206
2017-08-31 01:53:09 +00:00
Lang Hames 1aad27e17b [Orc] Add a comment about member variable dependencies to OrcMCJITReplacement.
The comment explains the reason behind the change in member variable order in
r312086.

Thanks to Philip Reames for the suggestion.

llvm-svn: 312205
2017-08-31 01:09:56 +00:00
Dean Michael Berris 415f15c5e2 [XRay][tools] Fix an accounting bug in llvm-xray account
Summary:
Before this patch, llvm-xray account will assume that thread stacks will
not be empty. Unfortunately there are cases where an instrumented
function will see a call to `fork()` which will cause the child process
to not see the start of the function, but only see the end of the
function. The tooling cannot assume that threads will always have
perfect stacks, and so we change it to support this reality.

Reviewers: dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31870

llvm-svn: 312204
2017-08-31 01:07:24 +00:00
Evgeniy Stepanov 84614f851c [ubsan] Give ubsan-minimal lit test suite a name.
Otherwise llvm-lit -v prints this:
PASS: <unnamed> :: TestCases/recover-dedup-limit.cpp (1 of 3)
PASS: <unnamed> :: TestCases/recover-dedup.cpp (2 of 3)
PASS: <unnamed> :: TestCases/uadd-overflow.cpp (3 of 3)

llvm-svn: 312203
2017-08-31 00:54:10 +00:00
Dean Michael Berris 1704f6289a [XRay][compiler-rt] Enable the XRay compiler-rt unit tests.
Summary:
Before this change we seemed to not be running the unit tests, and therefore we
set out to run them. In the process of making this happen we found a divergence
between the implementation and the tests.

This includes changes to both the CMake files as well as the implementation and
headers of the XRay runtime. We've also updated documentation on the changed
functions.

Reviewers: kpw, eizan

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D37290

llvm-svn: 312202
2017-08-31 00:50:12 +00:00
Justin Bogner 5204717208 cmake: Invent add_llvm_fuzzer to set up fuzzer targets
This moves the cmake configuration for fuzzers in LLVM to a new macro,
add_llvm_fuzzer. This will make it easier to keep things consistent
while implementing llvm.org/pr34314.

I've also made a couple of minor functional changes here:

- the fuzzers now use add_llvm_executable rather than add_llvm_tool.
  This means they won't create install targets and stuff like that,
  because those made little sense for these fuzzers.
- I've grouped these under "Fuzzers" rather than in with "Tools" for
  people who build with IDEs.

llvm-svn: 312200
2017-08-31 00:36:33 +00:00
Adrian Prantl 28454efc67 Revert "Revert r312139 "Verifier: Verify the correctness of fragment expressions attached to globals.""
This reverts commit r312182 after fixing PR34390.

llvm-svn: 312197
2017-08-31 00:07:33 +00:00
Adrian Prantl 504b82d44b Don't add a fragment expression when GlobalSRA splits up a single-member struct
Fixes PR34390.

https://bugs.llvm.org/show_bug.cgi?id=34390

llvm-svn: 312196
2017-08-31 00:06:18 +00:00