3b46030375
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
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MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
llvm-svn: 53212
2008-07-07 23:14:23 +00:00
ad6b3a6ed2
Fix longstanding thinko: don't exclude
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predessors of exit blocks from tail merging
consideration.
llvm-svn: 52985
2008-07-01 21:50:14 +00:00
fb19f9402b
Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
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the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
llvm-svn: 52943
2008-07-01 00:05:16 +00:00
6f880690b8
Use the transferSuccessors helper function.
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llvm-svn: 52495
2008-06-19 17:22:29 +00:00
b28a17c346
Rewrite a loop to avoid using iterators pointing to
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elements that have been erased. Based on a patch
by Nicolas Capens.
llvm-svn: 51485
2008-05-23 17:19:02 +00:00
d78c400b5b
Clean up the use of static and anonymous namespaces. This turned up
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several things that were neither in an anonymous namespace nor static
but not intended to be global.
llvm-svn: 51017
2008-05-13 00:00:25 +00:00
9d29283fc7
Be more aggressive about tail-merging small blocks
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if those blocks consist entirely of common instructions;
merging will not add an extra branch in this case.
llvm-svn: 51006
2008-05-12 22:53:12 +00:00
c4c4d8e1f7
Further rework of tail merge algorithm. Not quite
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semantically identical, but little difference in
either results or execution speed; but it's much
easier to read, at least IMO.
llvm-svn: 50999
2008-05-12 20:33:57 +00:00
66da8b5334
Remove an evil vector bool. Cosmetic refactoring,
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no functional change.
llvm-svn: 50921
2008-05-09 23:28:24 +00:00
cff7df201c
Rewrite tail merging algorithm to handle the
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case where there are multiple blocks with a large
number of common tail instructions more efficiently
(compile time optimization).
llvm-svn: 50916
2008-05-09 21:24:35 +00:00
6a2da37c0e
Make several variable declarations static.
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llvm-svn: 50696
2008-05-06 01:53:16 +00:00
9d339849ee
Teach branch folding pass about implicit_def instructions. Unfortunately we can't just eliminate them since register scavenger expects every register use to be defined. However, we can delete them when there are no intra-block uses. Carefully removing some implicit def's which enable more blocks to be optimized away.
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llvm-svn: 49461
2008-04-10 02:32:10 +00:00
c799065cc3
Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
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llvm-svn: 47703
2008-02-28 00:43:03 +00:00
3266ff9a6f
PR1909: Tail merging pass ran wild. It makes no sense to merge blocks in order to save a single instruction since a branch will be inserted for each BB.
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llvm-svn: 47301
2008-02-19 02:09:37 +00:00
3a4be0fdef
Rename MRegisterInfo to TargetRegisterInfo.
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llvm-svn: 46930
2008-02-10 18:45:23 +00:00
70de4cb1cd
Use empty() instead of comparing size() with zero.
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llvm-svn: 46514
2008-01-29 13:02:09 +00:00
03ad885039
rename TargetInstrDescriptor -> TargetInstrDesc.
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Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
llvm-svn: 45695
2008-01-07 07:27:27 +00:00
a98c679de0
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
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that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
llvm-svn: 45674
2008-01-07 01:56:04 +00:00
a4ce4f6987
rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
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llvm-svn: 45667
2008-01-06 23:38:27 +00:00
10324d0175
rename isStore -> mayStore to more accurately reflect what it captures.
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llvm-svn: 45656
2008-01-06 08:36:04 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
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e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
d202e03fe5
Improve branch folding by recgonizing that explict successor relationships impact the value of fall-through choices.
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llvm-svn: 44785
2007-12-10 07:24:06 +00:00
f73340efb9
Changed XXX to FIXME, and added comment to the README file
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llvm-svn: 43359
2007-10-25 19:49:32 +00:00
5f7ed00d44
Added comment explaining why we are doing this check.
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llvm-svn: 43353
2007-10-25 18:23:45 +00:00
ac5c93040f
Don't branch fold inline asm statements.
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llvm-svn: 43191
2007-10-19 21:09:55 +00:00
5f6a9da530
More explicit keywords.
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llvm-svn: 40757
2007-08-02 21:21:54 +00:00
d5ea194b6c
If assertions are not enabled, we should return False here.
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llvm-svn: 38535
2007-07-11 08:47:55 +00:00
d9034f717a
Make this work with GLIBCXX_DEBUG.
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llvm-svn: 38516
2007-07-10 22:00:30 +00:00
451d1a6ecd
Fix misue of iterator pointing to erased object. Uncovered by
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_GLIBCXX_DEBUG.
llvm-svn: 37793
2007-06-29 02:45:24 +00:00
2afd702c20
Move CorrectExtraCFGEdges() from BranchFolding.cpp to a MachineBasicBlock method.
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llvm-svn: 37633
2007-06-18 22:43:58 +00:00
86798e5e11
Make throttle a hidden parameter, per review.
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llvm-svn: 37511
2007-06-08 01:08:52 +00:00
52fcf022f7
Throttle tail merging; handling blocks with large numbers of predecessors
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is too slow.
llvm-svn: 37509
2007-06-08 00:34:27 +00:00
0558dda319
Tail merging wasn't working for predecessors of landing pads. PR 1496.
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llvm-svn: 37427
2007-06-04 23:52:54 +00:00
df75785594
Move ReplaceUsesOfBlockWith() out of BranchFolding into a MachineBasicBlock general facility.
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llvm-svn: 37408
2007-06-04 06:44:01 +00:00
6e7cdce773
Fix CorrectExtraCFGEdges to allow for multiple LandingPad targets.
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llvm-svn: 37394
2007-06-02 00:08:15 +00:00
3c0a13762d
Implement smarter algorithm for choosing which blocks to tail-merge.
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See test/CodeGen/X86/test-pic-jtbl.ll for a case where it works well;
shaves another 10K off our favorite benchmark. I was hesitant about
this because of compile speed, but seems to do OK on a bootstrap.
llvm-svn: 37392
2007-06-01 23:02:45 +00:00
1a401e68a8
Arrange for only 1 of multiple branches to landing pad to be kept.
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Do not remove empty landing pads (EH table needs to be updated)
llvm-svn: 37375
2007-05-31 21:54:00 +00:00
d14ad078c6
Changed per review comment.
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llvm-svn: 37355
2007-05-30 00:32:01 +00:00
a69ebdbebc
Make stable_sort in tail merging actually be stable (it never was, but didn't
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matter until my last change). Reenable tail merging by default.
llvm-svn: 37354
2007-05-29 23:47:50 +00:00
1409b6a59b
Blocks that cond-br and uncond-br/fallthrough to same block should have
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only one successor.
llvm-svn: 37324
2007-05-24 18:31:55 +00:00
1af8c870c7
Fix for PR1444: do not create two successors to the same block.
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Temporarily, this breaks CodeGen/Generic/2006-02-12-InsertLibraryCall.ll
by exposing an unrelated latent problem; working on that.
llvm-svn: 37323
2007-05-24 17:39:32 +00:00
f4a77d2481
Two tail merging improvements:
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When considering blocks with more than 2 predecessors, merge the block with
the largest number of matching insns, rather than the first block found.
Considering that 1 matching insn is enough to show a win for candidates that
already end with a branch.
llvm-svn: 37315
2007-05-23 21:07:20 +00:00
82810c8a13
Make tail merging the default, except on powerPC. There was no prior art
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for a target-dependent default with a command-line override; this way
should be generally usable.
llvm-svn: 37285
2007-05-22 17:14:46 +00:00
f8956178af
Remove some unneeded branches. (spotted by Evan, thanks)
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llvm-svn: 37198
2007-05-18 01:28:58 +00:00
420a85d0cf
Remove extra CFG edges before doing these passes; it makes them happier.
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llvm-svn: 37089
2007-05-15 21:19:17 +00:00
cc8f571bc8
Do not generate branches to entry block. This fixes several test suite
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failures on PPC (can happen only when prologue code is null)
llvm-svn: 36979
2007-05-10 23:59:23 +00:00
6e16d09252
Make tail merging handle many more cases (all it can, I think).
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llvm-svn: 36966
2007-05-10 01:01:49 +00:00
9a25b3afcd
Handle some non-exit blocks in tail merging.
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llvm-svn: 36907
2007-05-07 20:57:21 +00:00
8c78a0bff0
Drop 'const'
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llvm-svn: 36662
2007-05-03 01:11:54 +00:00
Dan Gohman