7681b41720
test/CodeGen/X86/atomic_op.ll: Rename @main to @func. Extra sequences will be inserted to @main as prologue on cygming, to fail.
...
llvm-svn: 115611
2010-10-05 11:16:24 +00:00
6296bbbb65
Added a testcase for the ENTER instruction.
...
llvm-svn: 115580
2010-10-05 00:21:40 +00:00
402e54822b
The pshufw instruction came about in MMX2 when SSE was introduced. Don't place
...
it in with the SSSE3 instructions.
Steward! Could you place this chair by the aft sun deck? I'm trying to get away
from the Astors. They are such boors!
llvm-svn: 115552
2010-10-04 20:24:01 +00:00
fd1fff8b19
Implement ELF::R_X86_64_GOTPCREL.
...
llvm-svn: 115547
2010-10-04 19:51:39 +00:00
baadbd554a
Produce a R_X86_64_PLT32 when needed.
...
llvm-svn: 115541
2010-10-04 19:04:13 +00:00
b2c4ca6433
Produce a R_X86_64_GOT32 when needed.
...
llvm-svn: 115537
2010-10-04 18:44:25 +00:00
87f77b5f9a
Add hook in MCSection to decide when to use "optimized nops", for each
...
section kind. Previously, optimized nops were only used for MachO.
Also added tests for ELF and COFF.
llvm-svn: 115523
2010-10-04 17:32:41 +00:00
da0e3d07b2
Include the section address in the computation of the relocation.
...
llvm-svn: 115509
2010-10-04 15:59:01 +00:00
7c48b06930
Correctly compute the relocation when it is not in the first fragment.
...
llvm-svn: 115506
2010-10-04 15:28:43 +00:00
d77a443631
va_args support for Win64.
...
Patch by Cameron!
llvm-svn: 115480
2010-10-03 22:52:07 +00:00
ff85688559
Properly emit stack probe on win64 (for non-mingw targets).
...
Based on the patch by Cameron Esfahani!
llvm-svn: 115479
2010-10-03 22:02:38 +00:00
bb48e26732
Add 3DNowA instructions.
...
llvm-svn: 115477
2010-10-03 20:23:13 +00:00
f909b07340
unbreak buildbot
...
llvm-svn: 115476
2010-10-03 20:02:48 +00:00
d3593c3a8e
the immediate field of pshufw is actually an 8-bit field, not a 8-bit field that is sign extended. This fixes PR8288
...
llvm-svn: 115473
2010-10-03 19:09:13 +00:00
b44b202d66
add support for the prefetch/prefetchw instructions, move femms into
...
the right file. The assembler supports all the 3dnow instructions now,
but not the "3dnowa" ones.
llvm-svn: 115468
2010-10-03 18:42:30 +00:00
3a0a620c2e
what the heck, add support for the rest of the 3dNow! binary operations.
...
llvm-svn: 115467
2010-10-03 18:24:18 +00:00
45270db916
Implement support for the bizarre 3DNow! encoding (which is unlike anything
...
else in X86), and add support for pavgusb. This is apparently the
only instruction (other than movsx) that is preventing ffmpeg from building
with clang.
If someone else is interested in banging out the rest of the 3DNow!
instructions, it should be quite easy now.
llvm-svn: 115466
2010-10-03 18:08:05 +00:00
5d9089ae14
Add test to make sure that the MMX intrinsic calls make it out the other end in
...
tact.
llvm-svn: 115458
2010-10-03 03:30:30 +00:00
14d07adf0b
Auto-upgrade tests for the new MMX intrinsic calls.
...
llvm-svn: 115456
2010-10-03 01:12:20 +00:00
f70b4e0c2e
Implement a very basic PIC case.
...
llvm-svn: 115454
2010-10-03 00:46:57 +00:00
4756bbeba0
fix a regression introduced in r115243, in which the instruction
...
backing int_x86_ssse3_pshuf_w got removed. This caused PR8280.
llvm-svn: 115422
2010-10-02 21:32:15 +00:00
a2f2c27b20
actually, move the elf tests into the existing elf dir.
...
llvm-svn: 115416
2010-10-02 18:53:48 +00:00
7b1638b40b
consolidate ELF tests into asmparser tests.
...
llvm-svn: 115415
2010-10-02 18:52:57 +00:00
fbae9435c9
move ARM MC tests up one level.
...
llvm-svn: 115414
2010-10-02 18:52:05 +00:00
bf73fe5e8d
Need to specify SSE4 for machines which don't have SSE4. The code checked for is generated by SSE4. Otherwise, we get something else.
...
llvm-svn: 115352
2010-10-01 21:39:35 +00:00
13a642da0b
Now that the profitable bits of EnableFullLoadPRE have been enabled by default, rip out the remainder.
...
Anyone interested in more general PRE would be better served by implementing it separately, to get real
anticipation calculation, etc.
llvm-svn: 115337
2010-10-01 20:02:55 +00:00
d3fe5fa5d1
Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.
...
llvm-svn: 115323
2010-10-01 19:00:44 +00:00
a39904e6b9
We must check for something.
...
llvm-svn: 115309
2010-10-01 10:20:10 +00:00
0e5e4b7b76
Disable tests until I can figure out why they're failing on just two machines but not others.
...
llvm-svn: 115308
2010-10-01 10:01:10 +00:00
b3a1022572
Try adding an mtriple.
...
llvm-svn: 115307
2010-10-01 09:40:50 +00:00
56f7cd255b
Zap some redundant 'ori $?, $?, 0' from SPU.
...
Also remove some code that died in the process.
One now non-existant ori is checked for.
llvm-svn: 115306
2010-10-01 09:20:01 +00:00
3b2b1e7942
FileCheck-ize this test.
...
llvm-svn: 115304
2010-10-01 08:55:48 +00:00
9b6853c6eb
FileCheck-ize this test.
...
llvm-svn: 115303
2010-10-01 08:50:12 +00:00
c663a67384
fix PR8267 - Instcombine shouldn't optimizer away volatile memcpy's.
...
llvm-svn: 115296
2010-10-01 05:51:02 +00:00
98e82678bd
upgrade this test.
...
llvm-svn: 115295
2010-10-01 05:47:16 +00:00
a205055857
fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350
...
llvm-svn: 115294
2010-10-01 05:36:09 +00:00
f419de0852
One more +sse2.
...
llvm-svn: 115293
2010-10-01 05:08:18 +00:00
4ca7bb52d0
move X86 subdir up a level
...
llvm-svn: 115292
2010-10-01 04:32:20 +00:00
bb6b961867
Mark all these as needing SSE2. Should fix PPC and
...
maybe even Linux.
llvm-svn: 115291
2010-10-01 04:17:55 +00:00
ab60ae3cf3
Disable these tests for now; it's not obvious why they fail on Linux.
...
llvm-svn: 115257
2010-10-01 00:59:21 +00:00
c6f17f7420
Make test not sensitive to register choice.
...
llvm-svn: 115250
2010-10-01 00:16:17 +00:00
dd224d2333
Massive rewrite of MMX:
...
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.
Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics.
MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces. Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.
The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.
llvm-svn: 115243
2010-09-30 23:57:10 +00:00
bb995ae261
test/CodeGen/X86/sibcall.ll: Add explicit triplets and remove XFAIL: apple-darwin8.
...
llvm-svn: 115215
2010-09-30 22:02:06 +00:00
3170a25a84
We do want to allow LoadPRE to perform LICM-like transformations: we already consider PHI nodes to be negligible for
...
code size (making this transform code size neutral), and it allows us to hoist values out of loops, which is always
a good thing.
llvm-svn: 115205
2010-09-30 20:53:04 +00:00
eb12f49fb7
Try again to disable critical edge splitting in CodeGenPrepare.
...
The bug that broke i386 linux has been fixed in r115191.
llvm-svn: 115204
2010-09-30 20:51:52 +00:00
f987d5ea1c
Factor some logic into ShouldRelocOnSymbol. This simplifies the code and
...
fixes some cases where we were producing relocations with at symbol that
should use a section instead.
llvm-svn: 115194
2010-09-30 20:18:35 +00:00
665aa6efcc
When isel is emitting instructions for an x86 target without CMOV, the CFG is
...
edited during emission.
If the basic block ends in a switch that gets lowered to a jump table, any
phis at the default edge were getting updated wrong. The jump table data
structure keeps a pointer to the header blocks that wasn't getting updated
after the MBB is split.
This bug was exposed on 32-bit Linux when disabling critical edge splitting in
codegen prepare.
The fix is to uipdate stale MBB pointers whenever a block is split during
emission.
llvm-svn: 115191
2010-09-30 19:44:31 +00:00
1dee57fb7d
more cleanups.
...
llvm-svn: 115178
2010-09-30 17:29:05 +00:00
288a5f9652
merge and clean up tests.
...
llvm-svn: 115177
2010-09-30 17:24:05 +00:00
60217e765e
merge two tests.
...
llvm-svn: 115175
2010-09-30 17:18:22 +00:00
41a0cd14b7
rename test
...
llvm-svn: 115174
2010-09-30 17:16:49 +00:00
ea226b24ff
generalize test.
...
llvm-svn: 115172
2010-09-30 17:15:42 +00:00
28307d1a1e
rename test.
...
llvm-svn: 115171
2010-09-30 17:14:55 +00:00
45a52f3c34
merge two tests.
...
llvm-svn: 115170
2010-09-30 17:14:30 +00:00
73a7caee4b
preemptively add the rest of the non-n fpstack instructions.
...
llvm-svn: 115168
2010-09-30 17:11:29 +00:00
28b3b43fb4
merge two tests.
...
llvm-svn: 115165
2010-09-30 17:05:37 +00:00
1e9e49f421
fix this to not be completely broken.
...
llvm-svn: 115164
2010-09-30 17:04:59 +00:00
c8f0e29b5e
update, unxfail, fix bogus encodings.
...
llvm-svn: 115163
2010-09-30 17:03:20 +00:00
a9e913e139
update and unxfail
...
llvm-svn: 115162
2010-09-30 17:00:53 +00:00
ccf2c765f0
unxfail this by fixing syntactic differences.
...
llvm-svn: 115161
2010-09-30 16:59:28 +00:00
4373badcdf
implement support for finit, PR8258
...
llvm-svn: 115156
2010-09-30 16:42:53 +00:00
adc0dbe470
add support for fstcw, PR8259
...
llvm-svn: 115154
2010-09-30 16:39:29 +00:00
efbdbe5565
Move logic of determining ELF entsize from the .s printer to initialization
...
time. That way, the EntrySize field is initialized for other code paths,
namely, the .ll -> .o code path.
llvm-svn: 115141
2010-09-30 05:59:22 +00:00
9d98ac645e
Add another test that now passes.
...
llvm-svn: 115137
2010-09-30 04:22:07 +00:00
70d6e0e0ff
Correctly produce R_X86_64_32 or R_X86_64_32S.
...
With this patch in
movq $foo, foo(%rip)
foo:
.long foo
We produce a R_X86_64_32S for the first relocation and R_X86_64_32 for the
second one.
llvm-svn: 115134
2010-09-30 03:11:42 +00:00
645f6c2bef
Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile()
...
Small test for sanity check of resulting ARM .s file.
Tested against -r115129.
llvm-svn: 115133
2010-09-30 02:45:56 +00:00
b96b2d8e4d
Have ELFAsmParser.cpp use the already parsed "Size" (entry size) when
...
constructing a section. Test for a few cases also included.
llvm-svn: 115132
2010-09-30 02:41:46 +00:00
2ebaee9c75
Make it possible for the MCObjectWriter to decide if a given fixup is fully
...
resolved or not. Different object files have different restrictions and
different native assemblers have different idiosyncrasies we want to emulate
for now.
Move the existing MachO logic to the new place and implement an ELF one that
gets fixups to globals right.
llvm-svn: 115131
2010-09-30 02:22:20 +00:00
2b76c66fd6
Add constant folding for strspn and strcspn to SimplifyLibCalls.
...
llvm-svn: 115116
2010-09-30 00:58:35 +00:00
38d22f69fc
Add strpbrk folding to SimplifyLibCalls.
...
llvm-svn: 115111
2010-09-29 23:52:12 +00:00
8e861d7eee
Simplify the loop in StrChrOptimizer. FileCheckize test.
...
llvm-svn: 115095
2010-09-29 22:29:12 +00:00
824645abc9
Teach SimplifyLibCalls how to optimize strrchr.
...
llvm-svn: 115091
2010-09-29 21:50:51 +00:00
95ae73c394
Generalize DISubprogram element to encode various flags instead of just one boolean for isArtificial.
...
This is a backword compatible change.
llvm-svn: 115084
2010-09-29 21:04:46 +00:00
99c985c37d
Fix PR8247: JumpThreading can cause a block to become unreachable while still having predecessor, if it is part of a self-loop.
...
Because of this, we cannot use the Simplify* APIs, as they can assert-fail on unreachable code. Since it's not easy to determine
if a given threading will cause a block to become unreachable, simply defer simplifying simplification to later InstCombine and/or
DCE passes.
llvm-svn: 115082
2010-09-29 20:34:41 +00:00
0aea752f6d
Remove PointerTracking tests.
...
llvm-svn: 115072
2010-09-29 19:20:35 +00:00
2b43c1cf42
implement rdar://8491845 - Gas supports commuted forms of non-commutable instructions.
...
llvm-svn: 115061
2010-09-29 18:39:16 +00:00
97bf273870
Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.
...
LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned. Radar 8489376.
llvm-svn: 115047
2010-09-29 17:54:10 +00:00
53f0bf194a
Move "local commons" to the end of .bss to match the gnu as behavior.
...
llvm-svn: 115037
2010-09-29 14:52:01 +00:00
68e05d404a
Add a test that I forgot to add with a previous commit.
...
llvm-svn: 115036
2010-09-29 14:40:49 +00:00
c2eb72dc2a
do not compare actual branch labels; this may fix llvm-gcc-x86_64-darwin10-cross-mingw32 buildbot too
...
llvm-svn: 115034
2010-09-29 10:45:43 +00:00
d36e3e8850
improve heuristics to find the 'and' corresponding to 'tst' to also catch opportunities on thumb2
...
added some doxygen on the way
llvm-svn: 115033
2010-09-29 10:12:08 +00:00
8f7851d2b4
fix rdar://8490728 - llvm-mc rejects gpr64 form of 'movmskpd'
...
llvm-svn: 115029
2010-09-29 05:05:03 +00:00
52e6020883
add assembler support for the cvtsd2sil/cvtsd2siq mnemonics, rdar://8456382
...
llvm-svn: 115027
2010-09-29 04:55:40 +00:00
822dc48c3a
MC-COFF: Fix test. IMAGE_SYM_CLASS_LABEL should never have been emitted.
...
llvm-svn: 115024
2010-09-29 03:59:25 +00:00
5da7f9fcfd
make the x86 mccode emitter emit the 0x67 and 0x66 prefix bytes in the same
...
order as cctools for diffability.
llvm-svn: 115022
2010-09-29 03:43:43 +00:00
a4e1c74947
implement support for 32-bit address operands in 64-bit mode, which
...
are defined to emit the 0x67 prefix byte. rdar://8482675
llvm-svn: 115021
2010-09-29 03:33:25 +00:00
f60062fd55
add basic avx support to the disassembler, also teach it about ssmem/sdmem
...
operands.
With this done, we can remove the _Int suffixes from the round instructions
without the disassembler blowing up. This allows the assembler to support
them, implementing rdar://8456376 - llvm-mc rejects 'roundss'
llvm-svn: 115019
2010-09-29 02:57:56 +00:00
ff3a3930a0
add asmparser support for cvttpd2dq by removing some Int_ prefixes.
...
Clean up cvttps2dq by removing some redundant implementations of the
same instruction. rdar://8456382
llvm-svn: 115018
2010-09-29 02:36:32 +00:00
ef1c2fc305
implement rdar://8456382 - cvtsd2si support, by removing some Int_ prefixes.
...
llvm-svn: 115017
2010-09-29 02:24:57 +00:00
a63292a3ca
implement rdar://8456378 and PR7557 - support for the fstsw,
...
an instruction that requires a WHOLE NEW wonderful kind of alias.
llvm-svn: 115015
2010-09-29 01:50:45 +00:00
cc91601211
And remove r114997's test.
...
llvm-svn: 115003
2010-09-28 23:24:18 +00:00
b0b2c57149
Revert r114997. It was causing a failure on darwin10-selfhost.
...
llvm-svn: 115002
2010-09-28 23:11:55 +00:00
d848beb1e5
Fix a FIXME. _foo.eh symbols are currently always exported so that the linker
...
knows about them. This is not necessary on 10.6 and later.
llvm-svn: 114997
2010-09-28 22:36:56 +00:00
a3181e2d79
Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise
...
cost modeling for if-conversion. Now if only we had a way to estimate the misprediction probability.
Adjsut CodeGen/ARM/ifcvt10.ll. The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.
llvm-svn: 114995
2010-09-28 21:57:50 +00:00
81bdc93bbb
User proper libcall names & condcodes while compiling for ARM EABI.
...
Patch by Evzen Muller!
llvm-svn: 114991
2010-09-28 21:39:26 +00:00
88af7d00fc
Part one of switching to using a more sane heuristic for determining if-conversion profitability.
...
Rather than having arbitrary cutoffs, actually try to cost model the conversion.
For now, the constants are tuned to more or less match our existing behavior, but these will be
changed to reflect realistic values as this work proceeds.
llvm-svn: 114973
2010-09-28 18:32:13 +00:00
0ab27ea44f
Add target triple info to these tests to make the results comparable when
...
hosted on different platforms.
llvm-svn: 114965
2010-09-28 17:10:36 +00:00
01d20a76fe
On elf, undefined symbols can start with .L.
...
llvm-svn: 114958
2010-09-28 16:19:11 +00:00
3dc97324c1
Add a command line option "-arm-strict-align" to disallow unaligned memory
...
accesses for ARM targets that would otherwise allow it. Radar 8465431.
llvm-svn: 114941
2010-09-28 04:09:35 +00:00
96bfb50c03
Write relocations in the end of the file. This matches what gas does and
...
makes files easier to diff.
llvm-svn: 114898
2010-09-27 22:04:54 +00:00
9ca41113f6
Make sure .text doesn't produce extra alignment.
...
llvm-svn: 114895
2010-09-27 21:40:27 +00:00
1083573796
Don't try to constant fold libm functions with non-finite arguments.
...
Usually we wouldn't do this anyway because llvm_fenv_testexcept would return an
exception, but we have seen some cases where neither errno nor fenv detect an
exception on arm-linux.
llvm-svn: 114893
2010-09-27 21:29:20 +00:00
d116d8a4e9
MC/AsmParser: Handle exponents in floating point literals.
...
llvm-svn: 114861
2010-09-27 20:12:52 +00:00
415a7a6fec
Revert "Disable codegen prepare critical edge splitting. Machine instruction passes now"
...
This reverts revision 114633. It was breaking llvm-gcc-i386-linux-selfhost.
It seems there is a downstream bug that is exposed by
-cgp-critical-edge-splitting=0. When that bug is fixed, this patch can go back
in.
Note that the changes to tailcallfp2.ll are not reverted. They were good are
required.
llvm-svn: 114859
2010-09-27 18:43:48 +00:00
4f3443e74d
Explicitly disable CGP critical edge splitting for this test so it won't break
...
by reenabling it temporarily.
llvm-svn: 114858
2010-09-27 18:43:43 +00:00
f2a279b902
Don't depend on basic block numbering.
...
llvm-svn: 114857
2010-09-27 18:43:40 +00:00
d628377a2d
MC-COFF: Drop empty sections, and label symbols. Convert relocations
...
targeted at symbols into relocations relative to the containing section.
Patch by Nathan Jeffords!
llvm-svn: 114823
2010-09-27 08:58:26 +00:00
b6a7f97c88
yet more aliases.
...
llvm-svn: 114822
2010-09-27 07:24:57 +00:00
882626cd5b
add a couple more aliases, rdar://8456378
...
llvm-svn: 114821
2010-09-27 07:21:41 +00:00
972c60d821
fix rdar://8470918 - llvm-mc can't assemble smovl
...
llvm-svn: 114819
2010-09-27 07:11:53 +00:00
ff0062af62
Fix rdar://8468087 - llvm-mc commutes fmul (and friend) operands.
...
My previous fix for rdar://8456371 should only apply to fmulp/faddp,
not to fmul/fadd. Instruction set orthogonality is overrated or
something.
llvm-svn: 114818
2010-09-27 07:08:21 +00:00
9f06f911d1
the latest assembler that runs on powerpc 10.4 machines doesn't
...
support aligned comm. Detect when compiling for 10.4 and don't
emit an alignment for comm. THis will hopefully fix PR8198.
llvm-svn: 114817
2010-09-27 06:44:54 +00:00
4f59cbfb66
implement support for 'clr' alias. This is part of rdar://8416805,
...
but balrog was wanting it on irc.
llvm-svn: 114809
2010-09-27 04:23:03 +00:00
d6142976de
Add test case for PTX ret instruction
...
llvm-svn: 114789
2010-09-25 07:49:54 +00:00
299479020a
Add ret instruction to PTX backend
...
llvm-svn: 114788
2010-09-25 07:46:17 +00:00
75d65b9a03
Move ELF to HasReliableSymbolDifference=true. Also take the opportunity to put
...
symbols defined in merge sections in independent atoms.
llvm-svn: 114786
2010-09-25 05:42:19 +00:00
b590a927cd
LoadPRE was not properly checking that the load it was PRE'ing post-dominated the block it was being hoisted to.
...
Splitting critical edges at the merge point only addressed part of the issue; it is also possible for non-post-domination
to occur when the path from the load to the merge has branches in it. Unfortunately, full anticipation analysis is
time-consuming, so for now approximate it. This is strictly more conservative than real anticipation, so we will miss
some cases that real PRE would allow, but we also no longer insert loads into paths where they didn't exist before. :-)
This is a very slight net positive on SPEC for me (0.5% on average). Most of the benchmarks are largely unaffected, but
when it pays off it pays off decently: 181.mcf improves by 4.5% on my machine.
llvm-svn: 114785
2010-09-25 05:26:18 +00:00
cf1f985838
Reapply 114678 and 114667. Reverting them did not fix the bot:
...
http://google1.osuosl.org:8011/builders/llvm-gcc-i386-linux-selfhost/builds/69
llvm-svn: 114761
2010-09-24 21:19:03 +00:00
9d06adcf88
Be more precise when trying to XFAIL this tester: http://google1.osuosl.org:8011/builders/llvm-arm-linux
...
llvm-svn: 114755
2010-09-24 20:34:49 +00:00
dbcc4b4d4d
Enable code placement optimization pass for ARM.
...
llvm-svn: 114746
2010-09-24 19:07:23 +00:00
3843bb9d2c
Revert 114678 and 114667 to see if
...
http://google1.osuosl.org:8011/builders/llvm-gcc-i386-linux-selfhost
gets happy.
llvm-svn: 114742
2010-09-24 18:48:08 +00:00
ce17f72c38
MC/AsmParser: Handle a missed case of floating literals in the lexer.
...
llvm-svn: 114733
2010-09-24 17:10:26 +00:00
10d274d874
CMake: Build unittests.
...
llvm-svn: 114725
2010-09-24 09:01:13 +00:00
1444f47deb
Fix whitespace.
...
llvm-svn: 114724
2010-09-24 09:00:56 +00:00
2af1653032
MC/AsmParser: Support .single and .double for embedding floating point literals.
...
- I believe more modern 'gas' supports a more enhanced set of arithmetic on
them, but for now the only thing we can do is emit them as data.
llvm-svn: 114719
2010-09-24 01:59:56 +00:00
7fbbe9a43a
Set alignment operand for NEON VST instructions.
...
llvm-svn: 114709
2010-09-23 23:42:37 +00:00
9eeb890172
Set alignment operand for NEON VLD instructions.
...
llvm-svn: 114696
2010-09-23 21:43:54 +00:00
f458f04eb1
Correctly handle weak undefined symbols. Before we would get a invalid binding
...
(2 == STB_WEAK | STB_GLOBAL).
llvm-svn: 114690
2010-09-23 19:55:14 +00:00
48e108753b
Represent relocations against local symbols as relocations against the section
...
they are in. Both ways should be equivalent, but gas produces relocations
against the section.
Roman wrote the patch, I added the test.
llvm-svn: 114667
2010-09-23 17:25:18 +00:00
3aecb15f0a
Fix llvm-extract so that it changes the linkage of all GlobalValues to
...
"external" even when doing lazy bitcode loading. This was broken because
a function that is not materialized fails the !isDeclaration() test.
llvm-svn: 114666
2010-09-23 17:25:06 +00:00
794aaa79e2
Disable codegen prepare critical edge splitting. Machine instruction passes now
...
break critical edges on demand.
llvm-svn: 114633
2010-09-23 06:55:34 +00:00
0d2c07cf58
Fix llvm-extract -delete's lazy loading to materialize the functions that
...
will not be deleted, rather than the ones that will.
llvm-svn: 114614
2010-09-23 00:33:13 +00:00
3231d13ddd
A select between a constant and zero, when fed by a bit test, can be efficiently
...
lowered using a series of shifts.
Fixes <rdar://problem/8285015>.
llvm-svn: 114599
2010-09-22 22:58:22 +00:00
bbb9287080
Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case.
...
llvm-svn: 114597
2010-09-22 22:35:21 +00:00
dee12d8110
Avoid some Mach-O specific alignment being done on ELF.
...
llvm-svn: 114594
2010-09-22 22:27:05 +00:00
9bac6cb544
Correctly align bss.
...
llvm-svn: 114556
2010-09-22 17:43:04 +00:00
922f13ce2e
llvmc: Support '-emit-llvm -S' with -opt.
...
llvm-svn: 114541
2010-09-22 09:00:41 +00:00
415624cf3f
fix rdar://8456371 - Handle commutable instructions written backward.
...
llvm-svn: 114536
2010-09-22 06:26:39 +00:00
bd85725341
Fix an inconsistency in the x86 backend that led it to reject "calll foo" on
...
x86-32: 32-bit calls were named "call" not "calll". 64-bit calls were correctly
named "callq", so this only impacted x86-32.
This fixes rdar://8456370 - llvm-mc rejects 'calll'
This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.
llvm-svn: 114534
2010-09-22 05:49:14 +00:00
37fc469f88
fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"
...
Teaching the code generator about CR8-15, how to rex them up, etc.
llvm-svn: 114533
2010-09-22 05:29:50 +00:00
2bb9504d1a
fix rdar://8456417 - llvm-mc can't do basic math
...
llvm-svn: 114532
2010-09-22 05:05:16 +00:00
9dfd2e354e
add the missing aliases for fp stack cmovs, rdar://8456391
...
llvm-svn: 114531
2010-09-22 04:56:20 +00:00
8a236b63d8
reimplement elf TLS support in terms of addressing modes, eliminating SegmentBaseAddress.
...
llvm-svn: 114529
2010-09-22 04:39:11 +00:00
1261b81e82
Fix rdar://8456364 - llvm-mc rejects '%CS'
...
llvm-svn: 114528
2010-09-22 04:11:10 +00:00
39cf8deded
fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp'
...
-This line, and those below, will be ignored--
M test/MC/AsmParser/X86/x86_instructions.s
M lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm-svn: 114527
2010-09-22 04:04:03 +00:00
a91e510f94
fix rdar://8456361 - llvm-mc rejects 'rep movsd'
...
llvm-svn: 114526
2010-09-22 03:50:32 +00:00
505af598d0
linux has a different stack alignment than the mac, relax this a bit.
...
llvm-svn: 114519
2010-09-22 00:46:26 +00:00
54e5329545
give VZEXT_LOAD a memory operand, it now works with segment registers.
...
llvm-svn: 114515
2010-09-22 00:34:38 +00:00
07827ba978
revert r114386 now that address modes work correctly, we get a nice
...
call through gs-relative memory now.
llvm-svn: 114510
2010-09-22 00:11:31 +00:00
e479e9643b
give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257
...
llvm-svn: 114508
2010-09-21 23:59:42 +00:00
0cefa51114
filecheckize
...
llvm-svn: 114507
2010-09-21 23:57:27 +00:00
d757c88bba
OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison.
...
llvm-svn: 114506
2010-09-21 23:49:07 +00:00
61158f98ab
Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes
...
irrelevant, but add a new test for the new, improved functionality.
llvm-svn: 114494
2010-09-21 22:51:46 +00:00
d92f42d1d0
Use FileCheck
...
llvm-svn: 114475
2010-09-21 20:50:32 +00:00
f4b1a5bdc4
When adding the carry bit to another value on X86, exploit the fact that the carry-materialization
...
(sbbl x, x) sets the registers to 0 or ~0. Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.
This fixes <rdar://problem/8449754>.
llvm-svn: 114460
2010-09-21 18:41:19 +00:00
ed79d5f24d
llvmc: Allow multiple output languages.
...
llvm-svn: 114433
2010-09-21 14:59:42 +00:00
bb0a1c44bf
fix rdar://8453210, a crash handling a call through a GS relative load.
...
For now, just disable folding the load into the call.
llvm-svn: 114386
2010-09-21 03:37:00 +00:00
f0591c1642
Implement support for .local and its "interesting" interactions with .comm.
...
llvm-svn: 114382
2010-09-21 00:24:38 +00:00
f3e9a48584
Enable machine sinking critical edge splitting. e.g.
...
define double @foo(double %x, double %y, i1 %c) nounwind {
%a = fdiv double %x, 3.2
%z = select i1 %c, double %a, double %y
ret double %z
}
Was:
_foo:
divsd LCPI0_0(%rip), %xmm0
testb $1, %dil
jne LBB0_2
movaps %xmm1, %xmm0
LBB0_2:
ret
Now:
_foo:
testb $1, %dil
je LBB0_2
divsd LCPI0_0(%rip), %xmm0
ret
LBB0_2:
movaps %xmm1, %xmm0
ret
This avoids the divsd when early exit is taken.
rdar://8454886
llvm-svn: 114372
2010-09-20 22:52:00 +00:00
5e4734245d
CombinerAA is now reordering these stores.
...
llvm-svn: 114354
2010-09-20 20:56:29 +00:00
272ff94916
When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore,
...
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.
This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.
llvm-svn: 114348
2010-09-20 20:39:59 +00:00
94dfd6fc4f
Simplify ARM callee-saved register handling by removing the distinction
...
between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.
For example, previously we would generate code like:
push {r4, r5, r6, r7, lr}
add r7, sp, #12
stmdb sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
push {r4, r5, r6, r7, r8, r10, r11, lr}
add r7, sp, #12
rdar://8445635
llvm-svn: 114340
2010-09-20 19:32:20 +00:00
32ab4558fe
Produce a R_X86_64_32 when the value is >=0.
...
llvm-svn: 114339
2010-09-20 19:20:47 +00:00
b912c27fc9
test/CodeGen/X86: Add explicit triplet -mtriple=i686-linux to 3 tests incompatible to Win32 codegen.
...
r114297 raises 3 failures. They might fail also on mingw.
llvm-svn: 114317
2010-09-19 21:58:55 +00:00
dbb199d89b
Add the exit instruction to the PTX target.
...
Patch by Che-Liang Chiou <clchiou@gmail.com>!
llvm-svn: 114294
2010-09-18 18:52:28 +00:00
57e599a82a
Make sure the STT_FILE symbol is the first one in the symbol table.
...
llvm-svn: 114285
2010-09-18 15:03:21 +00:00
b92b13d8a0
Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is
...
NO path to the destination containing side effects, not that SOME path contains no side effects.
In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".
llvm-svn: 114268
2010-09-18 04:45:14 +00:00
15829c6c4c
Add test that was missing in my previous commit.
...
llvm-svn: 114248
2010-09-18 00:37:27 +00:00
49c15c0f9f
Attempt to XFAIL this test on arm-linux, which is inexplicably failing.
...
llvm-svn: 114241
2010-09-18 00:04:37 +00:00
de636ca9a8
Fix vmov.f64 disassembly on targets where sizeof(long) != 8.
...
llvm-svn: 114240
2010-09-17 23:48:07 +00:00
cb6db98897
Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64
...
value should be in GPRs when it's going to be used as a scalar, and we use
VMOVRRD to make that happen, but if the value is converted back to a vector
we need to fold to a simple bit_convert. Radar 8407927.
llvm-svn: 114233
2010-09-17 22:59:05 +00:00
7a6c37d3e7
Teach the (non-MC) instruction printer to use the cannonical names for push/pop,
...
and shift instructions on ARM. Update the tests to match.
llvm-svn: 114230
2010-09-17 22:36:38 +00:00
e53ab6dffc
Teach machine sink to
...
1) Do forward copy propagation. This makes it easier to estimate the cost of the
instruction being sunk.
2) Break critical edges on demand, including cases where the value is used by
PHI nodes.
Critical edge splitting is not yet enabled by default.
llvm-svn: 114227
2010-09-17 22:28:18 +00:00
6d800f88da
Update tests to handle MC-inst instruction printing of shift operations. The
...
legacy asm printer uses instructions of the form, "mov r0, r0, lsl #3", while
the MC-instruction printer uses the form "lsl r0, r0, #3". The latter mnemonic
is correct and preferred according the ARM documentation (A8.6.98). The former
are pseudo-instructions for the latter.
llvm-svn: 114221
2010-09-17 21:58:46 +00:00
4a5e54021a
FileCheck-ize
...
llvm-svn: 114218
2010-09-17 21:46:16 +00:00
20da4e360b
Move thumb2 tests to the thumb2 directory
...
llvm-svn: 114206
2010-09-17 20:34:09 +00:00
9b0cd20f72
tweak test to check instructions rather than relying on the comment string
...
llvm-svn: 114204
2010-09-17 20:27:26 +00:00
f3a9c464b4
Fix this test to avoid an "inexact" fold.
...
llvm-svn: 114202
2010-09-17 20:25:43 +00:00
534db8a5c8
Avoid emitting a PIC base register if no PIC addresses are needed.
...
This fixes rdar://8396318.
llvm-svn: 114201
2010-09-17 20:24:24 +00:00
f3ceecec7e
tweak test to check instructions rather than relying on the comment string
...
llvm-svn: 114200
2010-09-17 20:21:03 +00:00
c18a460adc
tweak test to check instructions rather than relying on the comment string
...
llvm-svn: 114199
2010-09-17 20:17:41 +00:00
695312637c
Fix this test so that folding doesn't depend on a potentially
...
"inexact" result.
llvm-svn: 114198
2010-09-17 20:15:53 +00:00
cea0a8d7ae
fix rdar://8444631 - encoder crash on 'enter'
...
What a weird instruction.
llvm-svn: 114190
2010-09-17 18:02:29 +00:00
35a7a0ee2e
MC/Mach-O/i386: Fix a crash in relocation handling.
...
llvm-svn: 114176
2010-09-17 15:21:50 +00:00
d890a54353
tests/CMakeLists.txt: use `configure_file' instead of `sed'.
...
The Windows users will appreciate this.
llvm-svn: 114158
2010-09-17 03:22:21 +00:00
55f16678e4
MC/AsmParser: Add support for 'a + 4@GOTPCREL' and friends, by reconsing the
...
expression to include the modifier.
- Gross, but this a corner case we don't expect to see often in practice, but
it is worth accepting.
- Also improves diagnostics on invalid modifiers.
llvm-svn: 114154
2010-09-17 02:47:07 +00:00
18fa17cf3d
Fix the folding of floating-point math library calls, like sin(infinity),
...
so that it detects errors on platforms where libm doesn't set errno.
It's still subject to host libm details though.
llvm-svn: 114148
2010-09-17 01:38:06 +00:00
871d0b1b1c
If FE forgot to provide a file name (usually it uses "stdin" as name in such situation) then make one up to ensure that debug info is not malformed.
...
llvm-svn: 114119
2010-09-16 20:57:49 +00:00
74d320db97
fix rdar://8438816 - unrecognized 'fildq' instruction
...
llvm-svn: 114116
2010-09-16 20:46:38 +00:00
44bf266111
Print the address of sections as 0 and create the metadata sections in the
...
same order as gnu as.
llvm-svn: 114109
2010-09-16 19:46:31 +00:00
20154b3ed4
Add missing RUN line to this test.
...
llvm-svn: 114106
2010-09-16 18:46:23 +00:00
f95f59a0c2
When substituting sunkaddrs into indirect arguments an asm, we were
...
walking the asm arguments once and stashing their Values. This is
wrong because the same memory location can be in the list twice, and
if the first one has a sunkaddr substituted, the stashed value for the
second one will be wrong (use-after-free). PR 8154.
llvm-svn: 114104
2010-09-16 18:30:55 +00:00
140296f5c0
It is possible, under specific circumstances involving ptrtoint ConstantExpr's, for LVI to end up trying to merge
...
a Constant into a ConstantRange. Handle this conservatively for now, rather than asserting. The testcase is
more complex that I would like, but the manifestation of the problem is sensitive to iteration orders and the state of the
LVI cache, and I have not been able to reproduce it with manually constructed or simplified cases.
Fixes PR8162.
llvm-svn: 114103
2010-09-16 18:28:33 +00:00
94532cb297
Fix PR8161, in which an unreachable loop causes recursive instruction simplification to try
...
to replace an instruction with itself. Add a predicate to the simplifier to prevent this case.
llvm-svn: 114097
2010-09-16 17:42:36 +00:00
f7f433200b
Make sure that names like .note.GNU-stack are accepted as valid section names.
...
llvm-svn: 114091
2010-09-16 17:05:55 +00:00
922e3f454b
Add support for the .zero directive.
...
llvm-svn: 114077
2010-09-16 15:03:59 +00:00
c0e9b8d8bb
Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction.
...
This cleans up after the mess r108567 left in the CellSPU backend.
ORCvt-instruction were used to reinterpret registers, and the ORs were then
removed by isMoveInstr(). This patch now removes 350 instrucions of format:
or $3, $3, $3
(from the 52 testcases in CodeGen/CellSPU). One case of a nonexistant or is
checked for.
Some moves of the form 'ori $., $., 0' and 'ai $., $., 0' still remain.
llvm-svn: 114074
2010-09-16 12:29:33 +00:00
196841144d
add a test of an edge case value for the FP immediate (needs all digits of
...
precision)
llvm-svn: 114028
2010-09-15 21:52:13 +00:00
f667d929ce
Add a InitSections method to the streamer interface.
...
The ELF implementation now creates text, data and bss to match the gnu as
behavior.
The text streamer still has the old MachO specific behavior since
the testsuite checks that it will error when a directive is given
before a setting the current section for example.
A nice benefit is that -n is not required anymore when producing
ELF files.
llvm-svn: 114027
2010-09-15 21:48:40 +00:00
27ab5fbd2b
Teach the MC disassembler to handle vmov.f32 and vmov.f64 immediate to register
...
moves. Previously, the immediate was printed as the encoded integer value,
which is incorrect.
llvm-svn: 114021
2010-09-15 21:04:54 +00:00
ab3a128582
PR7959: Handle negative scales in GEPs correctly in BasicAA for non-64-bit
...
targets.
llvm-svn: 114015
2010-09-15 20:08:03 +00:00
660d7ecf32
Reapply Gabor's 113839, 113840, and 113876 with a fix for a problem
...
encountered while building llvm-gcc for arm. This is probably the same issue
that the ppc buildbot hit. llvm::prior works on a MachineBasicBlock::iterator,
not a plain MachineInstr.
llvm-svn: 113983
2010-09-15 17:12:08 +00:00
9ae4b271f2
the darwin9-powerpc buildbot keeps consistently crashing,
...
backing out following to get it back to green,
so I can investigate in peace:
svn merge -c -113840 llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll
svn merge -c -113876 -c -113839 llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm-svn: 113980
2010-09-15 16:53:07 +00:00
0c99d12208
llvmc: make -x work with unknown suffixes.
...
llvm-svn: 113972
2010-09-15 15:20:41 +00:00
ee7e6f42f8
lcall and ljmp always default to lcalll and ljmpl. This finally
...
wraps up r8418316
llvm-svn: 113949
2010-09-15 05:30:20 +00:00
09bfe645f6
apparently jmpl $1,$2 is an alias for ljmpl, similiarly
...
for call. Add this.
llvm-svn: 113948
2010-09-15 05:25:21 +00:00
6757eae45e
Disambiguate lcall/ljmp to the 32-bit version. This happens
...
even in 64-bit mode apparently.
llvm-svn: 113945
2010-09-15 05:14:54 +00:00
5be87c619b
fix the encoding of sldt GR16 to have the 0x66 prefix, and
...
add sldt GR32, which isn't documented in the intel manual
but which gas accepts. Part of rdar://8418316
llvm-svn: 113938
2010-09-15 04:45:10 +00:00
6b40b0def1
implement aliases for shld/shrd, part of rdar://8418316
...
llvm-svn: 113937
2010-09-15 04:37:18 +00:00
4bd21710b6
fix rdar://8431880 - rcl/rcr with no shift amount not recognized
...
llvm-svn: 113936
2010-09-15 04:33:27 +00:00
81ce173860
add various broken forms of fnstsw. I didn't add the %rax
...
version because it adds a prefix and makes even less sense
than the other broken forms. This wraps up rdar://8431422
llvm-svn: 113932
2010-09-15 04:15:16 +00:00
7df35dbd19
add some aliases for f[u]comi, part of rdar://8431422
...
llvm-svn: 113930
2010-09-15 04:08:38 +00:00
4dbcba0082
add a bunch of aliases for fp operations with no operand,
...
rdar://8431422
llvm-svn: 113929
2010-09-15 04:04:33 +00:00
46d4cc2ef7
test: Fix coff-dump section array indicies to 1 based to match file format.
...
llvm-svn: 113928
2010-09-15 03:58:51 +00:00
5d2c9acbdf
Tabs to spaces
...
llvm-svn: 113927
2010-09-15 03:58:39 +00:00
8ae7922a89
Cleanup coff-dump.py
...
llvm-svn: 113926
2010-09-15 03:58:24 +00:00
67e534505d
fix PR8144, a bug where constant merge would merge globals marked
...
attribute(used).
llvm-svn: 113911
2010-09-15 00:30:11 +00:00
c7cf42d80b
Reapply r113875 with additional cleanups.
...
"The register specified for a dregpair is the corresponding Q register, so to
get the pair, we need to look up the sub-regs based on the qreg. Create a
lookup function since we don't have access to TargetRegisterInfo here to
be able to use getSubReg(ARM::dsub_[01])."
Additionaly, fix the NEON VLD1* and VST1* instruction patterns not to use
the dregpair modifier for the 2xdreg versions. Explicitly specifying the two
registers as operands is more correct and more consistent with the other
instruction patterns. This enables further cleanup of special case code in the
disassembler as a nice side-effect.
llvm-svn: 113903
2010-09-14 23:54:06 +00:00
5f2311dc29
add a terrible hack to allow out with dx is parens, a gas bug.
...
This fixes PR8114
llvm-svn: 113894
2010-09-14 23:34:29 +00:00
f6fe577e88
Remove dead option from tests.
...
llvm-svn: 113855
2010-09-14 21:03:40 +00:00
00e34f4b32
forgot the testcase change for r113839
...
llvm-svn: 113840
2010-09-14 09:30:17 +00:00
5dbe800203
test for and-tst peephole optimization
...
documents the status-quo with its opportunities
llvm-svn: 113838
2010-09-14 08:50:43 +00:00
f1144f0929
fix PR8102, a case where we'd copyValue from a value that we already
...
deleted. Fix this by doing the copyValue's before we delete stuff!
The testcase only repros the problem on my system with valgrind.
llvm-svn: 113820
2010-09-14 00:19:00 +00:00
b1248ffe9d
Basic smoke test for new x86mmx type.
...
llvm-svn: 113783
2010-09-13 21:01:36 +00:00
fe12f23024
Add a reduced testcase for the infinite loop fixed in r113763.
...
llvm-svn: 113770
2010-09-13 18:28:40 +00:00
c237a849e3
Re-apply r113679, which was reverted in r113720, which added a paid of new instcombine transforms
...
to expose greater opportunities for store narrowing in codegen. This patch fixes a potential
infinite loop in instcombine caused by one of the introduced transforms being overly aggressive.
llvm-svn: 113763
2010-09-13 17:59:27 +00:00
df65e14397
Spelling fixes in comments.
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llvm-svn: 113746
2010-09-13 13:32:22 +00:00
26abd3e0c2
Revert 113679, it was causing an infinite loop in a testcase that I've sent
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on to Owen.
llvm-svn: 113720
2010-09-12 06:09:23 +00:00
1bbb14ab8f
add a missed cmov alias, part of rdar://8416805
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llvm-svn: 113693
2010-09-11 17:08:22 +00:00
3340c3e86c
add support for all the setCC aliases. Part of rdar://8416805
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llvm-svn: 113692
2010-09-11 17:06:05 +00:00
12d73d1f18
Add support for leb128 of absolute expressions.
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llvm-svn: 113691
2010-09-11 16:45:15 +00:00
b47c042e09
add support for pushfd/popfd which are aliases for pushfl/popfl.
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This fixes rdar://8408129 - pushfd and popfd get invalid instruction mnemonic errors
llvm-svn: 113690
2010-09-11 16:39:16 +00:00
30561aba20
implement rdar://8407928 - support for in/out with a missing "a" register.
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llvm-svn: 113689
2010-09-11 16:32:12 +00:00
6e321507b6
Add missing single quotes.
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llvm-svn: 113687
2010-09-11 15:45:48 +00:00
2833e392ab
Change section_data dumping to print hex numbers instead of using
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python's %r.
llvm-svn: 113685
2010-09-11 15:25:58 +00:00
70f4524427
Invert and-of-or into or-of-and when doing so would allow us to clear bits of the and's mask.
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This can result in increased opportunities for store narrowing in code generation. Update a number of
tests for this change. This fixes <rdar://problem/8285027>.
Additionally, because this inverts the order of ors and ands, some patterns for optimizing or-of-and-of-or
no longer fire in instances where they did originally. Add a simple transform which recaptures most of these
opportunities: if we have an or-of-constant-or and have failed to fold away the inner or, commute the order
of the two ors, to give the non-constant or a chance for simplification instead.
llvm-svn: 113679
2010-09-11 05:48:06 +00:00
8c35fb0739
Teach InstructionSimplify to fold (A & B) & A -> A & B and (A | B) | A -> A | B.
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Reassociate does this but it doesn't catch all cases (e.g. if the operands are i1).
llvm-svn: 113651
2010-09-10 22:39:55 +00:00
e26fffc597
Auto-upgrade the magic ".llvm.eh.catch.all.value" global to
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"llvm.eh.catch.all.value". Only the name needs to be changed.
llvm-svn: 113600
2010-09-10 18:51:56 +00:00
1d6aa46cd7
Fix test so it passes on non-Darwin hosts.
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llvm-svn: 113577
2010-09-10 06:20:01 +00:00
8617234658
Fix merging base-updates for VLDM/VSTM: Before I switched these instructions
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to use AddrMode4, there was a count of the registers stored in one of the
operands. I changed that to just count the operands but forgot to adjust for
the size of D registers. This was noticed by Evan as a performance problem
but it is a potential correctness bug as well, since it is possible that this
could merge a base update with a non-matching immediate.
llvm-svn: 113576
2010-09-10 05:15:04 +00:00
bf4070756f
Teach if-converter to be more careful with predicating instructions that would
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take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.
llvm-svn: 113570
2010-09-10 01:29:16 +00:00
e5444a88cd
llvm-mc: Don't crash when using -n and we see a directive before the initial section.
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- This is annoying, because we have to scatter this check everywhere that could emit real data, but I see no better solution.
llvm-svn: 113552
2010-09-09 22:42:59 +00:00
43325c4a68
llvm-mc: Make sure we exit != 0 if any errors are encountered.
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llvm-svn: 113551
2010-09-09 22:42:56 +00:00
728941fabc
XFAIL test under valgrind. It is not really our problem if sh is leaking.
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llvm-svn: 113550
2010-09-09 22:02:13 +00:00
6270515918
Revert r113439, which relaxed the requirement that loops containing calls cannot be unrolled. After some discussion,
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there seems to be a better way to achieve the same effect.
llvm-svn: 113528
2010-09-09 20:02:23 +00:00
e8501a468c
Add one more pattern to fallback movddup
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llvm-svn: 113522
2010-09-09 18:48:34 +00:00
db0ddaa50b
tests: XFAIL a handful of tests on the vg_leak builder, so we can get back to
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green.
llvm-svn: 113491
2010-09-09 15:50:19 +00:00
0a96578ac0
Add an elf-dumper utility.
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- Output format and some of the code stolen from macho-dump.
- Somewhat incomplete and probably buggy.
- Comes with a very basic test.
llvm-svn: 113488
2010-09-09 15:00:41 +00:00
78617ea13a
Get rid of the last use of -m64 in FrontendC. This solution
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of checking for either 4 or 8 is not very satisfactory, but
it would catch the original problem (an alignment of 1).
llvm-svn: 113485
2010-09-09 12:57:29 +00:00
11d56c309a
Another test that uses -m64. Here too it looks like it can be
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removed. Not that the XTARGET wasn't doing anything since it
does nothing without an accompanying XFAIL.
llvm-svn: 113484
2010-09-09 12:48:04 +00:00
NAKAMURA Takumi