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590 Commits

Author SHA1 Message Date
Evan Cheng e22f9181f7 Support for read / write from explicit registers with FlagVT type. 
llvm-svn: 24753
 2005-12-17 01:19:28 +00:00
Evan Cheng d296a43f96 Added support to specify predicates. 
llvm-svn: 24715
 2005-12-14 22:02:59 +00:00
Evan Cheng 6a31777c8e Skip over srcvalue nodes when generating ISEL code. 
llvm-svn: 24704
 2005-12-14 02:21:57 +00:00
Evan Cheng 6148153230 Bug fix: CodeGenMap[N] = ... -> CodeGenMap[N.getValue(0)] = ... 
llvm-svn: 24680
 2005-12-12 23:45:21 +00:00
Evan Cheng 7e4c01eee3 At top of generated isel SelectCode() is this: 
if (!N.Val->hasOneUse()) {
    std::map<SDOperand, SDOperand>::iterator CGMI = CodeGenMap.find(N);
    if (CGMI != CodeGenMap.end()) return CGMI->second;
  }

Suppose a DAG like this:

           X
         ^   ^
        /     \
      USE1    USE2

Suppose USE1 is being selected first and during which X is selected and
returned a new node. After this, USE1 is no longer an use of X. During USE2
selection, X will be selected again since it has only one use!

The fix is to always query CodeGenMap.

llvm-svn: 24679
 2005-12-12 23:22:48 +00:00
Evan Cheng cdb16ef6f3 Bug fix: finding the correct incoming chain for pattern with nested src operand. And a minor change to make output code slightly more readible. 
llvm-svn: 24669
 2005-12-12 19:37:43 +00:00
Chris Lattner 08dbd94632 Send an indicator to llvm-testresults if the build failed 
llvm-svn: 24665
 2005-12-11 19:55:39 +00:00
Nate Begeman 4e56db674c Add support for TargetConstantPool nodes to the dag isel emitter, and use 
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.

llvm-svn: 24657
 2005-12-10 02:36:00 +00:00
Evan Cheng 0da396ffe2 Stop emitting a redudant type check for complex pattern node. 
llvm-svn: 24655
 2005-12-10 01:57:33 +00:00
Evan Cheng bac252c289 For instructions which produce no result, e.g. store, chain's Resno == 0. 
llvm-svn: 24652
 2005-12-10 00:09:17 +00:00
Chris Lattner 433573f4c6 Add a new SDTCisPtrTy constraint, which indicates that an operand must have 
the same type as the pointer type for a target.

llvm-svn: 24649
 2005-12-09 22:57:42 +00:00
Evan Cheng 499ab2a9fa * Do not allow nodes which produce chain results (e.g. loads) to be folded if 
it has more than one real use (non-chain uses).
* Record folded chain producing node in CodeGenMap.
* Do not fold a chain producing node if it has already been selected as an
  operand of a chain use.

llvm-svn: 24647
 2005-12-09 22:45:35 +00:00
Evan Cheng c1f911a238 Prevent folding of instructions which produce chains that have more than 1 real use 
llvm-svn: 24643
 2005-12-09 06:06:08 +00:00
Evan Cheng f423a17e33 * Make sure complex pattern operands are selected first since their select 
functions can return false and causing the instruction pattern match to fail.
* Code clean up.

llvm-svn: 24642
 2005-12-09 00:48:42 +00:00
Evan Cheng c9a620060b * Added an explicit type field to ComplexPattern. 
* Renamed MatchingNodes to RootNodes.

llvm-svn: 24636
 2005-12-08 02:14:08 +00:00
Evan Cheng 9b9567bfb5 Added support for ComplexPattern. These are patterns that require C++ pattern 
matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4.

llvm-svn: 24634
 2005-12-08 02:00:36 +00:00
Evan Cheng 0fe76d1585 * Infer instruction property hasCtrlDep from pattern if it has one. 
* Fixed a bug related to hasCtrlDep property use.

llvm-svn: 24610
 2005-12-05 23:08:55 +00:00
Chris Lattner ba369ae8f1 Implement PR673: for explicit register references, use type information 
if available

llvm-svn: 24597
 2005-12-05 02:36:37 +00:00
Chris Lattner 3717b4c830 Add some methods 
llvm-svn: 24596
 2005-12-05 02:35:08 +00:00
Chris Lattner d49489f01e Generate code to silence bogus GCC warnings. 
llvm-svn: 24593
 2005-12-05 00:48:51 +00:00
Evan Cheng f02bb9af8b * Commit the fix (by Chris) for a tblgen type inferencing bug. 
* Enhanced tblgen to handle instructions which have chain operand and writes a
chain result.
* Enhanced tblgen to handle instructions which produces no results. Part of
the change is a temporary hack which relies on instruction property (e.g.
isReturn, isBranch). The proper fix would be to change the .td syntax to
separate results dag from ops dag.

llvm-svn: 24587
 2005-12-04 08:18:16 +00:00
Nate Begeman 006bb04f3a Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Evan Cheng fed83adbe3 Teach tblgen to accept register source operands in patterns, e.g. 
def SHL8rCL  : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src),
                 "shl{b} {%cl, $dst|$dst, %CL}",
                 [(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>;

This generates a CopyToReg operand and added its 2nd result to the shl as
a flag operand.

llvm-svn: 24557
 2005-12-01 00:18:45 +00:00
Nate Begeman faad542d24 Nuke CodeGenInstruction's ValueType member, it is no longer used. 
llvm-svn: 24556
 2005-12-01 00:12:04 +00:00
Nate Begeman cdf2c67888 Stop checking the ValueType of the CodeGenInstruction. Instead, use the 
ValueType from the RegisterClass or Operands.  This step is necessary to
allow RegisterClasses to have multiple ValueTypes.

llvm-svn: 24555
 2005-12-01 00:06:14 +00:00
Nate Begeman e479ccb27b fit into 80 columns 
llvm-svn: 24554
 2005-11-30 23:58:18 +00:00
Chris Lattner 3e63dc00da Make the code generated by tblgen return the result of SelectNodeTo, to 
permit future changes.

llvm-svn: 24553
 2005-11-30 23:08:45 +00:00
Nate Begeman 6f8c1ace6e No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.

llvm-svn: 24541
 2005-11-30 18:54:35 +00:00
Nate Begeman f621b333f3 Fix some copy and paste typos. 
llvm-svn: 24540
 2005-11-30 18:37:14 +00:00
Evan Cheng c8af0cb893 Better error message when unrecognized opcode is seen. 
llvm-svn: 24519
 2005-11-29 18:44:58 +00:00
Nate Begeman 4d0251ad55 Add the new vector types to tablegen 
llvm-svn: 24514
 2005-11-29 06:19:38 +00:00
Chris Lattner f2807be3da Initialize this variable on all paths, fixing a crasher in windows. Thanks 
to JeffC for pointing this out.

llvm-svn: 24426
 2005-11-19 07:48:33 +00:00
Chris Lattner 6bc0304c91 Teach tblgen about instruction operands that have multiple MachineInstr 
operands, digging into them to find register values (used on X86).  Patch
by Evan Cheng!

llvm-svn: 24424
 2005-11-19 07:05:57 +00:00
Chris Lattner a70c7dff2e Validate that the input to 'Pat' patterns is sane. 
llvm-svn: 24393
 2005-11-17 17:43:52 +00:00
Chris Lattner 2a230e1c1a teach tblgen to be smart enough to handle tglobaladdr nodes 
llvm-svn: 24391
 2005-11-17 07:39:45 +00:00
Chris Lattner b22950df6c fix a tblgen bug that Evan ran into, where we would lose the '$src' name 
on patterns like "(set R32:$dst, (i32 imm:$src))"

llvm-svn: 24383
 2005-11-16 23:14:54 +00:00
Chris Lattner 3ea1e255f7 remove these labels, there are now bigger jumps in the graph that are unlabeled 
llvm-svn: 24365
 2005-11-15 06:44:15 +00:00
Jim Laskey d6d3afb05e 1. Remove ranges from itinerary data. 
2. Tidy up the subtarget emittined code.

llvm-svn: 24172
 2005-11-03 22:47:41 +00:00
Chris Lattner 64209fd14b Reject integer literals that are out of range for their type. 
llvm-svn: 24162
 2005-11-03 05:46:11 +00:00
Chris Lattner 590176be16 Add support for immediates directly in the pattern, this allows itanium to 
define:

def : Pat<(i1 1), (CMPEQ r0, r0)>;

llvm-svn: 24149
 2005-11-02 06:49:14 +00:00
Jim Laskey 802748cd61 Allow itineraries to be passed through the Target Machine. 
llvm-svn: 24139
 2005-11-01 20:06:59 +00:00
Jeff Cohen 9e1784d738 Keep VC++ happy. 
llvm-svn: 24137
 2005-11-01 18:04:06 +00:00
Chris Lattner 1deb86dbf4 Let people who run the nightly tester specify paths to external tests, instead 
of having to hack the nightly tester script itself.

as an example, I use the following for my machine:

$HOME/llvm/utils/NightlyTest.pl -parallel -release -enable-llcbeta \
     -spec2000path /Volumes/ProjectsDisk/cvs/benchmarks/speccpu2000-llvm/benchspec/ \
     -povraypath /Volumes/ProjectsDisk/cvs/benchmarks/povray31 \
     -namdpath /Volumes/ProjectsDisk/cvs/benchmarks/namd

llvm-svn: 24136
 2005-11-01 17:59:42 +00:00
Jim Laskey 0433df136f Emit itinerary class in instruction info. 
llvm-svn: 24122
 2005-10-31 17:16:46 +00:00
Jim Laskey 3763a50d82 Generate cpu to itinerary map. 
llvm-svn: 24121
 2005-10-31 17:16:01 +00:00
Chris Lattner af6b34ff44 Revert an accidental commit. 
llvm-svn: 24098
 2005-10-29 17:01:41 +00:00
Chris Lattner d91df9d941 Make negative immediates in patterns work correctly, silence some warnings 
building the itanium backend.

llvm-svn: 24095
 2005-10-29 16:39:40 +00:00
Chris Lattner 742606ad30 Switch more code over to using getValueAsListOfDefs. Look at all the -'s. :) 
llvm-svn: 24074
 2005-10-28 22:59:53 +00:00
Chris Lattner 7ad0bed89f Rename Record::getValueAsListDef to getValueAsListOfDefs, to more accurately 
reflect what it is.
Convert some more code over to use it.

llvm-svn: 24072
 2005-10-28 22:49:02 +00:00
Chris Lattner 802bd8d94f Use the new interface Jim added 
llvm-svn: 24071
 2005-10-28 22:43:25 +00:00