508b459d12
Add emitInstruction() API so that we can get the bytes of a simple instruction
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llvm-svn: 12252
2004-03-09 03:34:53 +00:00
a7c2da3af5
Constify things a bit
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llvm-svn: 12251
2004-03-09 03:30:12 +00:00
194939086d
Each instruction now has both an ImmType and a MemType. This describes
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the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).
llvm-svn: 11967
2004-02-28 22:02:05 +00:00
58270fcf1f
Rename MRMS[0-7]{r,m} to MRM[0-7]{r,m}.
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llvm-svn: 11921
2004-02-27 18:55:12 +00:00
30e73e3442
Add support for GlobalAddress's for alkis
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llvm-svn: 11560
2004-02-17 18:23:55 +00:00
c07eeaef6b
Expand the repertoire of the forms we can print and encode.
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llvm-svn: 11537
2004-02-17 07:40:44 +00:00
bbf53937a4
Make dense maps keyed on physical registers smallerusing
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MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.
Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.
llvm-svn: 11477
2004-02-15 21:37:17 +00:00
6a35516dcc
Add back machine code deleter pass until we get a MachineCode pass
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that will be responsible for the creation of MachineFunctions and will
be required by all MachineFunctionPass passes.
llvm-svn: 11453
2004-02-15 00:03:15 +00:00
8dc99feeaf
Add support for the rep movs[bwd] instructions, and emit them when code
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generating the llvm.memcpy intrinsic.
llvm-svn: 11351
2004-02-12 17:53:22 +00:00
80da865f77
Change MachineBasicBlock's vector of MachineInstr pointers into an
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ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
llvm-svn: 11340
2004-02-12 02:27:10 +00:00
327426411e
Modify the two address instruction pass to remove the duplicate
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operand of the instruction and thus simplify the register allocation.
llvm-svn: 11124
2004-02-04 22:17:40 +00:00
68cff6bf4d
Remove floating point killer pass. This is now implemented in the
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instruction selector by adding a new pseudo-instruction
FP_REG_KILL. This instruction implicitly defines all x86 fp registers
and is a terminator so that passes which add machine code at the end
of basic blocks (like phi elimination) do not add instructions between
it and the branch or return instruction.
llvm-svn: 10562
2003-12-20 16:22:59 +00:00
452597611f
Finally, _actually delete the machine code_ for a function, after it has
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been emitted. Also, since the FPK pass is causing memory access violations,
disable it.
llvm-svn: 10559
2003-12-20 10:20:19 +00:00
ddec71c3b6
A minor cleanup for better encapsulation
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llvm-svn: 10545
2003-12-20 02:03:14 +00:00
833c3c2597
Rip JIT specific stuff out of TargetMachine, as per PR176
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llvm-svn: 10542
2003-12-20 01:22:19 +00:00
c6efb11f02
Modified cast so that it converts the int to a long before casting to
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a pointer. This evades a warning emitted by GCC when we cast from
unsigned int (32 bit) to void * (64 bit) on SparcV9.
llvm-svn: 10435
2003-12-12 19:57:48 +00:00
2e7416cb04
Implement the TargetMachine::getJITStubForFunction method for X86, finegrainify
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namespacification.
llvm-svn: 10430
2003-12-12 07:11:18 +00:00
960707c335
Put all LLVM code into the llvm namespace, as per bug 109.
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llvm-svn: 9903
2003-11-11 22:41:34 +00:00
482202a601
Added LLVM project notice to the top of every C++ source file.
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Header files will be on the way.
llvm-svn: 9298
2003-10-20 19:43:21 +00:00
97e1b55723
* Rename X86::IMULr16 -> X86::IMULrr16
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* Implement R1 = R2 * C where R1 and R2 are 32 or 16 bits. This avoids an
extra copy into a register, reducing register pressure.
llvm-svn: 9278
2003-10-20 03:42:58 +00:00
c05684ad22
Fix typo in comment.
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llvm-svn: 9187
2003-10-16 23:45:05 +00:00
7eb05a170a
Spell `necessary' correctly.
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llvm-svn: 7944
2003-08-18 14:43:39 +00:00
845b5af4d4
addPassesToJITCompile and addPassesToEmitMachineCode now take a
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FunctionPassManager, to support function-at-a-time compilation and
emission of code.
llvm-svn: 7821
2003-08-13 18:17:27 +00:00
7c257321c7
This is the real fix for the previous register allocator problem.
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Physical registers should not float around.
llvm-svn: 7587
2003-08-05 00:48:47 +00:00
3663901941
Set debug types
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llvm-svn: 7532
2003-08-03 21:14:38 +00:00
1007f033d4
Move DEBUG to Debug.h
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llvm-svn: 7497
2003-08-01 22:21:34 +00:00
e1b4e68396
We don't modify the LLVM rep, remain const correct
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llvm-svn: 7345
2003-07-26 23:06:00 +00:00
3ef61afb76
Merged in autoconf branch. This provides configuration via the autoconf
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system.
llvm-svn: 7014
2003-06-30 21:59:07 +00:00
7a719ed20c
Isolate machine-dependent use of <alloca.h> in "Support/Alloca.h",
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so that we can easily change its use to be conditional on the result of
an autoconf test later.
llvm-svn: 6723
2003-06-16 21:54:01 +00:00
11ecb1d8ca
Fix warnings on Sparc
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llvm-svn: 6658
2003-06-06 18:25:33 +00:00
65d29b87e3
Add statistic for # machine instrs emitted
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Add GROSS HACK to get CompilationCallback to work when compiled in release mode
llvm-svn: 6646
2003-06-06 04:00:05 +00:00
0addbab5e2
Add namespace comments for doxygen
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llvm-svn: 6581
2003-06-03 15:31:23 +00:00
f9162dc713
Eliminated a compiler warning due to casting to a different-sized datatype.
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llvm-svn: 6531
2003-06-02 04:13:58 +00:00
29848417f3
Renamed MachineCodeEmitter.cpp -> X86CodeEmitter.cpp as it conflicts with the
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target-independent lib/CodeGen/MachineCodeEmitter.cpp; preserved CVS history.
llvm-svn: 6528
2003-06-02 03:28:00 +00:00
3bb2a00849
Move X86 specific code out of the JIT into the X86 backend
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llvm-svn: 6516
2003-06-01 23:23:50 +00:00
74b65ee219
This blank line has GOT to go.
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llvm-svn: 6057
2003-05-09 03:28:13 +00:00
d964c3b9fd
IMPLICIT_DEF was not the beautiful elegant solution I thought it was going
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to be. In fact, it made stuff worse. :(
llvm-svn: 6013
2003-05-07 19:21:28 +00:00
4b1e02df8f
Don't have a cow with new pseudo instructions
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llvm-svn: 6009
2003-05-06 21:31:47 +00:00
b4d58d7f9e
Rename MachineInstrInfo -> TargetInstrInfo
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llvm-svn: 5272
2003-01-14 22:00:31 +00:00
d4ba62218e
* Add support for FP registers ST*
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* Add support for the constant pool & constant pool indices
* Add support for MRMS?m instructions
* Fix FP Prefix emission
* Add support for global addresses and external symbols
llvm-svn: 5224
2003-01-13 00:33:59 +00:00
d24f633394
* Convert to a MachineFunctionPass
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* ctor doesn't take TM argument
* handle direct ESP references correctly!
llvm-svn: 5179
2002-12-28 20:24:48 +00:00
36703cd02a
Add support for FP prefixes
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llvm-svn: 5151
2002-12-25 05:09:21 +00:00
e218f7924c
Add support for the bswap instruction
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llvm-svn: 5114
2002-12-23 23:46:00 +00:00
67e555d1ec
fix warning
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llvm-svn: 5107
2002-12-20 04:12:48 +00:00
d06650ade1
Give passes nice names!
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llvm-svn: 5059
2002-12-15 21:13:40 +00:00
ce35108606
Use MachineOperand::isFoo methods instead of our own global functions
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llvm-svn: 5033
2002-12-15 08:01:39 +00:00
44876fdee4
InstSelectSimple.cpp: Give promote32 a comment. Add initial
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implementation of getReg() for arguments.
MachineCodeEmitter.cpp: Fix using EBP with index, scale and no
displacement (whew!) due to Chris.
Printer.cpp: Fix printing out index and scale in memory references.
llvm-svn: 4998
2002-12-13 07:56:18 +00:00
e791322602
Emit the right form of mod/rm mod field
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llvm-svn: 4986
2002-12-13 05:05:05 +00:00
ec0bc92146
Rename MemArg* to Arg*
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llvm-svn: 4979
2002-12-13 03:51:55 +00:00
343e4b1810
Make mem size an assert
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Add mem size flags to all instructions using an imm
llvm-svn: 4978
2002-12-13 03:50:13 +00:00
Alkis Evlogimenos