Commit Graph

2685 Commits

Author SHA1 Message Date
Anton Korobeynikov dd2b2f8cba Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas!
llvm-svn: 90819
2009-12-08 01:03:04 +00:00
David Greene 76a7edc36d Use FileCheck and set nounwind on calls.
llvm-svn: 90790
2009-12-07 19:40:26 +00:00
Dan Gohman 9528ccdd77 Don't enable the post-RA scheduler on x86 except at -O3. In its
current form, it is too expensive in compile time.

llvm-svn: 90781
2009-12-07 19:04:31 +00:00
Anton Korobeynikov 75dfed4fa5 Dynamic stack realignment use of sp register as source/dest register
in "bic sp, sp, #15" leads to unpredicatble behaviour in Thumb2 mode.
Emit the following code instead:
mov r4, sp
bic r4, r4, #15
mov sp, r4

llvm-svn: 90724
2009-12-06 22:39:50 +00:00
Bill Wendling f89986235d Temporarily revert r90502. It was causing the llvm-gcc bootstrap on PPC to fail.
llvm-svn: 90653
2009-12-05 07:30:23 +00:00
Jakob Stoklund Olesen ca9cf65455 Also attempt trivial coalescing for live intervals that end in a copy.
The coalescer is supposed to clean these up, but when setting up parameters
for a function call, there may be copies to physregs. If the defining
instruction has been LICM'ed far away, the coalescer won't touch it.

The register allocation hint does not always work - when the register
allocator is backtracking, it clears the hints.

This patch takes care of a few more cases that r90163 missed.

llvm-svn: 90502
2009-12-04 00:16:04 +00:00
Nate Begeman 9655f84662 Don't pull vector sext through both hands of a logical operation, since doing so prevents the fusion of vector sext and setcc into vsetcc.
Add a testcase for the above transformation.
Fix a bogus use of APInt noticed while tracking this down.

llvm-svn: 90423
2009-12-03 07:11:29 +00:00
Bob Wilson 0bbd3077ce Recognize canonical forms of vector shuffles where the same vector is used for
both source operands.  In the canonical form, the 2nd operand is changed to an
undef and the shuffle mask is adjusted to only reference elements from the 1st
operand.  Radar 7434842.

llvm-svn: 90417
2009-12-03 06:40:55 +00:00
Bill Wendling 76bf386af0 Remove unnecessary check.
llvm-svn: 90352
2009-12-02 22:02:20 +00:00
Evan Cheng 732351f732 Fix PR5391: support early clobber physical register def tied with a use (ewwww)
- A valno should be set HasRedefByEC if there is an early clobber def in the middle of its live ranges. It should not be set if the def of the valno is defined by an early clobber.
- If a physical register def is tied to an use and it's an early clobber, it just means the HasRedefByEC is set since it's still one continuous live range.
- Add a couple of missing checks for HasRedefByEC in the coalescer. In general, it should not coalesce a vr with a physical register if the physical register has a early clobber def somewhere. This is overly conservative but that's the price for using such a nasty inline asm "feature".

llvm-svn: 90269
2009-12-01 22:25:00 +00:00
Jim Grosbach 8a8ba87ac8 test case for IV-Users simplification loop improvement
llvm-svn: 90260
2009-12-01 21:53:51 +00:00
Jakob Stoklund Olesen 26667abbd3 Use CFG connectedness as a secondary sort key when deciding the order of copy coalescing.
This means that well connected blocks are copy coalesced before the less connected blocks. Connected blocks are more difficult to
coalesce because intervals are more complicated, so handling them first gives a greater chance of success.

llvm-svn: 90194
2009-12-01 03:03:00 +00:00
Evan Cheng 1d31fc9123 Fix PR5614: parts of a physical register def may be killed the rest.
llvm-svn: 90180
2009-12-01 00:44:45 +00:00
Jakob Stoklund Olesen 020d8d4c63 New virtual registers created for spill intervals should inherit allocation hints from the original register.
This helps us avoid silly copies when rematting values that are copied to a physical register:

leaq	_.str44(%rip), %rcx
movq	%rcx, %rsi
call	_strcmp

becomes:

leaq	_.str44(%rip), %rsi
call	_strcmp

The coalescer will not touch the movq because that would tie down the physical register.

llvm-svn: 90163
2009-11-30 22:55:54 +00:00
Mon P Wang 031cb00246 Add test case for r90108
llvm-svn: 90109
2009-11-30 02:42:27 +00:00
Duncan Sands b56334b4f2 While this test is testing a problem in the generic part of codegen,
the problem only shows for msp430 and pic16 which is why it specifies
them using -march.  But it is wrong to put such tests in CodeGen/Generic,
since not everyone builds these targets.  Put a copy of the test in each
of the target test directories.

llvm-svn: 90005
2009-11-27 16:04:14 +00:00
Evan Cheng a4c986cbdd Test for 89905.
llvm-svn: 89906
2009-11-26 00:35:01 +00:00
Evan Cheng 44df27e964 ProcessImplicitDefs should watch out for invalidated iterator and extra implicit operands on copies.
llvm-svn: 89880
2009-11-25 21:13:39 +00:00
Bruno Cardoso Lopes 2db07581b7 Support PIC loading of constant pool entries
llvm-svn: 89863
2009-11-25 12:17:58 +00:00
Dale Johannesen 5ece8f0a20 Do not store R31 into the caller's link area on PPC.
This violates the ABI (that area is "reserved"), and
while it is safe if all code is generated with current
compilers, there is some very old code around that uses
that slot for something else, and breaks if it is stored
into.  Adjust testcases looking for current behavior.
I've verified that the stack frame size is right in all
testcases, whether it changed or not.  7311323.

llvm-svn: 89811
2009-11-24 22:59:02 +00:00
Evan Cheng 184ec26fcd Enable predication of NEON instructions in Thumb2 mode.
llvm-svn: 89748
2009-11-24 08:06:15 +00:00
Anton Korobeynikov 2522908653 Materialize global addresses via movt/movw pair, this is always better
than doing the same via constpool:
1. Load from constpool costs 3 cycles on A9, movt/movw pair - just 2.
2. Load from constpool might stall up to 300 cycles due to cache miss.
3. Movt/movw does not use load/store unit.
4. Less constpool entries => better compiler performance.

This is only enabled on ELF systems, since darwin does not have needed
relocations (yet).

llvm-svn: 89720
2009-11-24 00:44:37 +00:00
Jim Grosbach dbb4140f37 move fconst[sd] to UAL. <rdar://7414913>
llvm-svn: 89700
2009-11-23 21:08:25 +00:00
Jim Grosbach 50b293d65e update test for 89694
llvm-svn: 89695
2009-11-23 20:39:53 +00:00
Edward O'Callaghan f161e97a9e Miss two, PR5307.
llvm-svn: 89596
2009-11-22 15:35:28 +00:00
Edward O'Callaghan cc856372b0 Convert Thumb2 tests to FileCheck for PR5307.
llvm-svn: 89595
2009-11-22 15:18:27 +00:00
Benjamin Kramer a9268a4525 Turns out stuff gets allocated to different registers depending on the subtarget.
llvm-svn: 89594
2009-11-22 15:15:52 +00:00
Edward O'Callaghan 21d7e8aeb1 Convert ARM tests to FileCheck for PR5307.
llvm-svn: 89593
2009-11-22 14:23:33 +00:00
Benjamin Kramer 2e245f4e18 Convert test to FileCheck.
llvm-svn: 89589
2009-11-22 13:16:36 +00:00
Edward O'Callaghan 8966897524 Forgot to alter RUN line when converting to FileCheck.
llvm-svn: 89588
2009-11-22 13:09:48 +00:00
Edward O'Callaghan 7150767800 Fix for bad FileCheck converts in revision 89584.
llvm-svn: 89586
2009-11-22 12:50:05 +00:00
Edward O'Callaghan 15dd46215e Convert a few tests to FileCheck for PR5307.
llvm-svn: 89584
2009-11-22 11:45:44 +00:00
Jim Grosbach e09e95b35c Revert 89562. We're being sneakier than I was giving us credit for, and this
isn't necessary.

llvm-svn: 89568
2009-11-21 23:34:09 +00:00
Jim Grosbach 43fd822249 Darwin requires a frame pointer for all non-leaf functions to support correct
backtraces.

llvm-svn: 89562
2009-11-21 21:40:08 +00:00
Jakob Stoklund Olesen 4c83e2c253 Don't leave temporary files in the test directory.
llvm-svn: 89531
2009-11-21 02:05:31 +00:00
Dale Johannesen b91eba382d When generating a vector the really slow way, via loads
and stores, handle the case where the element size is not
a valid target type correctly (PPC).

llvm-svn: 89521
2009-11-21 00:53:23 +00:00
Evan Cheng 73f9a9e2c8 Enable hoisting load from constant memories.
llvm-svn: 89510
2009-11-20 23:31:34 +00:00
Sean Callanan c1f532e930 Recommitting PALIGNR shift width fixes.
Thanks to Daniel Dunbar for fixing clang intrinsics:
  http://llvm.org/viewvc/llvm-project?view=rev&revision=89499

llvm-svn: 89500
2009-11-20 22:28:42 +00:00
Dale Johannesen 8495a506eb Remove an incorrect overaggressive optimization
(PPC specific).

llvm-svn: 89496
2009-11-20 22:16:40 +00:00
Sean Callanan 19d92728d0 Reverting PALIGNR fix until I figure out how this
broke the Clang testsuite.

llvm-svn: 89495
2009-11-20 22:09:28 +00:00
Sean Callanan fbed130173 Fixed PALIGNR to take 8-bit rotations in all cases.
Also fixed the corresponding testcase, and the PALIGNR
  intrinsic (tested for correctness with llvm-gcc).

llvm-svn: 89491
2009-11-20 21:40:28 +00:00
Evan Cheng bdb43a9d99 Remat VLDRD from constpool. Clean up some instruction property specifications.
llvm-svn: 89478
2009-11-20 19:57:15 +00:00
Duncan Sands cc0a0cb4b7 Fix PR5558, which was caused by a wrong fix for PR3393 (see commit 63048),
which was an expensive checks failure due to a bug in the checking.  This
patch in essence reverts the original fix for PR3393, and refixes it by a
tweak to the way expensive checking is done.

llvm-svn: 89454
2009-11-20 10:45:10 +00:00
Dan Gohman 20c8ab655e Fix fast-isel to avoid selecting the return instruction if a
tail call has been encountered.

llvm-svn: 89444
2009-11-20 02:51:26 +00:00
Evan Cheng bbd50b0f78 Also CSE non-pic load from constant pools.
llvm-svn: 89440
2009-11-20 02:10:27 +00:00
Evan Cheng 81a2851bcb Fix codegen of conditional move of immediates. We were not making use of the immediate forms of cmov instructions at all.
llvm-svn: 89423
2009-11-20 00:54:03 +00:00
Daniel Dunbar 0b2099ad5f Unbreak test, Bruno please check.
llvm-svn: 89329
2009-11-19 07:18:49 +00:00
Evan Cheng b18525937c More consistent thumb1 asm printing.
llvm-svn: 89328
2009-11-19 06:57:41 +00:00
Evan Cheng 2a6c92fcb6 Shrink ldr / str [sp, imm0-1024] to 16-bit instructions.
llvm-svn: 89326
2009-11-19 06:32:27 +00:00
Bruno Cardoso Lopes 4713b282ce - Add sugregister logic to handle f64=(f32,f32).
- Support mips1 like load/store of doubles:

Instead of:
  sdc $f0, X($3)
Generate:
  swc $f0, X($3)
  swc $f1, X+4($3)

llvm-svn: 89322
2009-11-19 06:06:13 +00:00