4605e8aac4
Initial support for load / store multiple opt pass Thumb2 support (post-allocation only). It's kind of there, but not quite. I'll return to this later.
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llvm-svn: 75190
2009-07-09 23:11:34 +00:00
1622d7b429
Fix ldm / stm unified syntax; add t2LDM_RET.
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llvm-svn: 75188
2009-07-09 22:58:39 +00:00
a02fc2d327
LDM_RET should be marked mayLoad.
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llvm-svn: 75187
2009-07-09 22:57:41 +00:00
7591d02c84
Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. Also change the printer to make the scale 4 explicit.
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Note, we are not yet generating these instructions.
llvm-svn: 75181
2009-07-09 22:21:59 +00:00
f9870125fc
Add a Thumb readme entry.
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llvm-svn: 75173
2009-07-09 20:50:52 +00:00
ad93707e16
Correct comment.
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llvm-svn: 75172
2009-07-09 20:40:44 +00:00
7bf08beb2e
Handle Thumb-2 addressing modes during FP elimination.
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llvm-svn: 75158
2009-07-09 18:35:52 +00:00
0504e0a222
Thread LLVMContext through MVT and related parts of SDISel.
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llvm-svn: 75153
2009-07-09 17:57:24 +00:00
27e32c092e
Reorg includes.
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llvm-svn: 75115
2009-07-09 06:49:09 +00:00
22c2fba978
Use common code for both ARM and Thumb-2 instruction and register info.
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llvm-svn: 75067
2009-07-08 23:10:31 +00:00
5edd90cbbc
- Add some NEON ld / st instruction static encoding.
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- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy.
Patch by Sean Callanan.
llvm-svn: 75065
2009-07-08 22:51:32 +00:00
e3a53c448b
Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead.
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llvm-svn: 75048
2009-07-08 21:03:57 +00:00
f8d479c1ce
Missed an exit during the conversion.
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Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.
llvm-svn: 75045
2009-07-08 20:55:50 +00:00
fb8d6d5b58
Implement changes from Chris's feedback.
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Finish converting lib/Target.
llvm-svn: 75043
2009-07-08 20:53:28 +00:00
1d298fd75b
Implement NEON vst1 instruction.
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llvm-svn: 75037
2009-07-08 20:32:02 +00:00
03ab0bbb24
Generalize opcode selection in ARMBaseRegisterInfo.
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llvm-svn: 75036
2009-07-08 20:28:28 +00:00
b009980f0b
Fix cmake build.
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Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt
llvm-svn: 75035
2009-07-08 20:13:41 +00:00
9ca33e8a9f
Push methods into base class in preparation for sharing.
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llvm-svn: 75020
2009-07-08 18:31:39 +00:00
f731a2df6b
Implement NEON vld1 instructions.
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llvm-svn: 75019
2009-07-08 18:11:30 +00:00
6dd2730024
Start converting to new error handling API.
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cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)
llvm-svn: 75018
2009-07-08 18:01:40 +00:00
eebf58805c
Start breaking out common base functionality for register info.
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llvm-svn: 75016
2009-07-08 17:28:55 +00:00
af7451b674
Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first.
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llvm-svn: 75010
2009-07-08 16:09:28 +00:00
a21d3daadc
Remove the vicmp and vfcmp instructions. Because we never had a release with
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these instructions, no autoupgrade or backwards compatibility support is
provided.
llvm-svn: 74991
2009-07-08 03:04:38 +00:00
14965760a7
Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant.
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llvm-svn: 74988
2009-07-08 01:46:35 +00:00
b61e3a83ee
Add a todo.
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llvm-svn: 74976
2009-07-08 00:05:05 +00:00
f0080b734a
Also statically set bit 25 for BR_JT instructions.
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llvm-svn: 74974
2009-07-07 23:45:10 +00:00
2cff076cfe
Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan.
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llvm-svn: 74972
2009-07-07 23:40:25 +00:00
d0611f9a37
Add Thumb2 movcc instructions.
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llvm-svn: 74946
2009-07-07 20:39:03 +00:00
02a44edf12
Add BX and BXr9 encodings. Patch by Sean Callanan.
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llvm-svn: 74938
2009-07-07 19:16:24 +00:00
d0f6324cdc
Add Thumb2 pkhbt / pkhtb.
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llvm-svn: 74895
2009-07-07 05:35:52 +00:00
b24e51e2d9
Add some more Thumb2 multiplication instructions.
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llvm-svn: 74889
2009-07-07 01:17:28 +00:00
7c9434399d
80 col violation.
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llvm-svn: 74888
2009-07-07 01:16:41 +00:00
3d8ccdb4be
isThumb2 really should mean thumb2 only, not thumb2+.
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llvm-svn: 74871
2009-07-06 22:29:14 +00:00
40398233b7
Add bfc to armv6t2.
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llvm-svn: 74868
2009-07-06 22:23:46 +00:00
e63b0e6f79
Added ARM::mls for armv6t2.
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llvm-svn: 74866
2009-07-06 22:05:45 +00:00
5661ea68e7
Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
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cleanup, removed some #includes and moved Object Code Emitter out-of-line.
llvm-svn: 74813
2009-07-06 05:09:34 +00:00
aea6059ed4
Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call.
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With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.
The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.
llvm-svn: 74764
2009-07-03 06:44:53 +00:00
0e8bde5910
Add thumb2 sign / zero extend with rotate instructions.
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llvm-svn: 74755
2009-07-03 01:43:10 +00:00
6d9041100b
Add Thumb2 load / store multiple instructions. Not used yet.
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llvm-svn: 74749
2009-07-03 00:18:36 +00:00
f30ee8820a
t2LDR_PRE etc are loads.
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llvm-svn: 74741
2009-07-03 00:08:19 +00:00
53cdf022b6
Added indexed stores.
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llvm-svn: 74740
2009-07-03 00:06:39 +00:00
8ecd7eb3f7
Sign extending pre/post indexed loads.
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llvm-svn: 74736
2009-07-02 23:16:11 +00:00
ade05a37f1
Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2.
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llvm-svn: 74731
2009-07-02 22:18:33 +00:00
6141511621
CMake build fixes, from Xerxes Ranby
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llvm-svn: 74720
2009-07-02 18:53:52 +00:00
84c6cda2ef
Thumb2 pre/post indexed loads.
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llvm-svn: 74696
2009-07-02 07:28:31 +00:00
844f0b4562
80 col violation.
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llvm-svn: 74693
2009-07-02 06:44:30 +00:00
2c450d35ae
Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate.
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llvm-svn: 74692
2009-07-02 06:38:40 +00:00
979da0e590
80 col violation.
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llvm-svn: 74683
2009-07-02 01:30:04 +00:00
d9c55368e7
Factor out ARM indexed load matching code.
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llvm-svn: 74681
2009-07-02 01:23:32 +00:00
deb35afd23
Add a new addressing mode for NEON load/store instructions.
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llvm-svn: 74658
2009-07-01 23:16:05 +00:00
Evan Cheng