Commit Graph

6 Commits

Author SHA1 Message Date
Jason Molenda a583486065 When disassembling Aarch64 target and vendor Apple, set the cpu to
"apple-latest" which llvm uses to indicate the newest supported ISA.
Add a unit test; I'm only testing an armv8.1 instruction in this
unit test which would already be disassembled correctly because we
set the disassembler to ARM v8.2 mode, but it ensures that nothing
has been broken by adding this cpu spec.

<rdar://problem/38714781> 

llvm-svn: 355578
2019-03-07 03:16:45 +00:00
Chandler Carruth 2946cd7010 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Jason Molenda 956ff0f8bf If we fail to get an armv7em-- disassembler from llvm, skip the
tests and don't mark this as a failure.  This happens when we've
linked against an llvm without the ARM target built in.  Davide
added some cmake conditionals to avoid building this test when the
target was absent from llvm's build, but we're still finding some
bots that manage to get in this situation.

<rdar://problem/44270082> 

llvm-svn: 342072
2018-09-12 19:30:03 +00:00
Raphael Isemann b658f1df35 [NFC] Fix compiler warning in TestArmv7Disassembly.cpp
The warning is
    comparison of integers of different signs: 'const int' and 'const unsigned long'
and triggered by
    EXPECT_EQ (num_of_instructions, inst_list.GetSize());
as num_of_instructions is an int in this comparison (and the RHS is size_t).

llvm-svn: 341931
2018-09-11 12:45:22 +00:00
Davide Italiano 6af9fe07b9 [Disassembler] Run ARM-specific tests only if the ARM backend is built.
<rdar://problem/44239070>

llvm-svn: 341714
2018-09-07 21:36:21 +00:00
Jason Molenda 0dfb84ce9b Enable the fp-armv8 disassembler feature when disassembling Cortex-M
code.  This will enable disassembly of the optional subset of
neon that some Cortex cores support.  Add a unit test to check
that a few of these instructions disassemble as expected.

<rdar://problem/26674303> 

llvm-svn: 341623
2018-09-07 01:28:48 +00:00