We match the pattern "x >= y ? x-y : 0" into "subus x, y" and two special cases
if y is a constant. DAGCombiner canonicalizes those so we first have to undo the
canonicalization for those cases. The pattern occurs in gzip when the loop
vectorizer is enabled. Part of PR14613.
llvm-svn: 170273
Not all chips targeted by x86_64 have this feature, but a dramatically
increasing number do. Specifying a chip-specific tuning parameter will
continue to turn the feature on or off as appropriate for that
particular chip, but the generic flag should try to achieve the best
performance on the most widely available hardware. Today, the number of
chips with fast UA access dwarfs those without in the x86-64 space.
Note that this also brings LLVM's code generation for this '-march' flag
more in line with that of modern GCCs. Reviewed by Dan Gohman.
llvm-svn: 170269
Memory read's "repeat" behavior forgets "-t" option. It also formatted the type as hex bytes + ASCII. Now we revert to the default format when displaying types unless the user sets the format option manually.
llvm-svn: 170265
x/a print wouldn't always reset the word size to the size of a pointer if a previous memory read using x/<gdb-format> had been used that set it to another width.
llvm-svn: 170264
The notes on the objc_method_family and ns_returns_retained-type attributes
have been moved to the Objective-C section, since both are used by ARC.
The notes on analyzer_noreturn are now only on the analyzer site.
The inadequacy of these docs was noticed months ago by Jonathan Sauer;
I'm only just now getting around to cleaning them up.
llvm-svn: 170261
The file still exists in docs/analyzer/, but it won't be linked to from
clang.llvm.org or processed as part of the default Sphinx doc-build.
RegionStore has changed a lot from what Ted and Zhongxing describe here!
llvm-svn: 170260
In this case, essentially it is soft float with different library routines.
The next step will be to make this fully interoperational with mips32 floating
point and that requires creating stubs for functions with signatures that
contain floating point types.
I have a more sophisticated design for mips16 hardfloat which I hope to
implement at a later time that directly does floating point without the need
for function calls.
The mips16 encoding has no floating point instructions so one needs to
switch to mips32 mode to execute floating point instructions.
llvm-svn: 170259
immediate generates the narrow version. Needed when doing round-trip
assemble/disassemble testing using the alternate syntax that specifies
'pc' directly.
llvm-svn: 170255
for TLS dynamic models on 64-bit PowerPC ELF. The default sort routine
for relocations only sorts on the r_offset field; but with TLS, there
can be two relocations with the same r_offset. For PowerPC, this patch
sorts secondarily on descending r_type, which matches the behavior
expected by the linker.
llvm-svn: 170237
of a member function with parenthesized declarator.
Like this test case:
class Foo {
const char *(baz)() {
return __PRETTY_FUNCTION__;
}
};
llvm-svn: 170233
- Renaming GetCompilations() and GetSourcePathList() to follow LLVM
style.
- Updating docs to reflect name change.
- Also updating help text to not mention clang-check since this class
can be used by any tool.
Reviewed By: Alexander Kornienko
llvm-svn: 170229
C++11 allowed writing "vector<vector<int>>" without a space between the two ">".
This change allows this for protocols in template lists too in -std=c++11 mode,
and improves the diagnostic in c++98 mode.
llvm-svn: 170223
for a wider range of GOT entries that can hold thread-relative offsets.
This matches the behavior of GCC, which was not documented in the PPC64 TLS
ABI. The ABI will be updated with the new code sequence.
Former sequence:
ld 9,x@got@tprel(2)
add 9,9,x@tls
New sequence:
addis 9,2,x@got@tprel@ha
ld 9,x@got@tprel@l(9)
add 9,9,x@tls
Note that a linker optimization exists to transform the new sequence into
the shorter sequence when appropriate, by replacing the addis with a nop
and modifying the base register and relocation type of the ld.
llvm-svn: 170209
Dmitri Gribenko