9fb8908457
Moved from PR1570.
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llvm-svn: 48965
2008-03-30 19:07:11 +00:00
fd5fe2a83d
add a note.
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llvm-svn: 48583
2008-03-20 04:46:13 +00:00
af8d3c6699
various rotate fun.
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llvm-svn: 48438
2008-03-17 01:47:51 +00:00
d51372aa96
another random note
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llvm-svn: 47831
2008-03-02 19:29:42 +00:00
647c6642e7
Move pr717 to here.
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llvm-svn: 47803
2008-03-02 02:51:40 +00:00
643dce1146
add a note
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llvm-svn: 47720
2008-02-28 17:21:27 +00:00
765be8874d
target-indep codegen memcpy lowering issue.
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llvm-svn: 47705
2008-02-28 05:34:27 +00:00
6bb6a55f01
upgrade some tests.
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llvm-svn: 47280
2008-02-18 18:46:39 +00:00
0fddc34485
Add a note
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llvm-svn: 47279
2008-02-18 18:39:23 +00:00
afb514a7b4
clarify a note
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llvm-svn: 45914
2008-01-12 18:58:46 +00:00
87b0c13104
add some notes.
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llvm-svn: 45854
2008-01-11 06:17:47 +00:00
1d07b65add
add a note
...
llvm-svn: 45837
2008-01-10 18:25:41 +00:00
45e5032b1d
add a note
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llvm-svn: 45766
2008-01-09 00:17:57 +00:00
730d088be1
possible switch lowering improvement.
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llvm-svn: 45720
2008-01-07 21:38:14 +00:00
d7857eafd0
add a note
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llvm-svn: 45698
2008-01-07 07:46:23 +00:00
4e6cbb2fe2
this is done.
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llvm-svn: 45408
2007-12-29 19:38:02 +00:00
7cafd92aa9
expand note.
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llvm-svn: 45393
2007-12-29 01:05:01 +00:00
9d53b611d1
add a note.
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llvm-svn: 45388
2007-12-28 22:30:05 +00:00
180f0e9044
add a note
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llvm-svn: 45377
2007-12-28 04:42:05 +00:00
8b09a464b4
Fold certain additions through selects (and their compares) so as to eliminate subtractions. This code is often produced by the SMAX expansion in SCEV.
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This implements test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll
llvm-svn: 45158
2007-12-18 09:34:41 +00:00
52a9e40789
add a missed case.
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llvm-svn: 45141
2007-12-18 01:19:18 +00:00
7c709a5d08
implement a readme entry, compiling the code into:
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_foo:
movl $12, %eax
andl 4(%esp), %eax
movl _array(%eax), %eax
ret
instead of:
_foo:
movl 4(%esp), %eax
shrl $2, %eax
andl $3, %eax
movl _array(,%eax,4), %eax
ret
As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:
- movl 8(%eax), %eax
- shll $2, %eax
- andl $1020, %eax
- movl (%esi,%eax), %eax
+ movzbl 8(%eax), %eax
+ movl (%esi,%eax,4), %eax
- shll $2, %edx
- andl $1020, %edx
- movl (%edi,%edx), %edx
+ andl $255, %edx
+ movl (%edi,%edx,4), %edx
Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:
- andl $85, %ebx
- addl _bit_count(,%ebx,4), %ebp
+ shll $2, %ebx
+ andl $340, %ebx
+ addl _bit_count(%ebx), %ebp
llvm-svn: 44656
2007-12-06 07:33:36 +00:00
5e224c32f4
add a note
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llvm-svn: 44638
2007-12-05 23:05:06 +00:00
4d4e9cdb62
add a note
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llvm-svn: 42573
2007-10-03 06:10:59 +00:00
9958b82733
add a note
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llvm-svn: 36811
2007-05-05 22:44:08 +00:00
2cca31f77f
the mason example is implemented. Move some examples out of llvm/test,
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upgrade the syntax of some other examples.
llvm-svn: 36806
2007-05-05 22:29:06 +00:00
43cab75914
add a bad case evan though of.
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llvm-svn: 35296
2007-03-24 06:01:32 +00:00
9b3e2b4ad9
minor updates
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llvm-svn: 35143
2007-03-18 22:41:33 +00:00
f764441977
This is implemented. We now generate:
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entry:
icmp ugt i32 %x, 4 ; <i1>:0 [#uses=1]
br i1 %0, label %cond_true, label %cond_false
cond_true: ; preds = %entry
%tmp1 = tail call i32 (...)* @bar( i32 12 ) ; <i32> [#uses=0]
ret void
cond_false: ; preds = %entry
switch i32 %x, label %cond_true15 [
i32 4, label %cond_true3
i32 3, label %cond_true7
i32 2, label %cond_true11
i32 0, label %cond_false17
]
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llvm-svn: 35142
2007-03-18 14:37:20 +00:00
09575bac2e
For PR1195:
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Change use of "packed" term to "vector" in comments, strings, variable
names, etc.
llvm-svn: 34300
2007-02-15 03:39:18 +00:00
09a32e42bd
add a note
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llvm-svn: 34249
2007-02-13 21:44:43 +00:00
89e5813312
add a note: we need whole-function selectiondags :)
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llvm-svn: 33252
2007-01-16 06:39:48 +00:00
266e42b312
For PR950:
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This patch removes the SetCC instructions and replaces them with the ICmp
and FCmp instructions. The SetCondInst instruction has been removed and
been replaced with ICmpInst and FCmpInst.
llvm-svn: 32751
2006-12-23 06:05:41 +00:00
feeb9c7be5
Evan implemented the machineinstr improvements.
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The rot example works if the type is cast to ubyte.
Move sroa examples together and upgrade them to HEAD syntax.
llvm-svn: 32423
2006-12-11 00:44:03 +00:00
4d475f6e6e
add a note
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llvm-svn: 32347
2006-12-08 02:01:32 +00:00
0d67dde00a
done
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llvm-svn: 32013
2006-11-29 07:21:46 +00:00
6dc22332bf
add a note
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llvm-svn: 31719
2006-11-14 01:57:53 +00:00
0df2ada9d4
Cute example from Chris Lattner.
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llvm-svn: 31696
2006-11-13 00:23:28 +00:00
4e03cb1945
add a note about viterbi
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llvm-svn: 31612
2006-11-10 00:23:26 +00:00
7e885005ba
add a note
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llvm-svn: 31477
2006-11-06 21:26:49 +00:00
2048373e71
add a note
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llvm-svn: 31429
2006-11-03 22:27:39 +00:00
7e80b0b31e
For PR950:
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Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.
llvm-svn: 31195
2006-10-26 06:15:43 +00:00
f054003ba7
new bad case
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llvm-svn: 31156
2006-10-24 16:12:47 +00:00
3cbd1604f8
add a note about a general improvement to the code generator
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llvm-svn: 30642
2006-09-28 06:01:17 +00:00
f11327daab
more notes
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llvm-svn: 30598
2006-09-25 17:12:14 +00:00
b94df039c0
item done
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llvm-svn: 30483
2006-09-19 06:19:03 +00:00
4a13d3b391
This is closer to what we really want.
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llvm-svn: 30451
2006-09-18 04:54:35 +00:00
f7e3478745
add a note noticed through source inspection
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llvm-svn: 30418
2006-09-16 23:57:51 +00:00
c9dc375d3e
add a nate note
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llvm-svn: 30399
2006-09-15 20:31:36 +00:00
ac40a81253
We compile this into:
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_swap_16:
slwi r2, r3, 24
rlwimi r2, r3, 8, 8, 15
srwi r3, r2, 16
blr
now.
llvm-svn: 29864
2006-08-24 23:06:02 +00:00
Nick Lewycky