72a8bcf238
AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2 ]
...
llvm-svn: 35088
2007-03-13 21:05:54 +00:00
507eefa757
Zero is always a legal AM immediate.
...
llvm-svn: 35087
2007-03-13 20:37:59 +00:00
7aad92868c
Stack and register alignment of call arguments in the ELF ABI
...
llvm-svn: 35083
2007-03-13 15:02:46 +00:00
818242bbaf
Implement getTargetLowering() or else LSR won't be using ARM specific hooks.
...
llvm-svn: 35077
2007-03-13 01:20:42 +00:00
2150b9286f
Updated TargetLowering LSR addressing mode hooks for ARM and Thumb.
...
llvm-svn: 35075
2007-03-12 23:30:29 +00:00
b9dce9db85
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
...
llvm-svn: 35074
2007-03-12 23:29:01 +00:00
3ab7ea7965
More flexible TargetLowering LSR hooks for testing whether an immediate is
...
a legal target address immediate or scale.
llvm-svn: 35073
2007-03-12 23:28:50 +00:00
57f261b13a
Stupid bug: SSE2 supports v2i64 add / sub.
...
llvm-svn: 35070
2007-03-12 22:58:52 +00:00
e9b81f5366
Adding more arithmetic operators to MMX. This is an almost exact copy of
...
the addition. Please let me know if you have suggestions.
llvm-svn: 35055
2007-03-10 09:57:05 +00:00
09663aeac7
Minor stuff.
...
llvm-svn: 35049
2007-03-09 19:46:06 +00:00
31ef0ab7cf
Add comments about LSR / ARM.
...
llvm-svn: 35048
2007-03-09 19:35:33 +00:00
603f3094eb
Unfinished work and ideas related to register scavenger.
...
llvm-svn: 35047
2007-03-09 19:34:51 +00:00
368faf9acd
apply comments from review of last patch
...
llvm-svn: 35045
2007-03-09 19:18:59 +00:00
af0cff2671
Add some observations from CoreGraphics benchmark. Remove register
...
scavenging todo item, since it is now implemented.
llvm-svn: 35044
2007-03-09 17:58:17 +00:00
ea28fc5dc4
Implement inline asm modifier c.
...
llvm-svn: 35035
2007-03-08 22:42:46 +00:00
6092ce25cf
Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that
...
moves, loads, etc. are recognized.
llvm-svn: 35031
2007-03-08 22:09:11 +00:00
63170b6959
Fix a typo.
...
llvm-svn: 35030
2007-03-08 21:59:30 +00:00
ddf082082c
Putting more constants which do not contain relocations into .literal{4|8|16}
...
llvm-svn: 35026
2007-03-08 08:31:54 +00:00
e94a2f8026
Change register allocation order to Dale's suggestion.
...
llvm-svn: 35021
2007-03-08 02:56:40 +00:00
977195e912
Bug fix. Not advancing the register scavenger iterator correctly.
...
llvm-svn: 35020
2007-03-08 02:55:08 +00:00
d918477ac3
For Darwin, put constant data into .const, .const_data, .literal{4|8|16}
...
sections.
llvm-svn: 35017
2007-03-08 01:25:25 +00:00
13a1d96963
Put constant data to .const, .const_data, .literal{4|8|16} sections.
...
llvm-svn: 35016
2007-03-08 01:07:07 +00:00
58aeb9c444
Add ReadOnlySection directive.
...
llvm-svn: 35015
2007-03-08 01:00:38 +00:00
f030f2d628
Only safe to use a call-clobbered or spilled callee-saved register as scratch register.
...
llvm-svn: 35010
2007-03-07 20:30:36 +00:00
6d8211c0ac
Remove useless pattern fragments.
...
llvm-svn: 35009
2007-03-07 18:23:09 +00:00
ed4b303c10
Refactoring of formal parameter flags. Enable properly use of
...
zext/sext/aext stuff.
llvm-svn: 35008
2007-03-07 16:25:09 +00:00
97905b4027
Properly support v8i8 and v4i16 types. It now converts them to v2i32 for
...
load and stores.
llvm-svn: 35002
2007-03-07 05:43:18 +00:00
942fda027f
Fix DWARF debugging information on x86/Linux and (hopefully)
...
Mingw32/Cygwin targets. This fixes PR978
llvm-svn: 35000
2007-03-07 02:47:57 +00:00
17cdad0687
ARM always use register scavenger. No longer reserves R12.
...
llvm-svn: 34999
2007-03-07 02:46:23 +00:00
2818fdd019
Fix some brittle code. Watch out for cases where register scavenger is pointing to deleted instructions.
...
llvm-svn: 34998
2007-03-07 02:38:05 +00:00
67038e7a8b
Fix one more Thumb eliminateFrameIndex bug.
...
llvm-svn: 34990
2007-03-07 00:12:18 +00:00
5ed781b0db
Register scavenging is now on by default for ARM.
...
llvm-svn: 34987
2007-03-06 22:02:53 +00:00
41bc2fd242
Make load / store optimizer use register scavenger.
...
llvm-svn: 34986
2007-03-06 21:59:20 +00:00
bbd25984b7
Add LOAD/STORE support for MMX.
...
llvm-svn: 34978
2007-03-06 18:53:42 +00:00
d28de6700b
Code clean up. Prepare to use register scavenger.
...
llvm-svn: 34976
2007-03-06 18:02:41 +00:00
8b8cac289b
Minor interface change.
...
llvm-svn: 34967
2007-03-06 10:05:14 +00:00
4783ae8ac1
Scavenge a register using the register scavenger when needed.
...
llvm-svn: 34966
2007-03-06 10:03:56 +00:00
e7ec3bc7bc
Use new SDIselParamAttr enumeration. This removes "magick" constants
...
from formal attributes' flags processing.
llvm-svn: 34963
2007-03-06 08:12:33 +00:00
4f2e4e0f92
Switch PPC return lower to use an autogenerated CC description.
...
llvm-svn: 34940
2007-03-06 00:59:59 +00:00
b1c86b49ea
Add the emms intrinsic for MMX support.
...
llvm-svn: 34938
2007-03-05 23:09:45 +00:00
f10769dda7
Use init_array/fini_array sections for static contructors/destructors when the ABI is AAPCS.
...
Fix SingleSource/Regression/C/ConstructorDestructorAttributes test on arm-linux-gnueabi.
llvm-svn: 34931
2007-03-05 17:59:58 +00:00
b622c11f77
Unbreak VC++ build.
...
llvm-svn: 34917
2007-03-05 00:00:42 +00:00
d647f92a14
add missing braces
...
llvm-svn: 34905
2007-03-04 06:13:52 +00:00
1f87660d29
Make sure that when we store a value it is masked to its correct bit
...
width. This helps CBE work with non-standard integer bit widths.
llvm-svn: 34885
2007-03-03 16:33:33 +00:00
e6049c2f08
Emit low/high immediate loads properly for Linux/PPC.
...
llvm-svn: 34871
2007-03-03 05:29:51 +00:00
deaea25eb9
X86-64 VACOPY needs custom expansion. va_list is a struct { i32, i32, i8*, i8* }.
...
llvm-svn: 34857
2007-03-02 23:16:35 +00:00
57af2a4f3b
Simplify things
...
llvm-svn: 34849
2007-03-02 21:50:27 +00:00
9c7e5e365d
argument lowering should copy from the vreg shadows of live-in arguments
...
passed in registers, not directly from the pregs themselves.
llvm-svn: 34838
2007-03-02 05:12:29 +00:00
fc2f52128a
add a note
...
llvm-svn: 34837
2007-03-02 05:04:52 +00:00
32bc81341b
eliminate unnecessary reset of SP in epilog on darwin
...
llvm-svn: 34824
2007-03-02 01:17:17 +00:00
df30e2a68b
Wrap a long line.
...
llvm-svn: 34799
2007-03-01 19:48:16 +00:00
af8be4458f
Ensure that fastcall'ed function is correctly mangled & stack is
...
properly aligned
llvm-svn: 34788
2007-03-01 16:29:22 +00:00
75ab9799df
Implemented the frameaddress intrinsic for PPC.
...
llvm-svn: 34787
2007-03-01 13:11:38 +00:00
2c0fd3ee4c
Use a spilled free callee-saved register as scratch register.
...
llvm-svn: 34785
2007-03-01 08:57:52 +00:00
6f059e3e0a
- Track which callee-saved registers are spilled.
...
- Some code clean up.
llvm-svn: 34783
2007-03-01 08:26:31 +00:00
677bb3b460
Switch from std::vector<bool> to BitVector.
...
llvm-svn: 34781
2007-03-01 07:52:44 +00:00
65c75b57d4
Get rid of verboten <iostream> include.
...
llvm-svn: 34777
2007-03-01 06:05:39 +00:00
962fa8eb9a
Changes requested in review of last pass. Also pulled isThumb into a
...
member, instead of resetting in every function that uses it.
llvm-svn: 34764
2007-02-28 23:20:38 +00:00
f6ca943638
Doh. ARM::PC is obvious a reserved register.
...
llvm-svn: 34763
2007-02-28 23:12:34 +00:00
440995bd9a
Add intelligence about where to break large blocks.
...
llvm-svn: 34755
2007-02-28 18:41:23 +00:00
7373f3a351
remove dead option
...
llvm-svn: 34754
2007-02-28 18:39:53 +00:00
eb09e28ccc
bugfix: fastcall does not require the first two params to be marked 'inreg',
...
they always get registers.
llvm-svn: 34748
2007-02-28 18:35:11 +00:00
e0232ec706
More Mach-O writer improvements.
...
llvm-svn: 34740
2007-02-28 07:40:50 +00:00
152bfa103e
use high-level functions in CCState
...
llvm-svn: 34739
2007-02-28 07:09:55 +00:00
227b6c5d19
make use of helper functions in CCState for analyzing formals and calls.
...
llvm-svn: 34737
2007-02-28 07:00:42 +00:00
d439e86078
switch LowerFastCCCallTo over to using the new fastcall description.
...
llvm-svn: 34734
2007-02-28 06:26:33 +00:00
66e1d1dd7e
switch LowerFastCCArguments over to using the autogenerated Fastcall description.
...
llvm-svn: 34733
2007-02-28 06:21:19 +00:00
0bc74fd6cc
add new CC_X86_32_FastCall calling conv, which describes fastcall on win32.
...
Factor out a CC_X86_32_Common convention, which is the part shared between
ccc, stdcall and fastcall
llvm-svn: 34732
2007-02-28 06:20:01 +00:00
3066beccb5
rearrange code
...
llvm-svn: 34731
2007-02-28 06:10:12 +00:00
3ed3be3b4a
remove fastcc (not fastcall) support
...
llvm-svn: 34730
2007-02-28 06:05:16 +00:00
b9db225049
switch LowerCCCArguments over to using autogenerated CC.
...
llvm-svn: 34729
2007-02-28 05:46:49 +00:00
5958b176f3
simplify sret handling
...
llvm-svn: 34728
2007-02-28 05:39:26 +00:00
be7995953a
switch LowerCCCCallTo over to using an autogenerated callingconv
...
llvm-svn: 34727
2007-02-28 05:31:48 +00:00
0c0a7b288e
rename stuff
...
llvm-svn: 34726
2007-02-28 05:30:29 +00:00
6f287c6e92
rename some CCActions, add CCIfInReg
...
llvm-svn: 34725
2007-02-28 05:29:33 +00:00
ba3d273122
switch return value passing and the x86-64 calling convention information
...
over to being autogenerated from the X86CallingConv.td file.
llvm-svn: 34722
2007-02-28 04:55:35 +00:00
659ca56383
make subtarget references work.
...
llvm-svn: 34721
2007-02-28 04:51:41 +00:00
e8af69632f
Make requiresRegisterScavenging determination on a per MachineFunction basis.
...
llvm-svn: 34711
2007-02-28 00:59:19 +00:00
9049cd72e6
Temporary: make R12 available in ARM mode if RegScavenger is being used.
...
llvm-svn: 34709
2007-02-28 00:22:44 +00:00
30508919c8
Start making use of RegScavenger.
...
llvm-svn: 34708
2007-02-28 00:21:58 +00:00
95ae95a6a6
PEI now passes a RegScavenger ptr to eliminateFrameIndex.
...
llvm-svn: 34707
2007-02-28 00:21:17 +00:00
ee8aca0cfa
Minor tweak. Allocate r0 to r3 in reverse order, r3 is least likely to be livein to a function.
...
llvm-svn: 34701
2007-02-27 23:03:55 +00:00
c5e2a3a80e
reenable generation of CC info
...
llvm-svn: 34699
2007-02-27 22:12:19 +00:00
6f0969ecb9
Back out previous commit temporarily.
...
llvm-svn: 34694
2007-02-27 21:47:22 +00:00
71a7271b8b
Let MRegisterInfo now owns RegScavenger; eliminateFrameIndex must preserve register kill info.
...
llvm-svn: 34692
2007-02-27 21:12:35 +00:00
aeb9ebe3cf
implement CCMatchIfCC in terms of CCMatchIf
...
llvm-svn: 34685
2007-02-27 20:45:02 +00:00
98c9bd586e
build cc info
...
llvm-svn: 34684
2007-02-27 20:44:31 +00:00
2ebb2e99d1
a note
...
llvm-svn: 34670
2007-02-27 17:21:09 +00:00
b524dfd557
Fix parenthesis for BCTRL_{ELF|Macho} test.
...
llvm-svn: 34668
2007-02-27 13:10:41 +00:00
89d81878d2
Differentiate between the MachO and the ELF ABI the CALL instruction.
...
llvm-svn: 34667
2007-02-27 13:01:19 +00:00
b6e200bd68
Duplicate use of LR, take 2.
...
llvm-svn: 34666
2007-02-27 11:55:45 +00:00
fa9227ed54
Add calling convention info
...
llvm-svn: 34661
2007-02-27 06:59:52 +00:00
db2049fb8e
move target independent calling convention stuff to TargetCallingConv.td
...
llvm-svn: 34659
2007-02-27 05:57:32 +00:00
4c83b98604
fill in some holes
...
llvm-svn: 34658
2007-02-27 05:51:05 +00:00
c9eed39a5d
switch x86-64 return value lowering over to using same mechanism as argument
...
lowering uses.
llvm-svn: 34657
2007-02-27 05:28:59 +00:00
9f059194a7
Minor refactoring of CC Lowering interfaces
...
llvm-svn: 34656
2007-02-27 05:13:54 +00:00
dc3adc83e7
move CC Lowering stuff to its own public interface
...
llvm-svn: 34655
2007-02-27 04:43:02 +00:00
2e5e8407ad
refactor x86-64 argument lowering yet again, this time eliminating templates,
...
'clients', etc, and adding CCValAssign instead.
llvm-svn: 34654
2007-02-27 04:18:15 +00:00
5d7ce57c13
Backing out Jim's LR spill changes. This was causing llvm-gcc bootstrapping
...
to infinite loop:
PPCMachineFunctionInfo.h updated: 1.2 -> 1.3
PPCRegisterInfo.cpp updated: 1.110 -> 1.111
PPCRegisterInfo.h updated: 1.28 -> 1.29
llvm-svn: 34652
2007-02-27 02:55:29 +00:00
535bd6d3ba
always lower to RETFLAG, never leave it as just ret.
...
llvm-svn: 34639
2007-02-26 19:44:02 +00:00
77f0a1553c
fix attribution
...
llvm-svn: 34637
2007-02-26 18:56:07 +00:00
5d00a0b8a9
Add a description of the X86-64 calling convention and the return
...
conventions. This doesn't do anything yet, but may in the future.
llvm-svn: 34636
2007-02-26 18:17:14 +00:00
ff19957468
switch to smallvector
...
llvm-svn: 34633
2007-02-26 07:59:53 +00:00
294780829a
initial hack at splitting the x86-64 calling convention info out from the
...
mechanics that process it. I'm still not happy with this, but it's a step
in the right direction.
llvm-svn: 34631
2007-02-26 07:50:02 +00:00
d41bff0f97
the truncate must always be done, it's only the assert that is conditional.
...
llvm-svn: 34628
2007-02-26 05:21:05 +00:00
74f5bcf8eb
add an accessor.
...
llvm-svn: 34625
2007-02-26 04:01:25 +00:00
1db979bae8
in X86-64 CCC, i8/i16 arguments are already properly zext/sext'd on input.
...
Capture this so that downstream zext/sext's are optimized out. This
compiles:
int test(short X) { return (int)X; }
to:
_test:
movl %edi, %eax
ret
instead of:
_test:
movswl %di, %eax
ret
GCC produces this bizarre code:
_test:
movw %di, -12(%rsp)
movswl -12(%rsp),%eax
ret
llvm-svn: 34623
2007-02-26 03:18:56 +00:00
8924332e22
Fix an X86-64 abi bug. We now compile:
...
void foo(short);
void bar(unsigned short A) {
foo(A);
}
into:
_bar:
subq $8, %rsp
movswl %di, %edi
call _foo
addq $8, %rsp
ret
instead of:
_bar:
subq $8, %rsp
call _foo
addq $8, %rsp
ret
Testcase here: test/CodeGen/X86/x86-64-shortint.ll
llvm-svn: 34615
2007-02-25 23:10:46 +00:00
3e0703357f
fix CodeGen/X86/2007-02-25-FastCCStack.ll, a regression from my patch last
...
night: fastcc returns should only go in XMM0 if we have SSE2 or above.
llvm-svn: 34613
2007-02-25 22:23:46 +00:00
1ee61ab414
no really, this is the right patch
...
llvm-svn: 34605
2007-02-25 20:01:40 +00:00
4d2f5f8740
always promote float varargs to double.
...
llvm-svn: 34604
2007-02-25 19:59:18 +00:00
84ab9a556c
one important bugfix: PPC32 didn't have both elf and macho support for
...
external symbols and global addresses. Add the missing ones.
one important workaround: PPCISD::CALL is matched by both PPCcall_ELF
and PPCcall_Macho, disable the _ELF patterns for now.
llvm-svn: 34601
2007-02-25 19:20:53 +00:00
c2f3d015e0
cosmetic changes from review of last patch. obvious
...
llvm-svn: 34598
2007-02-25 18:31:31 +00:00
fcee9b5568
fastcc functions that return double values now return them in xmm0 on x86-32.
...
This implements CodeGen/X86/fp-stack-ret.ll:test[23]
llvm-svn: 34592
2007-02-25 09:31:16 +00:00
9d9cc84f5b
allow vectors to be passed to stdcall/fastcall functions
...
llvm-svn: 34590
2007-02-25 09:14:25 +00:00
2fc0d70392
move LowerRET into the 'Return Value Calling Convention Implementation'
...
section of the file.
llvm-svn: 34589
2007-02-25 09:12:39 +00:00
ba474f58a4
make all Lower*CallTo implementations use LowerCallResult to handle their
...
result value stuff. This eliminates a bunch of duplicated code and now
GetRetValueLocs is the sole place that decides where a value is returned.
llvm-svn: 34588
2007-02-25 09:10:05 +00:00
7802f3e2ea
pass the calling convention into Lower*CallTo, instead of using ad-hoc flags.
...
llvm-svn: 34587
2007-02-25 09:06:15 +00:00
0cd9960fe7
factor a bunch of code out of LowerCCCCallTo into a new LowerCallResult
...
function. This function now uses GetRetValueLocs to determine *where*
the result values are located and concerns itself with *how* to pull the
values out.
llvm-svn: 34586
2007-02-25 08:59:22 +00:00
3c76309a5b
move some code around, pass in calling conv, even though it is unused
...
llvm-svn: 34585
2007-02-25 08:29:00 +00:00
dfda38f7dc
simplify result value lowering by splitting the selection of *where* to return
...
registers out from the logic of *how* to return them.
This changes X86-64 to mark EAX live out when returning a 32-bit value,
where before it marked RAX liveout.
llvm-svn: 34582
2007-02-25 08:15:11 +00:00
d6b853ad1b
make void-return not a special case
...
llvm-svn: 34579
2007-02-25 07:18:38 +00:00
35a08551a5
eliminate a bunch more temporary vectors from X86 lowering.
...
llvm-svn: 34578
2007-02-25 07:10:00 +00:00
e56fef9b51
eliminate temporary vectors created during X86 lowering.
...
llvm-svn: 34577
2007-02-25 06:40:16 +00:00
84141d4e99
remove std::vector's in RET lowering.
...
llvm-svn: 34576
2007-02-25 06:21:57 +00:00
43df5b335c
implement support for the linux/ppc function call ABI. Patch by
...
Nicolas Geoffray!
llvm-svn: 34574
2007-02-25 05:34:32 +00:00
b9bd34f54a
Add XLForm_1_ext template, patch by Nicolas Geoffray.
...
llvm-svn: 34573
2007-02-25 05:07:49 +00:00
249edb8b67
Improve JIT support for linux/ppc: Patch by Nicolas Geoffray!
...
llvm-svn: 34572
2007-02-25 05:04:13 +00:00
e80e31eada
remove crediting of Evan Cheng and me.
...
llvm-svn: 34568
2007-02-25 01:42:36 +00:00
01ee5750f4
Removed WaterListOffset, inserted BBOffsets. Remove TODO item about this
...
from README.
When no water available, use end of block if in range. (More to do here.)
llvm-svn: 34563
2007-02-25 00:47:03 +00:00
77a345f000
PR1164:
...
Generate local names with a "llvm_cbe_" prefix using the actual name of the
variable instead of a temporary name.
llvm-svn: 34540
2007-02-23 22:45:08 +00:00
0eb70ebbe5
bugfix: SP wasn't updated for varargs when frame pointer was eliminated.
...
llvm-svn: 34537
2007-02-23 21:53:48 +00:00
2f28a3cf08
Don't spill LR as a callee saved register.
...
llvm-svn: 34533
2007-02-23 20:34:16 +00:00
3e906c48d3
Fix stack alignment in functions with varargs.
...
llvm-svn: 34532
2007-02-23 20:32:57 +00:00
e18b13b213
rewrite of constant islands
...
llvm-svn: 34523
2007-02-23 05:02:36 +00:00
9f8301413c
Added -march=thumb; removed -enable-thumb.
...
llvm-svn: 34521
2007-02-23 03:14:31 +00:00
d00d344519
80 col. violation.
...
llvm-svn: 34520
2007-02-23 03:03:16 +00:00
01b49ce415
External weak linkage is supported by recent binutils on mingw32.
...
llvm-svn: 34519
2007-02-23 01:58:50 +00:00
df5899258c
By default, spills kills the register being stored.
...
llvm-svn: 34515
2007-02-23 01:10:04 +00:00
15af662314
Add option to turn on register scavenger; By default, spills kills the register being stored.
...
llvm-svn: 34514
2007-02-23 01:09:11 +00:00
0416b204c9
remove obsolete file
...
llvm-svn: 34506
2007-02-22 23:48:43 +00:00
e0008e23cf
Simplify lowering and selection of exception ops.
...
llvm-svn: 34488
2007-02-22 14:56:36 +00:00
3796abea0f
Support to provide exception and selector registers.
...
llvm-svn: 34482
2007-02-21 22:54:50 +00:00
18fc09723c
Add support for changes in DwarfWriter.
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llvm-svn: 34478
2007-02-21 22:47:38 +00:00
af76e0e58f
Add TAI field for exception table section.
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llvm-svn: 34477
2007-02-21 22:43:40 +00:00
84a041eb98
ELF / PIC requires GOT be in the EBX register during calls via PLT GOT pointer.
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Add implicit uses of EBX to calls to ensure liveintervalanalysis does not treat
the GOT in EBX move as dead upon definition.
This should fix PR1207.
llvm-svn: 34470
2007-02-21 21:18:14 +00:00
8c8597c4d9
Fix typos in comments.
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llvm-svn: 34456
2007-02-20 20:52:03 +00:00
b68a774fd9
How the heck did I forget patterns for llvm.x86.sse2.cmp.sd?
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llvm-svn: 34434
2007-02-20 00:39:09 +00:00
b6d01caf22
Simplify some code by moving variable declarations into the only block that
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uses them.
llvm-svn: 34432
2007-02-19 23:30:10 +00:00
421bad0dc5
Implement support for non-standard integer bit widths of any size. The
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rules alignment is to pick the alignment that corresponds to the smallest
specified alignment that is larger than the bit width of the type or the
largest specified integer alignment if none are larger than the bitwidth
of the type. For the byte size, the size returned is the next larger
multiple of the alignment for that type (using the above rule). This patch
also changes bit widths from "short" to "uint32_t" to ensure there are
enough bits to specify any bit width that LLVM can handle (currently 2^23);
16-bits isn't enough.
llvm-svn: 34431
2007-02-19 22:35:00 +00:00
Evan Cheng