Commit Graph

320786 Commits

Author SHA1 Message Date
Kristof Umann 00aab1d45e [analyzer][CFG] Return the correct terminator condition
For the following terminator statement:

if (A && B && C && D)
The built CFG is the following:

[B5 (ENTRY)]
  Succs (1): B4

[B1]
  1: 10
  2: j
  3: [B1.2] (ImplicitCastExpr, LValueToRValue, int)
  4: [B1.1] / [B1.3]
  5: int x = 10 / j;
  Preds (1): B2
  Succs (1): B0

[B2]
  1: C
  2: [B2.1] (ImplicitCastExpr, LValueToRValue, _Bool)
  T: if [B4.4] && [B3.2] && [B2.2]
  Preds (1): B3
  Succs (2): B1 B0

[B3]
  1: B
  2: [B3.1] (ImplicitCastExpr, LValueToRValue, _Bool)
  T: [B4.4] && [B3.2] && ...
  Preds (1): B4
  Succs (2): B2 B0

[B4]
  1: 0
  2: int j = 0;
  3: A
  4: [B4.3] (ImplicitCastExpr, LValueToRValue, _Bool)
  T: [B4.4] && ...
  Preds (1): B5
  Succs (2): B3 B0

[B0 (EXIT)]
  Preds (4): B1 B2 B3 B4

However, even though the path of execution in B2 only depends on C's value,
CFGBlock::getCondition() would return the entire condition (A && B && C). For
B3, it would return A && B. I changed this the actual condition.

Differential Revision: https://reviews.llvm.org/D63538

llvm-svn: 365036
2019-07-03 12:53:19 +00:00
Fangrui Song 5cf3cc6246 [ELF][RISCV] Allow R_RISCV_ADD in relocateNonAlloc()
gcc may generate .debug_info/.debug_aranges/.debug_line/etc that are
relocated by R_RISCV_ADD*/R_RISCV_SUB* pairs.
Allow R_RISCV_ADD in non-SHF_ALLOC section to fix link errors like:

    ld.lld: error: print.c:(.debug_frame+0x60): has non-ABS relocation R_RISCV_ADD64 against symbol '.L0 '

Differential Revision: https://reviews.llvm.org/D63259

llvm-svn: 365035
2019-07-03 12:48:04 +00:00
Simon Atanasyan a10bf0939d [mips] Mark general scheduling model as complete
llvm-svn: 365034
2019-07-03 12:28:05 +00:00
Simon Atanasyan 4d364659f9 [mips] Add missing atomic instructions to general scheduling definitions
llvm-svn: 365033
2019-07-03 12:27:58 +00:00
Simon Atanasyan 3e4c7eb33e [mips] Add missing microMIPS instructions to general scheduling definitions
llvm-svn: 365032
2019-07-03 12:27:51 +00:00
Simon Pilgrim bc7f30e85c Fix -Wcast-qual const warning. NFCI.
llvm-svn: 365031
2019-07-03 12:20:28 +00:00
Kristof Umann b069bbf510 Make a buildbot using a buggy gcc happy
When specializing a template in a namespace, it has to be in a namespace
block, else gcc will get confused. Hopefully this fixes the issue.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56480

llvm-svn: 365030
2019-07-03 12:06:10 +00:00
Kristof Umann c4b89fec5f Specialize an anchor() function in the correct namespace
llvm-svn: 365029
2019-07-03 11:54:47 +00:00
Kristof Umann 71a9dc39e4 [analyzer][Dominator] Add post dominators to CFG + a new debug checker
Transform clang::DominatorTree to be able to also calculate post dominators.

* Tidy up the documentation
* Make it clang::DominatorTree template class (similarly to how
  llvm::DominatorTreeBase works), rename it to clang::CFGDominatorTreeImpl
* Clang's dominator tree is now called clang::CFGDomTree
* Clang's brand new post dominator tree is called clang::CFGPostDomTree
* Add a lot of asserts to the dump() function
* Create a new checker to test the functionality

Differential Revision: https://reviews.llvm.org/D62551

llvm-svn: 365028
2019-07-03 11:39:12 +00:00
Simon Pilgrim 8c099cbe7c [X86][SSE] lowerUINT_TO_FP_v2i32 - explicitly cast half word to double
Fixes MSVC analyzer extension->double warning.

llvm-svn: 365027
2019-07-03 11:23:27 +00:00
Kristof Umann 85211c0835 [Dominators] PR42041: Skip nullpointer successors
https://bugs.llvm.org/show_bug.cgi?id=42041

In Clang's CFG, we use nullpointers to represent unreachable nodes, for
example, in the included testfile, block B0 is unreachable from block
B1, resulting in a nullpointer dereference somewhere in
llvm::DominatorTreeBase<clang::CFGBlock, false>::recalculate.

This patch fixes this issue by specializing
llvm::DomTreeBuilder::SemiNCAInfo::ChildrenGetter::Get for
clang::CFG to not contain nullpointer successors.

Differential Revision: https://reviews.llvm.org/D62507

llvm-svn: 365026
2019-07-03 11:14:42 +00:00
Simon Pilgrim 8df90b843d [X86][SSE] LowerINSERT_VECTOR_ELT - ensure insertion index correctness. NFCI.
Assert that the insertion index is in range and use uint64_t for the index to fix MSVC/cppcheck truncation warning.

llvm-svn: 365025
2019-07-03 10:59:52 +00:00
Simon Pilgrim 8853bd9592 [X86][SSE] LowerScalarImmediateShift - ensure shift amount correctness. NFCI.
Assert that the shift amount is in range and create vXi8 shift masks in a way that doesn't cause MSVC/cppcheck shift result is truncated then extended warnings.

llvm-svn: 365024
2019-07-03 10:47:33 +00:00
Simon Atanasyan 3e41b97f14 [mips] Add SIGRIE,GINVI,GINVT to general scheduling definitions
llvm-svn: 365023
2019-07-03 10:33:16 +00:00
Simon Atanasyan dc3c67bbe2 [mips] Add missing mips16 instructions to general scheduling definitions
llvm-svn: 365022
2019-07-03 10:33:09 +00:00
Simon Atanasyan b04f6a1a25 [mips] Add missing MSA and ASE instructions to general scheduling definitions
llvm-svn: 365021
2019-07-03 10:33:01 +00:00
Simon Atanasyan e5dfbe83b6 [mips] Replace some itineraries by instructions in the general scheduling definitions
llvm-svn: 365020
2019-07-03 10:32:54 +00:00
Simon Pilgrim a372bb21c3 Fix MSVC "signed/unsigned mismatch" warning. NFCI.
Fixes PR42426.

llvm-svn: 365019
2019-07-03 10:26:28 +00:00
Simon Pilgrim 64e3a51534 Fix uninitialized variable warnings. NFCI.
Both MSVC and cppcheck don't like the fact that the variables are initialized via references.

llvm-svn: 365018
2019-07-03 10:22:08 +00:00
Ivan Donchevskii 080014ee6d [clang-tidy] Fix the YAML created for checks like modernize-pass-by-value
Currently this check generates the replacement with the newline in the end.
The proper way to export it to YAML is to have two \n\n instead of one.
Without this fix clients should reinterpret the replacement as
"#include <utility> " instead of "#include <utility>\n"

Differential Revision: https://reviews.llvm.org/D63482

llvm-svn: 365017
2019-07-03 10:21:50 +00:00
Simon Pilgrim 7b7b9b78a2 [X86] LowerFunnelShift - use modulo constant shift amount.
This avoids the use of getZExtValue and uses the modulo shift amount which is whats expected for funnel shifts anyhow. 

llvm-svn: 365016
2019-07-03 10:04:16 +00:00
Fangrui Song 347692e2de [ELF] Allow placing SHF_MERGE sections with different alignments into the same MergeSyntheticSection
This should fix PR42289: the Linux kernel has a use case that input
files have .rodata.cst32 sections with different alignments. The
expectation (and what ld.bfd and gold do) is that in the -r link, there
is only one .rodata.cst32 (SHF_MERGE sections with different alignments
can be combined), but lld currently creates one for each different
alignment.

The current merging strategy:

1) Group SHF_MERGE sections by (name, sh_flags, sh_entsize and
   sh_addralign). String merging is performed among a group, even if -O0 is specified.
2) Create one output section for each group. This is a special case in
   addInputSec().

This patch changes 1) to:

1) Group SHF_MERGE sections by (name, sh_flags, sh_entsize).
   String merging is performed among a group, even if -O0 is specified.

We will thus create just one .rodata.cst32 . This also improves merging
efficiency when sections with the same name but different alignments are
combined.

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D63432

llvm-svn: 365015
2019-07-03 10:03:49 +00:00
Oliver Stannard 830b20344b [ARM] Thumb2: favor R4-R7 over R12/LR in allocation order when opt for minsize
For Thumb2, we prefer low regs (costPerUse = 0) to allow narrow
encoding. However, current allocation order is like:
  R0-R3, R12, LR, R4-R11

As a result, a lot of instructs that use R12/LR will be wide instrs.

This patch changes the allocation order to:
  R0-R7, R12, LR, R8-R11
for thumb2 and -Osize.

In most cases, there is no extra push/pop instrs as they will be folded
into existing ones. There might be slight performance impact due to more
stack usage, so we only enable it when opt for min size.

https://reviews.llvm.org/D30324

llvm-svn: 365014
2019-07-03 09:58:52 +00:00
Sven van Haastregt 1bc2cccf18 Remove some autoconf references from docs and comments
The autoconf build system support has been removed a while ago, remove
some outdated references.

Differential Revision: https://reviews.llvm.org/D63608

llvm-svn: 365013
2019-07-03 09:57:59 +00:00
Simon Pilgrim 71600be3f3 Fix MSVC "not all control paths return a value" warnings. NFCI.
llvm-svn: 365012
2019-07-03 09:54:25 +00:00
Roman Lebedev 9f0c83902d [InstCombine] Y - ~X --> X + Y + 1 fold (PR42457)
Summary:
I *think* we'd want this new variant, because we obviously
have better handling for `add` as compared to `sub`/`not`.

https://rise4fun.com/Alive/WMn

Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=42457 | PR42457 ]]

Reviewers: spatel, nikic, huihuiz, efriedma

Reviewed By: spatel

Subscribers: RKSimon, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63992

llvm-svn: 365011
2019-07-03 09:41:50 +00:00
Roman Lebedev c4b83a6054 [Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)
Summary:
This is the backend part of [[ https://bugs.llvm.org/show_bug.cgi?id=42457 | PR42457 ]].
In middle-end, we'd want to prefer the form with two adds - D63992,
but as this diff shows, not every target will prefer that pattern.

Out of 4 targets for which i added tests all seem to be ok with inc-of-add for scalars,
but only X86 prefer that same pattern for vectors.

Here i'm adding a new TLI hook, always defaulting to the inc-of-add,
but adding AArch64,ARM,PowerPC overrides to prefer inc-of-add only for scalars.

Reviewers: spatel, RKSimon, efriedma, t.p.northover, hfinkel

Reviewed By: efriedma

Subscribers: nemanjai, javed.absar, kristof.beyls, kbarton, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64090

llvm-svn: 365010
2019-07-03 09:41:35 +00:00
Eugene Leviant ac407a7b4a [SCEV][LSR] Prevent using undefined value in binops
On some occasions ReuseOrCreateCast may convert previously
expanded value to undefined. That value may be passed by
SCEVExpander as an argument to InsertBinop making IV chain
undefined.

Differential revision: https://reviews.llvm.org/D63928 

llvm-svn: 365009
2019-07-03 09:36:32 +00:00
Alexander Potapenko f82672873a MSan: handle callbr instructions
Summary:
Handling callbr is very similar to handling an inline assembly call:
MSan must checks the instruction's inputs.
callbr doesn't (yet) have outputs, so there's nothing to unpoison,
and conservative assembly handling doesn't apply either.

Fixes PR42479.

Reviewers: eugenis

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64072

llvm-svn: 365008
2019-07-03 09:28:50 +00:00
Dmitri Gribenko e6020f5c62 [clang-tidy] new check: bugprone-posix-return
Summary:
Checks if any calls to posix functions (except posix_openpt) expect negative return values.
These functions return either 0 on success or an errno on failure, which is positive only.

Reviewers: JonasToth, gribozavr, alexfh, hokein

Reviewed By: gribozavr

Subscribers: Eugene.Zelenko, lebedev.ri, llozano, george.burgess.iv, xazax.hun, srhines, mgorny, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D63623

Patch by Jian Cai.

llvm-svn: 365007
2019-07-03 09:20:18 +00:00
Fangrui Song 7264a474b7 Change std::{lower,upper}_bound to llvm::{lower,upper}_bound or llvm::partition_point. NFC
llvm-svn: 365006
2019-07-03 08:13:17 +00:00
Kadir Cetinkaya 1f6d9845d8 [clang][HeaderSearch] Shorten paths for includes in mainfile's directory
Summary:
Currently HeaderSearch only looks at SearchDir's passed into it, but in
addition to those paths headers can be relative to including file's directory.

This patch makes sure that is taken into account.

Reviewers: gribozavr

Subscribers: jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D63295

llvm-svn: 365005
2019-07-03 07:47:19 +00:00
Rui Ueyama 09a0d3d1a2 Avoid identifiers that are different only in case. NFC.
llvm-svn: 365004
2019-07-03 07:08:27 +00:00
Rui Ueyama 11ae59f0ce Avoid identifiers that are different only in case. NFC.
Some variables in lld have the same name as functions ignoring case.
This patch gives them different names, so that my next patch is easier
to read.

llvm-svn: 365003
2019-07-03 06:11:50 +00:00
Serguei Katkov c22e772a28 [LoopPeel] Re-factor llvm::peelLoop method. NFC.
Extract code dealing with branch weights in separate functions.

Reviewers: reames, mkuper, iajbar, fhahn
Reviewed By: reames, fhahn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D63917

llvm-svn: 365002
2019-07-03 05:59:23 +00:00
Rui Ueyama 556305fc44 Revert r364999: [lld] Use -o /dev/null in test when output is not needed.
This reverts commit r364999 as it broke a build. Looks like `%t.archive.o`
is used two lines below where it was created.

llvm-svn: 365001
2019-07-03 05:52:35 +00:00
Jordan Rupprecht 02647f73d4 Revert [InlineCost] cleanup calculations of Cost and Threshold
This reverts r364422 (git commit 1a3dc76186)

The inlining cost calculation is incorrect, leading to stack overflow due to large stack frames from heavy inlining.

llvm-svn: 365000
2019-07-03 04:01:51 +00:00
Sam Clegg d5bea6e0c1 [lld] Use -o /dev/null in test when output is not needed.
Feedback nit from rL364998

llvm-svn: 364999
2019-07-03 02:41:00 +00:00
Sam Clegg 99745896ce [ELF] Error on archive with missing index
This matches the wasm lld and GNU ld behavior.

The ELF linker has special handling for bitcode archives but if that
doesn't kick in we probably want to error out rather than silently
ignore the library.

Differential Revision: https://reviews.llvm.org/D63781

llvm-svn: 364998
2019-07-03 02:29:02 +00:00
Teresa Johnson ba5a72ff8d [ThinLTO] Reenable test with workaround for known failure
Reenable the testing disabled in r364978 with the same workaround used
for this failure in the cfi-devirt.ll test. The known issue is PR39436,
and the workaround is to add -verify-machineinstrs=0.

llvm-svn: 364997
2019-07-03 02:14:47 +00:00
Kito Cheng eb9bc38276 [ELF][RISCV] Support RISC-V in getBitcodeMachineKind
Add Triple::riscv64 and Triple::riscv32 to getBitcodeMachineKind for get right
e_machine during LTO.

Reviewed By: ruiu, MaskRay

Differential Revision: https://reviews.llvm.org/D52165

llvm-svn: 364996
2019-07-03 02:13:11 +00:00
Michael Liao 80177ca5a9 [AMDGPU] Enable serializing of argument info.
Summary:
- Support serialization of all arguments in machine function info. This
  enables fabricating MIR tests depending on argument info.

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64096

llvm-svn: 364995
2019-07-03 02:00:21 +00:00
Amara Emerson cac1151845 [AArch64][GlobalISel] Overhaul legalization & isel or shifts to select immediate forms.
There are two main issues preventing us from generating immediate form shifts:
1) We have partial SelectionDAG imported support for G_ASHR and G_LSHR shift
immediate forms, but they currently don't work because the amount type is
expected to be an s64 constant, but we only legalize them to have homogenous
types.

To deal with this, first we introduce a custom legalizer to *only* custom legalize
s32 shifts which have a constant operand into a s64.

There is also an additional artifact combiner to fold zexts(g_constant) to a
larger G_CONSTANT if it's legal, a counterpart to the anyext version committed
in an earlier patch.

2) For G_SHL the importer can't cope with the pattern. For this I introduced an
early selection phase in the arm64 selector to select these forms manually
before the tablegen selector pessimizes it to a register-register variant.

Differential Revision: https://reviews.llvm.org/D63910

llvm-svn: 364994
2019-07-03 01:49:06 +00:00
Chen Zheng dfdccbb26b [PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop.
Differential Revision: https://reviews.llvm.org/D63477

llvm-svn: 364993
2019-07-03 01:49:03 +00:00
Artem Dergachev ab758ba128 [analyzer] exploded-graph-rewriter: Implement bug nodes and sink nodes.
Add a label to nodes that have a bug report attached or on which
the analysis was generally interrupted.

Fix printing has_report and implement printing is_sink in the graph dumper.

Differential Revision: https://reviews.llvm.org/D64110

llvm-svn: 364992
2019-07-03 01:26:41 +00:00
Artem Dergachev 5fcf92e153 [analyzer] exploded-graph-rewriter: NFC: Add more comments.
llvm-svn: 364991
2019-07-03 01:26:38 +00:00
Artem Dergachev 48a5c83af4 [analyzer] exploded-graph-rewriter: Collapse very long statement pretty-prints.
When printing various statements that include braces (compound
statements, lambda expressions, statement-expressions, etc.),
replace the code between braces with '...'.

Differential Revision: https://reviews.llvm.org/D64104

llvm-svn: 364990
2019-07-03 01:26:35 +00:00
Artem Dergachev deb7accbea [analyzer] exploded-graph-rewriter: Implement checker messages.
They are displayed as raw lines and diffed via difflib on a per-checker basis.

Differential Revision: https://reviews.llvm.org/D64100

llvm-svn: 364989
2019-07-03 01:26:32 +00:00
Alex Lorenz 3dbdbbec84 [triple] Use 'macabi' environment name for the Mac Catalyst triples
The 'macabi' environment name is preferred instead of 'maccatalyst'.

llvm-svn: 364988
2019-07-03 01:02:43 +00:00
Nilanjana Basu c0b557744a Revert Changing CodeView debug info type record representation in assembly files to make it more human-readable & editable
This reverts r364982 (git commit 2082bf28eb)

llvm-svn: 364987
2019-07-03 00:51:49 +00:00