842e144922
Add the private keyword to the polygen grammar.
...
llvm-svn: 76135
2009-07-17 01:07:45 +00:00
32c5428590
Add the private keyword to the VIM syntax highlighting.
...
llvm-svn: 76134
2009-07-17 01:06:53 +00:00
76b561dd70
Fix my brain cramp by inverting the assertion condition.
...
llvm-svn: 76131
2009-07-17 00:32:06 +00:00
062853552e
Fix "no newline at end of file" warning from gcc.
...
llvm-svn: 76127
2009-07-16 23:58:14 +00:00
4118ddeeed
Privatize the MDNode uniquing table.
...
llvm-svn: 76126
2009-07-16 23:44:30 +00:00
c5df7e2dc1
Emit cross regclass register moves for thumb2.
...
Minor code duplication cleanup.
llvm-svn: 76124
2009-07-16 23:26:06 +00:00
f60abdbb5a
Disable this assert for now, it is firing on an llvm-gcc bootstrap. :(
...
llvm-svn: 76123
2009-07-16 23:02:46 +00:00
e6fc4d6994
Add new flags '-test-cflags' and '-test-cxxflags' to pass in flags directly to the llvm testsuite.
...
llvm-svn: 76122
2009-07-16 22:59:17 +00:00
02a765280f
GV with ghost linkage (module being lazily streamed in in JIT lazy compilation mode) do not require extra load from stub. This fixes ExecutionEngine/2005-12-02-TailCallBug.ll.
...
llvm-svn: 76121
2009-07-16 22:53:10 +00:00
c4148c4ec7
Assume an inline asm might be a call, so we get
...
stack alignment right when it is. This is not
ideal but conservatively correct. Adjust a test
to compensate for changed stack offset value.
gcc.apple/asm-block-57.c
llvm-svn: 76120
2009-07-16 22:34:45 +00:00
de9cd44ed8
Emit line numbers in asm comments when available.
...
llvm-svn: 76117
2009-07-16 22:24:20 +00:00
69ab416d66
Privatize the MDString uniquing table.
...
llvm-svn: 76113
2009-07-16 22:11:26 +00:00
87b85dd4dc
Fix inverted preprocessor conditional.
...
llvm-svn: 76111
2009-07-16 22:08:25 +00:00
bfc2d8e5de
Fix compiler warning (for -Asserts).
...
llvm-svn: 76110
2009-07-16 22:06:22 +00:00
c7895d3cf6
Silence warning in Linux builds:
...
X86InstrInfo.cpp:2272: warning: suggest explicit braces to avoid ambiguous 'else'
llvm-svn: 76105
2009-07-16 21:24:13 +00:00
95a551ad75
Add raw_null_ostream and llvm::nulls(), a raw_ostream that discards output.
...
- No functionality change.
llvm-svn: 76103
2009-07-16 21:17:53 +00:00
efad8e45fe
Add line numbers to OProfile. To do this, I added a processDebugLoc()
...
call to the MachineCodeEmitter interface and made copying the start
line of a function not conditional on whether we're emitting Dwarf
debug information. I'll propagate the processDebugLoc() calls to the
non-X86 targets in a followup patch.
In the long run, it'll probably be better to gather this information
through the DwarfWriter, but the DwarfWriter currently depends on the
AsmPrinter and TargetAsmInfo, and fixing that would be out of the way
for this patch.
There's a bug in OProfile 0.9.4 that makes it ignore line numbers for
addresses above 4G, and a patch fixing it at
http://thread.gmane.org/gmane.linux.oprofile/7634
Sample output:
$ sudo opcontrol --reset; sudo opcontrol --start-daemon; sudo opcontrol --start; `pwd`/Debug/bin/lli fib.bc; sudo opcontrol --stop
Signalling daemon... done
Profiler running.
fib(40) == 165580141
Stopping profiling.
$ opreport -g -d -l `pwd`/Debug/bin/lli|head -60
Overflow stats not available
CPU: Core 2, speed 1998 MHz (estimated)
Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (Unhalted core cycles) count 100000
vma samples % linenr info image name symbol name
00007f67a30370b0 25489 61.2554 fib.c:24 10946.jo fib_left
00007f67a30370b0 1634 6.4106 fib.c:24
00007f67a30370b1 83 0.3256 fib.c:24
00007f67a30370b9 1997 7.8348 fib.c:24
00007f67a30370c6 2080 8.1604 fib.c:27
00007f67a30370c8 988 3.8762 fib.c:27
00007f67a30370cd 1315 5.1591 fib.c:27
00007f67a30370cf 251 0.9847 fib.c:27
00007f67a30370d3 1191 4.6726 fib.c:27
00007f67a30370d6 975 3.8252 fib.c:27
00007f67a30370db 1010 3.9625 fib.c:27
00007f67a30370dd 242 0.9494 fib.c:27
00007f67a30370e1 2782 10.9145 fib.c:28
00007f67a30370e5 3768 14.7828 fib.c:28
00007f67a30370eb 615 2.4128 (no location information)
00007f67a30370f3 6558 25.7287 (no location information)
00007f67a3037100 15603 37.4973 fib.c:29 10946.jo fib_right
00007f67a3037100 1646 10.5493 fib.c:29
00007f67a3037101 45 0.2884 fib.c:29
00007f67a3037109 2372 15.2022 fib.c:29
00007f67a3037116 2234 14.3178 fib.c:32
00007f67a3037118 612 3.9223 fib.c:32
00007f67a303711d 622 3.9864 fib.c:32
00007f67a303711f 385 2.4675 fib.c:32
00007f67a3037123 404 2.5892 fib.c:32
00007f67a3037126 634 4.0633 fib.c:32
00007f67a303712b 870 5.5759 fib.c:32
00007f67a303712d 62 0.3974 fib.c:32
00007f67a3037131 1848 11.8439 fib.c:33
00007f67a3037135 2840 18.2016 fib.c:33
00007f67a303713a 1 0.0064 fib.c:33
00007f67a303713b 1023 6.5564 (no location information)
00007f67a3037143 5 0.0320 (no location information)
000000000080c1e4 15 0.0360 MachineOperand.h:150 lli llvm::MachineOperand::isReg() const
000000000080c1e4 6 40.0000 MachineOperand.h:150
000000000080c1ec 2 13.3333 MachineOperand.h:150
...
llvm-svn: 76102
2009-07-16 21:07:26 +00:00
070fab8a1f
Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.
...
The inline asm operands must be parsed from the first flag, you cannot assume
that an immediate operand preceeding a register use operand is the flag.
PowerPC "m" operands are represented as (flag, imm, reg) triples.
isRegTiedToDefOperand() would incorrectly interpret the imm as the flag.
llvm-svn: 76101
2009-07-16 20:58:34 +00:00
357645efad
Changed my mind. We now allow remat of instructions whose defs have subreg indices.
...
llvm-svn: 76100
2009-07-16 20:15:00 +00:00
c277dc408b
Privatize the ConstantFP table. I'm on a roll!
...
llvm-svn: 76097
2009-07-16 19:05:41 +00:00
bf61e3b4d3
this should be xfailed on darwin. Darwin doesn't use the libstdc++ in the llvm-gcc distro, it uses the system version.
...
llvm-svn: 76095
2009-07-16 18:45:51 +00:00
fdd0eb4011
With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction.
...
llvm-svn: 76094
2009-07-16 18:44:05 +00:00
4ded3d3db2
Update CMake file.
...
llvm-svn: 76093
2009-07-16 18:29:22 +00:00
20b34ac794
Move the ConstantInt uniquing table into LLVMContextImpl. This exposed a number of issues in
...
our current context-passing stuff, which is also fixed here
llvm-svn: 76089
2009-07-16 18:04:31 +00:00
dd27e5e10a
Removed the SubsectionsViaSymbols MCStreamer API and replaced it with a generic
...
EmitAssemblerFlag API which takes a value from the added AssemblerFlag
enumerated constants.
llvm-svn: 76087
2009-07-16 17:56:39 +00:00
8c129d7687
Fill in some holes in ScalarEvolution's loop iteration condition
...
analysis. This allows indvars to emit a simpler loop trip count
expression.
llvm-svn: 76085
2009-07-16 17:34:36 +00:00
7bef8bc320
Clean up the definition of Str in AsmParser::ParseDirectiveDarwinDumpOrLoad
...
so it is defined with a lifetime that is as short as possible.
llvm-svn: 76082
2009-07-16 17:17:46 +00:00
e5df197e70
Add SmallString unit test.
...
- Patch by Ryan Flynn!
llvm-svn: 76081
2009-07-16 17:00:06 +00:00
8bdc3779e9
In an Apple-style build, compile with llvm-gcc/llvm-g++ if available.
...
llvm-svn: 76080
2009-07-16 16:49:11 +00:00
1511f701e7
Add an isLoopSimplifyForm() predicate, following the example of
...
isLCSSAForm(), to test whether a loop is in the form guaranteed
by the LoopSimplify pass.
llvm-svn: 76077
2009-07-16 16:16:23 +00:00
559835f026
Use setStream infomatted_raw_ostream's constructor, to reduce code
...
duplication. Also, make setStream honor the old DeleteStream flag.
llvm-svn: 76075
2009-07-16 15:37:26 +00:00
6c45d9f244
Remove inapplicable comments.
...
llvm-svn: 76074
2009-07-16 15:33:48 +00:00
7ecda10311
Add explicit keywords.
...
llvm-svn: 76073
2009-07-16 15:33:04 +00:00
72c31296e9
Tidy up #includes.
...
llvm-svn: 76072
2009-07-16 15:32:28 +00:00
ee05152cfa
Convert more tools code from cerr and cout to errs() and outs().
...
llvm-svn: 76070
2009-07-16 15:30:09 +00:00
f199ad6ebc
Use size_t.
...
llvm-svn: 76069
2009-07-16 15:24:40 +00:00
77a50bd3a8
Make xfail proper
...
llvm-svn: 76065
2009-07-16 14:53:47 +00:00
02fc607d54
Unbreak
...
llvm-svn: 76064
2009-07-16 14:36:52 +00:00
73fcd3d962
Temporary disable 16 bit bswap
...
llvm-svn: 76063
2009-07-16 14:35:57 +00:00
460e59034b
Add instruction formats and few opcodes
...
llvm-svn: 76062
2009-07-16 14:35:20 +00:00
902facfe96
Add bswap patterns
...
llvm-svn: 76061
2009-07-16 14:34:52 +00:00
ff21565821
Provide crazy pseudos for regpairs spills / reloads
...
llvm-svn: 76060
2009-07-16 14:34:15 +00:00
7fa0ce1a21
Handle long-disp stuff more consistently
...
llvm-svn: 76059
2009-07-16 14:33:52 +00:00
30e1cb2ab9
All FP instructions have 12 bit memory displacement field
...
llvm-svn: 76058
2009-07-16 14:33:27 +00:00
5b03970c7b
Another predicate routine
...
llvm-svn: 76057
2009-07-16 14:33:01 +00:00
5761e33ce4
More helpers
...
llvm-svn: 76056
2009-07-16 14:32:41 +00:00
b22afc7bcc
Add bunch of branch folding stuff
...
llvm-svn: 76055
2009-07-16 14:32:19 +00:00
0f8c47a7bb
Add missed opcodes to short => long displacement conversion
...
llvm-svn: 76054
2009-07-16 14:31:52 +00:00
201d49d56a
Cleanup
...
llvm-svn: 76053
2009-07-16 14:31:32 +00:00
3ae30e08ef
Fix logic inversion for RI-mode address selection
...
llvm-svn: 76052
2009-07-16 14:31:14 +00:00
6c2c47ecb2
Unbreak the test
...
llvm-svn: 76051
2009-07-16 14:30:49 +00:00
4121039bef
Expand 32-bit bitconverts via memory
...
llvm-svn: 76050
2009-07-16 14:30:29 +00:00
bc2ead6ea3
Fix incomin arg stack frame offset in case we need to generate stack frame
...
llvm-svn: 76049
2009-07-16 14:29:57 +00:00
3729850b50
Fix instruction mnemonics for some fp_to_sint operations
...
llvm-svn: 76048
2009-07-16 14:29:26 +00:00
a293caf2ed
i32 values are passed extended also on stack. Handle this in generic way
...
llvm-svn: 76047
2009-07-16 14:29:05 +00:00
1fa01d307c
We definitely have 1-0 bools
...
llvm-svn: 76046
2009-07-16 14:28:46 +00:00
bd41c83ab0
Revert the commit, it just hides the real bug
...
llvm-svn: 76045
2009-07-16 14:28:26 +00:00
6fb6e09781
Out GR128 regclass is not a 'real' i128 one.
...
llvm-svn: 76044
2009-07-16 14:27:53 +00:00
fef4a3b762
Add missed condbranch opcodes
...
llvm-svn: 76043
2009-07-16 14:27:26 +00:00
6c01db428f
Handle bitconverts
...
llvm-svn: 76042
2009-07-16 14:27:01 +00:00
70d0bceed6
Unbreak mvi and friends - emit only 'significant' part of the operand
...
llvm-svn: 76041
2009-07-16 14:26:38 +00:00
573fab1879
Expand fp_to_uint too
...
llvm-svn: 76040
2009-07-16 14:26:06 +00:00
d57f8cee1d
We don't have FP truncstores
...
llvm-svn: 76039
2009-07-16 14:25:46 +00:00
3f254d536a
Expand uint_to_fp
...
llvm-svn: 76038
2009-07-16 14:25:30 +00:00
1ae8098144
Emit proper rounding mode for fp_to_sint
...
llvm-svn: 76037
2009-07-16 14:25:12 +00:00
35a5d6f7ca
f32/f64 regs are stored on stack if we're short in FP regs
...
llvm-svn: 76036
2009-07-16 14:24:57 +00:00
2acdac0f8e
Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
...
llvm-svn: 76035
2009-07-16 14:24:41 +00:00
8c18d8972c
Make FP zero to be legal FP immediate via LOAD ZERO
...
llvm-svn: 76034
2009-07-16 14:24:16 +00:00
3894c8b6c2
Loads are not two-address in any way
...
llvm-svn: 76033
2009-07-16 14:24:01 +00:00
c8f76f47dd
Add LOAD NEGATIVE instruction
...
llvm-svn: 76032
2009-07-16 14:23:44 +00:00
ae2d8abf2c
LOAD COMPLEMENT instruction is not really two-addr
...
llvm-svn: 76031
2009-07-16 14:23:30 +00:00
82af42d361
Add multiple add/sub instructions
...
llvm-svn: 76030
2009-07-16 14:23:16 +00:00
b106b60456
Handle FP callee-saved regs
...
llvm-svn: 76029
2009-07-16 14:23:01 +00:00
871784ba88
Proper FP extloads
...
llvm-svn: 76028
2009-07-16 14:22:46 +00:00
12400008a7
Add proper PWS impdef's
...
llvm-svn: 76027
2009-07-16 14:22:30 +00:00
3c44a39156
Propagate FP select_cc to dag inserters
...
llvm-svn: 76026
2009-07-16 14:22:15 +00:00
430ab4f382
Implement fp_to_sint
...
llvm-svn: 76025
2009-07-16 14:21:57 +00:00
345e08d24c
Implement FP regs spills / restores
...
llvm-svn: 76024
2009-07-16 14:21:41 +00:00
0fcdd8d424
Add fabs
...
llvm-svn: 76023
2009-07-16 14:21:27 +00:00
50485d65d4
Add fneg
...
llvm-svn: 76022
2009-07-16 14:21:12 +00:00
d7416e7c0b
We don't have native sine / cosine instructions
...
llvm-svn: 76021
2009-07-16 14:20:56 +00:00
77928399b0
More sint_to_fp stuff
...
llvm-svn: 76020
2009-07-16 14:20:39 +00:00
8195797de2
Add bunch of FP instructions
...
llvm-svn: 76019
2009-07-16 14:20:24 +00:00
45a56de726
We don't have any FP extloads
...
llvm-svn: 76018
2009-07-16 14:20:08 +00:00
ead9b9fb31
Implement all comparisons
...
llvm-svn: 76017
2009-07-16 14:19:54 +00:00
7cb00653c1
Add constpool lowering / printing
...
llvm-svn: 76016
2009-07-16 14:19:35 +00:00
c806cea4cb
Allow FP arguments pass / return
...
llvm-svn: 76015
2009-07-16 14:19:16 +00:00
923b47e89d
Register FP regclasses
...
llvm-svn: 76014
2009-07-16 14:19:02 +00:00
5509b58cd7
Add FP regs
...
llvm-svn: 76013
2009-07-16 14:18:48 +00:00
570d0c36ee
Fix fallout from prev. patch
...
llvm-svn: 76012
2009-07-16 14:18:31 +00:00
b25949b0f5
Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
...
llvm-svn: 76011
2009-07-16 14:18:17 +00:00
e5b04d7102
Use divide single for 32 bit signed divides
...
llvm-svn: 76010
2009-07-16 14:17:52 +00:00
2799032a45
Add missed operands types
...
llvm-svn: 76009
2009-07-16 14:17:07 +00:00
5fd5c3efb6
Missed part of prev. patch
...
llvm-svn: 76008
2009-07-16 14:16:45 +00:00
b950f1961b
Another attempt to fix prologue emission
...
llvm-svn: 76007
2009-07-16 14:16:26 +00:00
091872cb37
Implement 'large' PIC model
...
llvm-svn: 76006
2009-07-16 14:16:05 +00:00
569a94c4d0
Implement shifts properly (hopefilly - finally!)
...
llvm-svn: 76005
2009-07-16 14:15:24 +00:00
e0ad108f04
Remove redundand register move
...
llvm-svn: 76004
2009-07-16 14:14:54 +00:00
fe8df8ff61
Properly handle divides. As a bonus - implement memory versions of them.
...
llvm-svn: 76003
2009-07-16 14:14:33 +00:00
68b101a0e1
Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford
...
llvm-svn: 76002
2009-07-16 14:14:01 +00:00
Dan Gohman