a7abda3989
teach asmprinter to print s8/s14 operands
...
llvm-svn: 21131
2005-04-07 12:34:36 +00:00
8419da8acf
codegen immediate forms of add/sub/shift
...
llvm-svn: 21130
2005-04-07 12:33:38 +00:00
b484f7c55e
add immediate forms of add, sub, shift
...
llvm-svn: 21129
2005-04-07 12:32:24 +00:00
c36b6c3b1a
steal sampo's div-by-constant-power-of-2 stuff
...
thanks sampo!!
llvm-svn: 21113
2005-04-06 09:55:17 +00:00
03c530786c
add fms instruction
...
llvm-svn: 21112
2005-04-06 09:54:09 +00:00
c0e9adf3cc
lie a bit and say that r1/r12 (GP/SP) _aren't_ callee-save, as we take
...
care of this ourselves
llvm-svn: 21110
2005-04-06 06:18:36 +00:00
df0ecbd4cc
make sure 'special' registers don't get allocated
...
llvm-svn: 21109
2005-04-06 06:17:54 +00:00
9935f44fb8
fix SREM/UREM, which gave incorrect results for x%y if x was zero. This is
...
an ugly hack, but it seems to work. I should fix this properly and add a test
as well.
fixes multisource/obsequi (maybe others)
llvm-svn: 21075
2005-04-04 05:05:52 +00:00
dbc810022b
add implicit use op
...
llvm-svn: 21074
2005-04-04 04:50:57 +00:00
6c9afaead4
.bss is no problem here.
...
llvm-svn: 21061
2005-04-03 14:52:01 +00:00
50b339b7fa
ia64 asmprinter fixes:
...
- turn off assembler's autoalignment
- set FunctionAddrPrefix/Suffix so that .data8 entries pointing to
functions have their value wrapped in @fptr(), so that a function
descriptor will be materialized for that function.
llvm-svn: 21025
2005-04-02 12:30:47 +00:00
c935c833d1
support IDEF, fnegabs (thanks sampo)
...
llvm-svn: 21023
2005-04-02 10:33:53 +00:00
0ccac38ed3
add fnegabs op
...
llvm-svn: 21022
2005-04-02 10:06:27 +00:00
0720dc14ed
add support FNEG and FABS
...
llvm-svn: 21012
2005-04-02 05:18:38 +00:00
0b7e4cd107
This target doesn't support fabs/fneg yet.
...
llvm-svn: 21010
2005-04-02 05:03:24 +00:00
617af97040
repair mindless SELECT waste.
...
llvm-svn: 20982
2005-04-01 10:35:00 +00:00
21ce5f7a66
Assorted fixes:
...
* Stop being pessimistic about output register allocation
* Start to handle function descriptors: compute target GPs and so on
when doing indirect calls etc. Not there yet, though. For the moment,
we try to use _indirect_ branches wherever possible, to stress test
function descriptors.
* FP divide-by-zero should work now
* add varargs (it doesn't work, though)
At this point, all of SingleSource passes (modulo C++ tests that are due
to issues with the CFE, see note in the README.) Much of MultiSource also
passes although there's still a ton of bugs around. Something for me to
work on tomorrow, then. :)
llvm-svn: 20960
2005-03-31 12:31:11 +00:00
ffb9d14bb3
* declare local common symbols as such (.lcomm, not merely .common)
...
* begin great adventure into correct function descriptor materialization
llvm-svn: 20956
2005-03-31 07:40:24 +00:00
8106f12d33
daintyness
...
llvm-svn: 20955
2005-03-31 07:36:43 +00:00
73c2777a0e
add what we need to fudge a 'floating point conditional move', this is
...
used to get FP div-by-zero working properly (shunt the right answer
depending on how frcpa sets its predicate output)
llvm-svn: 20954
2005-03-31 07:32:32 +00:00
bdbf8ba2d0
Emit .global @function and .global @object entries so the Intel ias
...
assembler may be used; identify LLVM output as such.
llvm-svn: 20892
2005-03-28 15:21:43 +00:00
f656525cb6
Change interface to LowerCallTo to take a boolean isVarArg argument.
...
llvm-svn: 20842
2005-03-26 01:29:23 +00:00
fed2a42895
fix a compilation error, patch contributed by Bill Wendling!
...
llvm-svn: 20807
2005-03-24 05:12:48 +00:00
952105220e
Remove comments that are now meaningless from the pattern ISels, at Chris's
...
request.
llvm-svn: 20804
2005-03-24 04:39:54 +00:00
1a48561432
Stop using deprecated interface.
...
llvm-svn: 20679
2005-03-19 09:22:17 +00:00
8a3aa43422
typo/denial
...
llvm-svn: 20663
2005-03-17 20:23:27 +00:00
df642ff2ae
clean up warnings when building in release mode
...
llvm-svn: 20658
2005-03-17 19:00:40 +00:00
a06265a119
OK, IA64 is statically linked into llc
...
llvm-svn: 20655
2005-03-17 18:37:05 +00:00
f5cc2c453d
build the IA64 target as a .so for now
...
llvm-svn: 20654
2005-03-17 18:29:04 +00:00
91ed0a11cf
and so it begins...
...
PHASE 1: write instruction selector
PHASE 2: ???
PHASE 3: profit!
llvm-svn: 20652
2005-03-17 18:17:03 +00:00
Duraid Madina