05e51d92e0
It wasn't happy about this either
...
llvm-svn: 21133
2005-04-07 14:18:13 +00:00
85f34a5682
Yea, it wasn't happy
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llvm-svn: 21132
2005-04-07 13:55:53 +00:00
a7abda3989
teach asmprinter to print s8/s14 operands
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llvm-svn: 21131
2005-04-07 12:34:36 +00:00
8419da8acf
codegen immediate forms of add/sub/shift
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llvm-svn: 21130
2005-04-07 12:33:38 +00:00
b484f7c55e
add immediate forms of add, sub, shift
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llvm-svn: 21129
2005-04-07 12:32:24 +00:00
d20628ff7d
Pattern match bitfield insert, which helps shift long by immediate, among
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other things.
llvm-svn: 21127
2005-04-06 23:51:40 +00:00
505f6b760d
Fix some shift bugs
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llvm-svn: 21126
2005-04-06 22:42:08 +00:00
7ca0947274
Make these 64 bit constants so that this compiles on x86-32 as well.
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llvm-svn: 21125
2005-04-06 22:09:40 +00:00
3ea17c6cfe
added sdiv by 2^k and works for neg divisors also
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llvm-svn: 21124
2005-04-06 22:03:13 +00:00
df3256aa7f
fix copy/paste errors, and add imm support to SxADDQ and SxSUBQ
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llvm-svn: 21121
2005-04-06 20:59:59 +00:00
bd32728a98
Fix SingleSource/Regression/C/2005-05-06-LongLongSignedShift.c, we were not
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properly sign extending the top of the result of a 64-bit shift right by
a constant > 32.
llvm-svn: 21120
2005-04-06 20:59:35 +00:00
1d4747c302
Added Nate's div by constant stuff, also scaled operations!
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llvm-svn: 21116
2005-04-06 20:25:34 +00:00
70b8b96d6c
Fix a namespace issue, reported by Vladimir Merzliakov!
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llvm-svn: 21115
2005-04-06 19:45:39 +00:00
c36b6c3b1a
steal sampo's div-by-constant-power-of-2 stuff
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thanks sampo!!
llvm-svn: 21113
2005-04-06 09:55:17 +00:00
03c530786c
add fms instruction
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llvm-svn: 21112
2005-04-06 09:54:09 +00:00
39ef2f1d43
Fixed version of optimized integer divide is now fixed. Calculate the
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quotient, not the remainder. Also, make sure to remove the old div operand
from the ExprMap and let SelectExpr insert the new one.
llvm-svn: 21111
2005-04-06 06:44:57 +00:00
c0e9adf3cc
lie a bit and say that r1/r12 (GP/SP) _aren't_ callee-save, as we take
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care of this ourselves
llvm-svn: 21110
2005-04-06 06:18:36 +00:00
df0ecbd4cc
make sure 'special' registers don't get allocated
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llvm-svn: 21109
2005-04-06 06:17:54 +00:00
4fbb4af5d1
Add (untested) support for MULHS and MULHU.
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llvm-svn: 21107
2005-04-06 04:21:07 +00:00
c21db6b15c
add signed versions of the extra precision multiplies
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llvm-svn: 21106
2005-04-06 04:19:22 +00:00
dd397119b0
Turn off the div -> mul optimization until it works correctly 100% of the
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time.
llvm-svn: 21105
2005-04-06 03:36:33 +00:00
4164c4baac
Add support for MULHS and MULHU nodes
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Have LegalizeDAG handle SREM and UREM for us
Codegen SDIV and UDIV by constant as a multiply by magic constant instead
of integer divide, which is very slow.
llvm-svn: 21104
2005-04-06 00:25:27 +00:00
43f78bc2da
added lowerargs support for varargs
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llvm-svn: 21101
2005-04-05 20:51:46 +00:00
524417357c
Behold, rlwinm with certain immediate arguments is printed as the much more
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readable slwi or srwi (shift left/right word immediate).
llvm-svn: 21099
2005-04-05 18:19:50 +00:00
a188b698a2
Fix cut & paste errors (32->64), and codegen float->int more optimally.
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llvm-svn: 21098
2005-04-05 17:32:30 +00:00
8d64e9a90d
Updated to use dep analyzer.
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llvm-svn: 21097
2005-04-05 16:36:44 +00:00
9203e169a7
Remove 64 bit simple ISel, it never worked correctly
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Add initial (buggy) implementation of 64 bit pattern ISel
llvm-svn: 21096
2005-04-05 08:51:15 +00:00
4bde071216
Back out the previous change to SelectBranchCC, since there are cases it
...
could miscompile. A correct solution will be found in the near future.
llvm-svn: 21095
2005-04-05 04:32:16 +00:00
9049e4beec
Rename canUseAsImmediateForOpcode to getImmediateForOpcode to better
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indicate that it is not a boolean function.
Properly emit the pseudo instruction for conditional branch, so that we
can fix up conditional branches whose displacements are too large.
Reserve the right amount of opcode space for said pseudo instructions.
llvm-svn: 21094
2005-04-05 04:22:58 +00:00
d6933f5078
Implement SDIV by power of 2 as srawi/addze rather than load imm, divw
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llvm-svn: 21091
2005-04-05 00:15:08 +00:00
1d5d767a09
Pattern match fp mul-add, mul-sub, neg-mul-add, and neg-mul-sub
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llvm-svn: 21090
2005-04-04 23:40:36 +00:00
d96350095c
Add support for multiply-add, multiply-sub, and their negated versions
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llvm-svn: 21089
2005-04-04 23:01:51 +00:00
1194531057
Make sure that arg regs used by the call instruction are marked as such, so
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that regalloc doesn't cleverly reuse early arg regs loading later arg regs.
This fixes almost all outstanding failures in the pattern isel.
llvm-svn: 21086
2005-04-04 22:17:48 +00:00
c7186025de
Remove unnecessary register copy now that regalloc is fixed
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llvm-svn: 21085
2005-04-04 21:48:13 +00:00
d753765460
i1 loads should also be from the low byte of the argument word.
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llvm-svn: 21077
2005-04-04 09:09:00 +00:00
1ce4839890
Fix i64 return, fix CopyFromReg
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llvm-svn: 21076
2005-04-04 06:52:38 +00:00
9935f44fb8
fix SREM/UREM, which gave incorrect results for x%y if x was zero. This is
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an ugly hack, but it seems to work. I should fix this properly and add a test
as well.
fixes multisource/obsequi (maybe others)
llvm-svn: 21075
2005-04-04 05:05:52 +00:00
dbc810022b
add implicit use op
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llvm-svn: 21074
2005-04-04 04:50:57 +00:00
629cdaea39
Full varargs support. All of UnitTests now passes
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llvm-svn: 21070
2005-04-03 23:11:17 +00:00
7a3e929efc
Pass the correct value for the chain to the store
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llvm-svn: 21066
2005-04-03 22:22:56 +00:00
f6dc43bd46
Fix SHL_PARTS
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Start implementation of integer varargs
llvm-svn: 21065
2005-04-03 22:13:27 +00:00
79e727e8a7
is this simpler? I think it is simpler.
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llvm-svn: 21064
2005-04-03 20:35:21 +00:00
7ce5740de9
fix 101 regressions
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llvm-svn: 21063
2005-04-03 18:24:50 +00:00
6c9afaead4
.bss is no problem here.
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llvm-svn: 21061
2005-04-03 14:52:01 +00:00
34cc5b329f
Keeping up with the Joneses.
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Implement not, nor, nand, and eqv
llvm-svn: 21060
2005-04-03 11:20:20 +00:00
46897ab49e
Select optimization
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llvm-svn: 21051
2005-04-02 22:32:39 +00:00
f029d795f0
Try several things. 1) drop /i from FP ops 2) factor out FP to Int moves and provide 21264 support for those 3) match not 4) match ornot andnot xornot
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llvm-svn: 21046
2005-04-02 21:06:51 +00:00
e7ae400bc8
FNEG/FABS/UNDEF
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llvm-svn: 21029
2005-04-02 19:11:07 +00:00
7ad3697e1e
FNEG/FABS
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llvm-svn: 21028
2005-04-02 19:04:58 +00:00
50b339b7fa
ia64 asmprinter fixes:
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- turn off assembler's autoalignment
- set FunctionAddrPrefix/Suffix so that .data8 entries pointing to
functions have their value wrapped in @fptr(), so that a function
descriptor will be materialized for that function.
llvm-svn: 21025
2005-04-02 12:30:47 +00:00
Andrew Lenharth