a2c7ff3386
simplify a bunch of code by using SelectionDAG::CreateStackTemporary
...
instead of inlining its body.
llvm-svn: 46062
2008-01-16 07:03:22 +00:00
91d86242f9
Change legalizeop of FP_ROUND and FP_EXTEND to not fall through
...
into the ANY_EXTEND/ZERO_EXTEND/SIGN_EXTEND code to simplify it.
Unmerge the code for FP_ROUND and FP_EXTEND from each other to
make each one simpler.
llvm-svn: 46061
2008-01-16 06:57:07 +00:00
2e50a6f90f
Factor the ReachesChainWithoutSideEffects out of dag combiner into
...
a public SDOperand::reachesChainWithoutSideEffects method. No
functionality change.
llvm-svn: 46050
2008-01-16 05:49:24 +00:00
59a2250b0d
Fix and enable EH for x86-64 Darwin. Adds
...
ShortenEHDataFor64Bits as a not-very-accurate
abstraction to cover all the changes in DwarfWriter.
Some cosmetic changes to Darwin assembly code for
gcc testsuite compatibility.
llvm-svn: 46029
2008-01-15 23:24:56 +00:00
897aed9109
Move some calls to getVRegDef higher in the callgraph, so they don't get executed as frequently in performance sensitive code.
...
llvm-svn: 46027
2008-01-15 22:58:11 +00:00
ec224888a6
The type of the 'abort' node should be pointer type (because
...
it's a function pointer) not MVT::Other. This fixes builtin_trap
lowering on ppc, alpha, ia64
llvm-svn: 46018
2008-01-15 22:09:33 +00:00
1ba66e0cec
Remove DefInst from LiveVariables::VarInfo. Use the facilities on MachineRegisterInfo instead.
...
llvm-svn: 46016
2008-01-15 22:02:46 +00:00
ee8df1f4d3
Add support for targets that have a legal ISD::TRAP.
...
llvm-svn: 46014
2008-01-15 21:58:08 +00:00
eb30bb7d29
Oops. Forgot to commit this.
...
llvm-svn: 46002
2008-01-15 07:49:36 +00:00
6bbbc4cbfa
For PR1839: add initial support for __builtin_trap. llvm-gcc part is missed
...
as well as PPC codegen
llvm-svn: 46001
2008-01-15 07:02:33 +00:00
5b212ea818
ByVal stack slot alignment should be at least as large as pointer ABI alignment.
...
llvm-svn: 45995
2008-01-15 03:14:05 +00:00
994718417a
don't create the post-ra scheduler unless it is enabled.
...
llvm-svn: 45972
2008-01-14 19:00:06 +00:00
4272c12571
remove dead #include
...
llvm-svn: 45971
2008-01-14 18:45:28 +00:00
08c728b519
Remove the assumption that byval has been applied to
...
a pointer to a struct.
llvm-svn: 45939
2008-01-13 21:19:59 +00:00
08af5a9dad
implement support for sinking a load out the bottom of a block that
...
has no stores between the load and the end of block. This works
great and sinks hundreds of stores, but we can't turn it on because
machineinstrs don't have volatility information and we don't want to
sink volatile stores :(
llvm-svn: 45894
2008-01-12 00:17:41 +00:00
c8226f32e9
Simplify the side effect stuff a bit more and make licm/sinking
...
both work right according to the new flags.
This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad.
It removes NeverHasSideEffects+MayHaveSideEffects and adds
UnmodeledSideEffects as machine instr flags. Now the clients
can decide everything they need.
I think isRematerializable can be implemented in terms of the
flags we have now, though I will let others tackle that.
llvm-svn: 45843
2008-01-10 23:08:24 +00:00
f3bd2cd37c
Clamp down on sinking of lots of instructions.
...
llvm-svn: 45841
2008-01-10 22:35:15 +00:00
53c954fa86
Output sinl for a long double FSIN node, not sin.
...
Likewise fix up a bunch of other libcalls. While
there I remove NEG_F32 and NEG_F64 since they are
not used anywhere. This fixes 9 Ada ACATS failures.
llvm-svn: 45833
2008-01-10 10:28:30 +00:00
f2553ab84f
Only remat loads from immutable stack slots.
...
llvm-svn: 45831
2008-01-10 08:24:38 +00:00
8b03bafd37
Simplify some code.
...
llvm-svn: 45830
2008-01-10 08:22:10 +00:00
d445b8813f
Don't use LiveVariables::VarInfo::DefInst.
...
llvm-svn: 45815
2008-01-10 03:12:54 +00:00
7ecb3b79c7
Emit unused EH frames for weak definitions on Darwin,
...
because assembler/linker can't cope with weak absolutes.
PR 1880.
llvm-svn: 45811
2008-01-10 02:03:30 +00:00
4f45cef2f9
Get rid of all uses of LiveVariables::VarInfo::DefInst in favor of the equivalent API from
...
MachineRegisterInfo. Once all clients are switched over, the former will be going away.
llvm-svn: 45805
2008-01-10 01:36:43 +00:00
51b8e20ccf
Add more comments explaining the basics of how the decision of when to rename and when to insert
...
copies is made.
llvm-svn: 45799
2008-01-10 00:47:01 +00:00
8958a78576
Get rid of the isKillInst predicate. LiveVariables already provides this information.
...
llvm-svn: 45797
2008-01-10 00:33:11 +00:00
1c8152ba03
Copies need to be inserted before the first terminator, not at the end of the block.
...
llvm-svn: 45791
2008-01-10 00:01:41 +00:00
0e400d4cb7
Special copy SUnit's do not have SDNode's.
...
llvm-svn: 45787
2008-01-09 23:01:55 +00:00
436db42a3c
Clean up StrongPHIElimination a bit, and add some more comments to the internal structures. There's
...
still more work to do on this front.
llvm-svn: 45783
2008-01-09 22:40:54 +00:00
4de0c3978d
StrongPHIElim: Now with even fewer trivial bugs!
...
llvm-svn: 45775
2008-01-09 10:41:39 +00:00
77c3fe441b
Fix an infinite recursion bug in InsertCopies.
...
llvm-svn: 45774
2008-01-09 10:32:30 +00:00
e0fd9bd35a
Fix some simple bugs. StrongPHIElimination now does not crash on 164.gzip.
...
llvm-svn: 45773
2008-01-09 06:19:05 +00:00
51b01bf8a5
Make load->store deletion a bit smarter. This allows us to compile this:
...
void test(long long *P) { *P ^= 1; }
into just:
_test:
movl 4(%esp), %eax
xorl $1, (%eax)
ret
instead of code like this:
_test:
movl 4(%esp), %ecx
xorl $1, (%ecx)
movl 4(%ecx), %edx
movl %edx, 4(%ecx)
ret
llvm-svn: 45762
2008-01-08 23:08:06 +00:00
1b0d5c747e
Rename registers that do not need copies.
...
llvm-svn: 45759
2008-01-08 21:54:52 +00:00
812e1ea7cf
Actually insert copies now!
...
llvm-svn: 45738
2008-01-08 05:16:15 +00:00
47299489ec
Oops, missed one.
...
llvm-svn: 45719
2008-01-07 21:32:09 +00:00
bbc6352d1f
Make some predicates static.
...
llvm-svn: 45718
2008-01-07 21:30:40 +00:00
24db8d383d
Pruning includes.
...
llvm-svn: 45700
2008-01-07 13:30:38 +00:00
f3efadcb5b
remove #includage
...
llvm-svn: 45697
2008-01-07 07:42:25 +00:00
03ad885039
rename TargetInstrDescriptor -> TargetInstrDesc.
...
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
llvm-svn: 45695
2008-01-07 07:27:27 +00:00
fd2e338b85
simplify some code.
...
llvm-svn: 45693
2008-01-07 06:47:00 +00:00
e99a6caee4
Rename all the M_* flags to be namespace qualified enums, and switch
...
all clients over to using predicates instead of these flags directly.
These are now private values which are only to be used to statically
initialize the tables.
llvm-svn: 45692
2008-01-07 06:42:05 +00:00
08a69ac2f5
add more and significantly better comments to the rest of the machineinstr
...
flags that can be set. Add predicates for the ones lacking it, and switch
some clients over to using the predicates instead of Flags directly.
llvm-svn: 45690
2008-01-07 06:21:53 +00:00
769c86bf63
simplify some code using new predicates
...
llvm-svn: 45689
2008-01-07 05:40:58 +00:00
f376c99ea0
rename hasVariableOperands() -> isVariadic(). Add some comments.
...
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.
llvm-svn: 45687
2008-01-07 05:19:29 +00:00
b0d06b4381
Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
...
llvm-svn: 45680
2008-01-07 03:13:06 +00:00
d34c47653e
remove some uses of MachineOpCode, move getSchedClass
...
into TargetInstrDescriptor from TargetInstrInfo.
llvm-svn: 45678
2008-01-07 02:46:03 +00:00
e55e115616
Add predicates methods to TargetOperandInfo, and switch all clients
...
over to using them, instead of diddling Flags directly. Change the
various flags from const variables to enums.
llvm-svn: 45677
2008-01-07 02:39:19 +00:00
c7e991b7c3
Setting GlobalDirective in TargetAsmInfo by default rather than
...
providing a misleading facility. It's used once in the MIPS backend
and hardcoded as "\t.globl\t" everywhere else.
llvm-svn: 45676
2008-01-07 02:31:11 +00:00
a98c679de0
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
...
that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
llvm-svn: 45674
2008-01-07 01:56:04 +00:00
0ec92e9d64
Update CodeGen for MRegisterInfo --> TargetInstrInfo changes.
...
llvm-svn: 45673
2008-01-07 01:35:56 +00:00
2d684b1fbf
Ammending r45669 with a missing file.
...
llvm-svn: 45671
2008-01-07 01:33:09 +00:00
6047b6e140
With this patch, the LowerGC transformation becomes the
...
ShadowStackCollector, which additionally has reduced overhead with
no sacrifice in portability.
Considering a function @fun with 8 loop-local roots,
ShadowStackCollector introduces the following overhead
(x86):
; shadowstack prologue
movl L_llvm_gc_root_chain$non_lazy_ptr, %eax
movl (%eax), %ecx
movl $___gc_fun, 20(%esp)
movl $0, 24(%esp)
movl $0, 28(%esp)
movl $0, 32(%esp)
movl $0, 36(%esp)
movl $0, 40(%esp)
movl $0, 44(%esp)
movl $0, 48(%esp)
movl $0, 52(%esp)
movl %ecx, 16(%esp)
leal 16(%esp), %ecx
movl %ecx, (%eax)
; shadowstack loop overhead
(none)
; shadowstack epilogue
movl 48(%esp), %edx
movl %edx, (%ecx)
; shadowstack metadata
.align 3
___gc_fun: # __gc_fun
.long 8
.space 4
In comparison to LowerGC:
; lowergc prologue
movl L_llvm_gc_root_chain$non_lazy_ptr, %eax
movl (%eax), %ecx
movl %ecx, 48(%esp)
movl $8, 52(%esp)
movl $0, 60(%esp)
movl $0, 56(%esp)
movl $0, 68(%esp)
movl $0, 64(%esp)
movl $0, 76(%esp)
movl $0, 72(%esp)
movl $0, 84(%esp)
movl $0, 80(%esp)
movl $0, 92(%esp)
movl $0, 88(%esp)
movl $0, 100(%esp)
movl $0, 96(%esp)
movl $0, 108(%esp)
movl $0, 104(%esp)
movl $0, 116(%esp)
movl $0, 112(%esp)
; lowergc loop overhead
leal 44(%esp), %eax
movl %eax, 56(%esp)
leal 40(%esp), %eax
movl %eax, 64(%esp)
leal 36(%esp), %eax
movl %eax, 72(%esp)
leal 32(%esp), %eax
movl %eax, 80(%esp)
leal 28(%esp), %eax
movl %eax, 88(%esp)
leal 24(%esp), %eax
movl %eax, 96(%esp)
leal 20(%esp), %eax
movl %eax, 104(%esp)
leal 16(%esp), %eax
movl %eax, 112(%esp)
; lowergc epilogue
movl 48(%esp), %edx
movl %edx, (%ecx)
; lowergc metadata
(none)
llvm-svn: 45670
2008-01-07 01:30:53 +00:00
5180e85675
Enabling the target-independent garbage collection infrastructure by hooking it
...
up to the various compiler pipelines.
This doesn't actually add support for any GC algorithms, which means it
temporarily breaks a few tests. To be fixed shortly.
llvm-svn: 45669
2008-01-07 01:30:38 +00:00
a4ce4f6987
rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
...
llvm-svn: 45667
2008-01-06 23:38:27 +00:00
10324d0175
rename isStore -> mayStore to more accurately reflect what it captures.
...
llvm-svn: 45656
2008-01-06 08:36:04 +00:00
1694a53c5d
Remove an unused variable.
...
llvm-svn: 45655
2008-01-06 07:43:13 +00:00
7eac714b41
make this build with newer gcc's
...
llvm-svn: 45637
2008-01-05 23:29:51 +00:00
5743da502e
If custom lowering of insert element fails, the result Val will be 0.
...
Don't overwrite a variable used by the fallthrough code path in this
case.
llvm-svn: 45630
2008-01-05 20:47:37 +00:00
647e61a42b
Fix build issue on certain compilers.
...
llvm-svn: 45629
2008-01-05 20:15:42 +00:00
ee61d14bf6
The current impl is really trivial, add some comments about how it can be made better.
...
llvm-svn: 45625
2008-01-05 06:47:58 +00:00
276178e49f
allow sinking to be enabled for the jit
...
llvm-svn: 45624
2008-01-05 06:14:16 +00:00
d11ca169e7
don't sink anything with side effects, this makes lots of stuff work, but sinks almost nothing.
...
llvm-svn: 45617
2008-01-05 02:33:22 +00:00
6ec78274df
fix a common crash.
...
llvm-svn: 45614
2008-01-05 01:39:17 +00:00
3592b2352d
I should not be allowed to commit when sleepy.
...
llvm-svn: 45608
2008-01-05 00:48:55 +00:00
0c209430b4
Don't recalculate the loop info and loop dominators analyses if they're
...
preserved.
llvm-svn: 45596
2008-01-04 20:54:55 +00:00
118ae4cd61
80-column violations.
...
llvm-svn: 45574
2008-01-04 08:59:18 +00:00
3bf5603ce4
Add that this preserves some analyses.
...
llvm-svn: 45573
2008-01-04 08:48:49 +00:00
66470d02c3
Move option to enable machine LICM into LLVMTargetMachine.cpp.
...
llvm-svn: 45572
2008-01-04 08:11:03 +00:00
d865697016
Call the parent's getAnalysisUsage.
...
llvm-svn: 45571
2008-01-04 07:50:05 +00:00
f3edc09f9b
Add a really quick hack at a machine code sinking pass, enabled with --enable-sinking.
...
It is missing validity checks, so it is known broken. However, it is powerful enough
to compile this contrived code:
void test1(int C, double A, double B, double *P) {
double Tmp = A*A+B*B;
*P = C ? Tmp : A;
}
into:
_test1:
movsd 8(%esp), %xmm0
cmpl $0, 4(%esp)
je LBB1_2 # entry
LBB1_1: # entry
movsd 16(%esp), %xmm1
mulsd %xmm1, %xmm1
mulsd %xmm0, %xmm0
addsd %xmm1, %xmm0
LBB1_2: # entry
movl 24(%esp), %eax
movsd %xmm0, (%eax)
ret
instead of:
_test1:
movsd 16(%esp), %xmm0
mulsd %xmm0, %xmm0
movsd 8(%esp), %xmm1
movapd %xmm1, %xmm2
mulsd %xmm2, %xmm2
addsd %xmm0, %xmm2
cmpl $0, 4(%esp)
je LBB1_2 # entry
LBB1_1: # entry
movapd %xmm2, %xmm1
LBB1_2: # entry
movl 24(%esp), %eax
movsd %xmm1, (%eax)
ret
woo.
llvm-svn: 45570
2008-01-04 07:36:53 +00:00
b5c1d9b7da
remove dead #includes and reorder the rest.
...
llvm-svn: 45569
2008-01-04 06:41:45 +00:00
0ba4184404
Use the correct MachineRegisterInfo object.
...
llvm-svn: 45499
2008-01-02 21:10:54 +00:00
f0b37780ca
Remove dead code.
...
llvm-svn: 45496
2008-01-02 20:47:37 +00:00
5da1945cdd
Use the new architecture to get the containing machine basic block for a machine
...
instruction. Also, use "splice" to move the new instruction instead of
remove/insert (where it was leaking memory anyway).
llvm-svn: 45492
2008-01-02 19:32:43 +00:00
eee14601b1
Move some more instruction creation methods from RegisterInfo into InstrInfo.
...
llvm-svn: 45484
2008-01-01 21:11:32 +00:00
caaf8aae4d
Make MachineRegisterInfo::getVRegDef more efficient by aiming the keep the def of the vreg at the start of the list, so the list doesn't need to be traversed.
...
llvm-svn: 45483
2008-01-01 21:08:22 +00:00
0cb9dd7aa2
switch the register iterator to act more like hte LLVM value iterator: dereferencing
...
it now returns the machineinstr of the use. To get the operand, use I.getOperand().
Add a new MachineRegisterInfo::replaceRegWith, which is basically like
Value::replaceAllUsesWith.
llvm-svn: 45482
2008-01-01 20:36:19 +00:00
39204d76c5
Add a trivial but handy function to efficiently return the machine
...
instruction that defines the specified vreg. Crazy.
llvm-svn: 45480
2008-01-01 03:07:29 +00:00
961e7427ea
Implement automatically updated def/use lists for all MachineInstr register
...
operands. The lists are currently kept in MachineRegisterInfo, but it does
not yet provide an iterator interface to them.
llvm-svn: 45477
2008-01-01 01:12:31 +00:00
25568e4cef
Fix a problem where lib/Target/TargetInstrInfo.h would include and use
...
a header file from libcodegen. This violates a layering order: codegen
depends on target, not the other way around. The fix to this is to
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen. It is defined in libcodegen, where
the base is not.
llvm-svn: 45475
2008-01-01 01:03:04 +00:00
57a60f0466
Fix PR1833 - eh.exception and eh.selector return two
...
values, which means doing extra legalization work.
It would be easier to get this kind of thing right if
there was some documentation...
llvm-svn: 45472
2007-12-31 18:35:50 +00:00
7a73ae9a86
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
...
Machine-level API cleanup instigated by Chris.
llvm-svn: 45470
2007-12-31 06:32:00 +00:00
574e7166e0
properly encapsulate the parent field of MBB and MI with get/set accessors.
...
llvm-svn: 45469
2007-12-31 04:56:33 +00:00
21ec2b4769
update a couple of references to SSARegMap.
...
llvm-svn: 45468
2007-12-31 04:16:08 +00:00
a10fff51d9
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
...
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
llvm-svn: 45467
2007-12-31 04:13:23 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
...
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
6005589faf
More cleanups for MachineOperand:
...
- Eliminate the static "print" method for operands, moving it
into MachineOperand::print.
- Change various set* methods for register flags to take a bool
for the value to set it to. Remove unset* methods.
- Group methods more logically by operand flavor in MachineOperand.h
llvm-svn: 45461
2007-12-30 21:56:09 +00:00
c98c0e57eb
MachineOperand:
...
- Add getParent() accessors.
- Move SubReg out of the AuxInfo union, to make way for future changes.
- Remove the getImmedValue/setImmedValue methods.
- in some MachineOperand::Create* methods, stop initializing fields that are dead.
MachineInstr:
- Delete one copy of the MachineInstr printing code, now there is only one dump
format and one copy of the code.
- Make MachineOperand use the parent field to get info about preg register names if
no target info is otherwise available.
- Move def/use/kill/dead flag printing to the machineoperand printer, so they are
always printed for an operand.
llvm-svn: 45460
2007-12-30 21:31:53 +00:00
96317d2412
fix typo duncan noticed!
...
llvm-svn: 45459
2007-12-30 21:21:10 +00:00
35fececec9
simpilfy some register printing code.
...
llvm-svn: 45458
2007-12-30 21:08:36 +00:00
383a873a9a
eliminate a copy of the machineoperand printing stuff. Keep the copy that
...
knows how to print offsets.
llvm-svn: 45457
2007-12-30 21:03:30 +00:00
49bd29daa0
Simplify and clean up some machine operand/instr printing/dumping stuff.
...
llvm-svn: 45456
2007-12-30 21:01:27 +00:00
0dad74d252
two register machineoperands are not identical unless their subregs match.
...
llvm-svn: 45455
2007-12-30 20:55:08 +00:00
81798417dc
MachineOperand::getImmedValue -> MachineOperand::getImm
...
llvm-svn: 45454
2007-12-30 20:50:28 +00:00
3c6ce5b43c
make machine operands fatter: give each one an up-pointer to the
...
machineinstr that owns it.
llvm-svn: 45449
2007-12-30 06:11:04 +00:00
20421fe936
use simplified operand addition methods.
...
llvm-svn: 45436
2007-12-30 00:57:42 +00:00
bbbae8e1ce
use simplified operand addition methods.
...
llvm-svn: 45435
2007-12-30 00:51:11 +00:00
e35dfb827f
Start using the simplified methods for adding operands.
...
llvm-svn: 45432
2007-12-30 00:41:17 +00:00
c288ff1d78
simplify some code by factoring operand construction better.
...
llvm-svn: 45428
2007-12-30 00:12:25 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
...
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
a087a8d2ce
remove attribution from lib Makefiles.
...
llvm-svn: 45415
2007-12-29 20:09:26 +00:00
3b6a82118b
Fold comparisons against a constant nan, and optimize ORD/UNORD
...
comparisons with a constant. This allows us to compile isnan to:
_foo:
fcmpu cr7, f1, f1
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr
instead of:
LCPI1_0: ; float
.space 4
_foo:
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr7, f1, f0
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr
llvm-svn: 45405
2007-12-29 08:37:08 +00:00
2de9b85297
make sure not to zap volatile stores, thanks a lot to Dale for noticing this!
...
llvm-svn: 45402
2007-12-29 07:15:45 +00:00
5919b48fe9
don't fold fp_round(fp_extend(load)) -> fp_round(extload)
...
llvm-svn: 45400
2007-12-29 06:55:23 +00:00
3f9c6a7260
Delete a store whose input is a load from the same pointer:
...
x = load p
store x -> p
llvm-svn: 45398
2007-12-29 06:26:16 +00:00
bccb8c432d
Flesh out the Briggs implementation a little bit more, fix a few FIXMEs.
...
llvm-svn: 45347
2007-12-24 22:12:23 +00:00
e110199916
Sketch out an implementation of Briggs' copy placement algorithm.
...
llvm-svn: 45334
2007-12-23 15:37:26 +00:00
de272b1b63
initial code for forming an FGETSIGN node. This is disabled until
...
legalizer support goes in.
llvm-svn: 45323
2007-12-22 21:35:38 +00:00
afc8f13bf5
improve support for fgetsign
...
llvm-svn: 45322
2007-12-22 21:26:52 +00:00
efd1cddb5a
Tell TargetLoweringOpt whether it is running before
...
or after legalize.
llvm-svn: 45321
2007-12-22 20:56:36 +00:00
843cad4df2
Add a new FGETSIGN operation, which defaults to expand on all
...
targets.
llvm-svn: 45320
2007-12-22 20:47:56 +00:00
41689b52ab
Use getIntrinsicID instead of looking up intrinsic prototypes. Also
...
fixes a bug with indirect calls. (Test case will be included with
ocaml collector patch.)
llvm-svn: 45316
2007-12-22 17:27:01 +00:00
5a4c05d047
Note what still needs doing.
...
llvm-svn: 45310
2007-12-22 04:59:10 +00:00
4534100765
Remove critical edge breaking. It won't be necessary as long as we are very careful when inserting copies.
...
llvm-svn: 45309
2007-12-22 04:50:11 +00:00
f989141d30
More accurate checks for two-address constraints.
...
llvm-svn: 45259
2007-12-20 09:25:31 +00:00
a509537e25
The physical register + virtual register joining requirement was much too strict.
...
llvm-svn: 45253
2007-12-20 02:23:25 +00:00
61bc51ee97
Bring back a burr scheduling heuristic that's still needed.
...
llvm-svn: 45252
2007-12-20 02:22:36 +00:00
65c001e6bc
Updated comments to reflect what "side effects" means in this situation.
...
llvm-svn: 45245
2007-12-20 01:08:10 +00:00
e9d8861cdf
Simplify LowerCallTo by using a callsite.
...
llvm-svn: 45198
2007-12-19 09:48:52 +00:00
030bce7b83
The C++ exception handling personality function wants
...
to know about calls that cannot throw ('nounwind'):
if such a call does throw for some reason then the
personality will terminate the program. The distinction
between an ordinary call and a nounwind call is that
an ordinary call gets an entry in the exception table
but a nounwind call does not. This patch sets up the
exception table appropriately. One oddity is that
I've chosen to bracket nounwind calls with labels (like
invokes) - the other choice would have been to bracket
ordinary calls with labels. While bracketing
ordinary calls is more natural (because bracketing
by labels would then correspond exactly to getting an
entry in the exception table), I didn't do it because
introducing labels impedes some optimizations and I'm
guessing that ordinary calls occur more often than
nounwind calls. This fixes the gcc filter2 eh test,
at least at -O0 (the inliner needs some tweaking at
higher optimization levels).
llvm-svn: 45197
2007-12-19 07:36:31 +00:00
9f06e5e2df
Don't leave newly created nodes around if it turns out they are not needed.
...
llvm-svn: 45186
2007-12-19 01:34:38 +00:00
166f746246
Add debugging info. Use the newly created "hasUnmodelledSideEffects" method.
...
llvm-svn: 45178
2007-12-18 21:38:04 +00:00
95cc3e0e66
Support more insane CEP's in AsmPrinter (Yes, PyPy folks do really use them).
...
llvm-svn: 45172
2007-12-18 20:53:41 +00:00
483a969ece
Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id.
...
llvm-svn: 45167
2007-12-18 19:38:14 +00:00
78ced47a2f
Also print alignment and volatileness.
...
llvm-svn: 45164
2007-12-18 19:06:30 +00:00
91e0fc9cb4
FIX for PR1799: When a load is unfolded from an instruction, check if it is a new node. If not, do not create a new SUnit.
...
llvm-svn: 45157
2007-12-18 08:42:10 +00:00
e2dbba5828
SelectionDAG::dump() should print SrcValue of LoadSDNode and StoreSDNode.
...
llvm-svn: 45151
2007-12-18 07:02:08 +00:00
b5a79d0eaa
Make invokes of inline asm legal. Teach codegen
...
how to lower them (with no attempt made to be
efficient, since they should only occur for
unoptimized code).
llvm-svn: 45108
2007-12-17 18:08:19 +00:00
edf0788758
Change the PointerType api for creating pointer types. The old functionality of PointerType::get() has become PointerType::getUnqual(), which returns a pointer in the generic address space. The new prototype of PointerType::get() requires both a type and an address space.
...
llvm-svn: 45082
2007-12-17 01:12:55 +00:00
7b8a741189
Break local interferences in StrongPHIElimination. One step closer...
...
llvm-svn: 45070
2007-12-16 05:44:27 +00:00
ccb3981256
A few more comments.
...
llvm-svn: 45069
2007-12-16 04:07:23 +00:00
8a332b235d
Add explicit keywords, and fix a minor typo that they uncovered.
...
llvm-svn: 45034
2007-12-14 15:41:34 +00:00
0fcf56f8f5
Bug fix. Must also match ResNo when matching an operand with a user.
...
llvm-svn: 45028
2007-12-14 08:25:15 +00:00
53b677e4e8
Add register pairs to the list to check for local interferences.
...
llvm-svn: 44987
2007-12-13 05:53:03 +00:00
1f93edd08a
Remove ugly and horrible code. It's not necessary for correctness, and can be added back later if it causes code quality issues.
...
llvm-svn: 44986
2007-12-13 05:43:37 +00:00
6e68381e02
Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
...
llvm-svn: 44960
2007-12-12 23:12:09 +00:00
7a7742c2fe
Allow vector integer constants to be created with
...
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.
llvm-svn: 44954
2007-12-12 22:21:26 +00:00
499e5bffcf
Forgot to remove a register from the PHI-union after I'd determined that it
...
interfered with other registers. Seems like that might be a good thing to do. :-)
llvm-svn: 44902
2007-12-12 01:25:08 +00:00
6766d2fa4f
If deleting a reload instruction due to reuse (value is available in register R and reload is targeting R), make sure to invalidate the kill information of the last kill.
...
llvm-svn: 44894
2007-12-11 23:36:57 +00:00
38236ef6cb
Need to grow the indexed map. Added debug statements.
...
llvm-svn: 44892
2007-12-11 23:27:51 +00:00
642e15a7cb
Simplify slightly.
...
llvm-svn: 44881
2007-12-11 22:22:22 +00:00
f24dd1c1eb
More progress on StrongPHIElimination. Now we actually USE the DomForest!
...
llvm-svn: 44877
2007-12-11 20:12:11 +00:00
b678ae7c38
Blark! How in the world did this work without this?!
...
llvm-svn: 44874
2007-12-11 19:40:06 +00:00
7717a8a37d
- Update the virtual reg to machine instruction map when hoisting.
...
- Fix subtle bug when creating initially creating this map.
llvm-svn: 44873
2007-12-11 19:17:04 +00:00
5143d898c8
Checking for "zero operands" during the "CanHoistInst()" method isn't necessary
...
because those with side effects will be caught by other checks in here.
Also, simplify the check for a BB in a sub loop.
llvm-svn: 44871
2007-12-11 18:45:11 +00:00
303417d242
Switch over to MachineLoopInfo.
...
llvm-svn: 44838
2007-12-11 02:09:15 +00:00
f54030231e
Pretty print shuffle mask operand.
...
llvm-svn: 44837
2007-12-11 02:08:35 +00:00
7843c16f31
CollectorMetadata and Collector are rejiggered to get along with
...
per-function collector model. Collector is now the factory for
CollectorMetadata, so the latter may be subclassed.
llvm-svn: 44827
2007-12-11 00:30:17 +00:00
ba61806ef1
A little more progress on StrongPHIElimination, now that I have a better sense of
...
how the CodeGen machinery works.
llvm-svn: 44786
2007-12-10 08:07:09 +00:00
d202e03fe5
Improve branch folding by recgonizing that explict successor relationships impact the value of fall-through choices.
...
llvm-svn: 44785
2007-12-10 07:24:06 +00:00
64443973c0
Duncan points out that the subtraction is unneeded since hte code
...
knows the vector is not pow2
llvm-svn: 44740
2007-12-09 17:56:34 +00:00
69d3298777
Add support for splitting the operand of a return instruction.
...
llvm-svn: 44728
2007-12-09 00:06:19 +00:00
3f19dfe794
Reverting 44702. It wasn't correct to rename them.
...
llvm-svn: 44727
2007-12-08 23:58:46 +00:00
e48fc80446
add many new cases to SplitResult. SplitResult now handles all the cases that LegalizeDAG does.
...
llvm-svn: 44726
2007-12-08 23:58:27 +00:00
de9046af54
Implement splitting support for store, allowing us to compile:
...
%f8 = type <8 x float>
define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
%p = load %f8* %P ; <%f8> [#uses=1]
%q = load %f8* %Q ; <%f8> [#uses=1]
%R = add %f8 %p, %q ; <%f8> [#uses=1]
store %f8 %R, %f8* %S
ret void
}
into:
_test_f8:
movaps 16(%rdi), %xmm0
addps 16(%rsi), %xmm0
movaps (%rdi), %xmm1
addps (%rsi), %xmm1
movaps %xmm0, 16(%rdx)
movaps %xmm1, (%rdx)
ret
llvm-svn: 44725
2007-12-08 23:24:26 +00:00
de87224cd9
implement vector splitting of load, undef, and binops.
...
llvm-svn: 44724
2007-12-08 23:08:49 +00:00
1ef437d4e1
implement some methods.
...
llvm-svn: 44723
2007-12-08 22:40:18 +00:00
a5e7db115e
add scaffolding for splitting of vectors.
...
llvm-svn: 44722
2007-12-08 22:37:41 +00:00
8c8eaf6b92
reorganize header to separate into functional blocks.
...
llvm-svn: 44719
2007-12-08 21:59:32 +00:00
4063bd6eae
split scalarization out to its own file.
...
llvm-svn: 44718
2007-12-08 20:30:28 +00:00
5c7c46baaf
Split expansion out into its own file.
...
llvm-svn: 44717
2007-12-08 20:27:32 +00:00
029c816460
Split promotion support out to its own file.
...
llvm-svn: 44716
2007-12-08 20:24:38 +00:00
757d4beba9
Rename LegalizeDAGTypes.cpp -> LegalizeTypes.cpp
...
llvm-svn: 44715
2007-12-08 20:17:13 +00:00
92288147b6
Split the class definition of DAGTypeLegalizer out into a header.
...
Leave it visibility hidden, but not in an anon namespace.
llvm-svn: 44714
2007-12-08 20:16:06 +00:00
2b07d8c5a0
Renaming:
...
isTriviallyReMaterializable -> hasNoSideEffects
isReallyTriviallyReMaterializable -> isTriviallyReMaterializable
llvm-svn: 44702
2007-12-08 07:17:56 +00:00
4375173ba0
Incorporated comments from Evan and Chris:
...
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056043.html
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056048.html
llvm-svn: 44696
2007-12-08 01:47:01 +00:00
fb706bc52b
Initial commit of the machine code LICM pass. It successfully hoists this:
...
_foo:
li r2, 0
LBB1_1: ; bb
li r5, 0
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
to:
_foo:
li r2, 0
li r5, 0
LBB1_1: ; bb
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
ZOMG!! :-)
Moar to come...
llvm-svn: 44687
2007-12-07 21:42:31 +00:00
85cdba29b0
Add an option to control this heuristic tweak so I can test it.
...
llvm-svn: 44671
2007-12-07 00:28:32 +00:00
5eff4de9c8
Redo previous patch so optimization only done for i1.
...
Simpler and safer.
llvm-svn: 44663
2007-12-06 17:53:31 +00:00
8393dc7378
Turning simple splitting on. Start testing new coalescer heuristics as new llcbeta.
...
llvm-svn: 44660
2007-12-06 08:54:31 +00:00
eedaf92fcf
third time around: instead of disabling this completely,
...
only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)
llvm-svn: 44658
2007-12-06 07:47:55 +00:00
b5fdfb9612
Actually, disable this code for now. More analysis and improvements to
...
the X86 backend are needed before this should be enabled by default.
llvm-svn: 44657
2007-12-06 07:44:31 +00:00
7c709a5d08
implement a readme entry, compiling the code into:
...
_foo:
movl $12, %eax
andl 4(%esp), %eax
movl _array(%eax), %eax
ret
instead of:
_foo:
movl 4(%esp), %eax
shrl $2, %eax
andl $3, %eax
movl _array(,%eax,4), %eax
ret
As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:
- movl 8(%eax), %eax
- shll $2, %eax
- andl $1020, %eax
- movl (%esi,%eax), %eax
+ movzbl 8(%eax), %eax
+ movl (%esi,%eax,4), %eax
- shll $2, %edx
- andl $1020, %edx
- movl (%edi,%edx), %edx
+ andl $255, %edx
+ movl (%edi,%edx,4), %edx
Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:
- andl $85, %ebx
- addl _bit_count(,%ebx,4), %ebp
+ shll $2, %ebx
+ andl $340, %ebx
+ addl _bit_count(%ebx), %ebp
llvm-svn: 44656
2007-12-06 07:33:36 +00:00
42558bf664
implement the rest of the functionality from SelectionDAGLegalize::ScalarizeVectorOp
...
llvm-svn: 44654
2007-12-06 05:53:43 +00:00
05bbbda78a
Fix PR1842.
...
llvm-svn: 44649
2007-12-06 01:43:46 +00:00
7fc1d98353
Fix for PR1831: if all defs of an interval are re-materializable, then it's a preferred spill candiate.
...
llvm-svn: 44644
2007-12-06 00:01:56 +00:00
678b86d6ce
MachineInstr can change. Store indexes instead.
...
llvm-svn: 44612
2007-12-05 10:24:35 +00:00
06353b48b5
If a split live interval is spilled again, remove the kill marker on its last use.
...
llvm-svn: 44611
2007-12-05 09:51:10 +00:00
64b3baaaea
Clobber more bugs.
...
llvm-svn: 44610
2007-12-05 09:05:34 +00:00
d7de56ac93
Fix kill info for split intervals.
...
llvm-svn: 44609
2007-12-05 08:16:32 +00:00
c9693c60a5
more scalarization
...
llvm-svn: 44608
2007-12-05 07:45:02 +00:00
1a0d49a63c
scalarize vector binops
...
llvm-svn: 44607
2007-12-05 07:36:58 +00:00
269dbd31d0
- Mark last use of a split interval as kill instead of letting spiller track it.
...
This allows an important optimization to be re-enabled.
- If all uses / defs of a split interval can be folded, give the interval a
low spill weight so it would not be picked in case spilling is needed (avoid
pushing other intervals in the same BB to be spilled).
llvm-svn: 44601
2007-12-05 03:22:34 +00:00
bb26301864
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
...
the stored register is killed.
llvm-svn: 44600
2007-12-05 03:14:33 +00:00
e412a4427b
Remove a unsafe optimization. This fixes 401.bzip2.
...
llvm-svn: 44587
2007-12-04 23:57:55 +00:00
cd8a89b3cd
Spiller unfold optimization bug: do not clobber a reusable stack slot value unless it can be modified.
...
llvm-svn: 44575
2007-12-04 19:19:45 +00:00
b892225fb9
Implement framework for scalarizing node results. This is sufficient
...
to codegen this:
define float @test_extract_elt(<1 x float> * %P) {
%p = load <1 x float>* %P
%R = extractelement <1 x float> %p, i32 0
ret float %R
}
llvm-svn: 44570
2007-12-04 07:48:46 +00:00
681c9d6697
start providing framework for scalarizing vectors.
...
llvm-svn: 44569
2007-12-04 07:29:51 +00:00
d1badb960e
Discard split intervals made empty due to folding.
...
llvm-svn: 44565
2007-12-04 00:32:23 +00:00
40965448ff
Bug fixes.
...
llvm-svn: 44549
2007-12-03 21:31:55 +00:00
38ef3a8ec7
Rather than having special rules like "intrinsics cannot
...
throw exceptions", just mark intrinsics with the nounwind
attribute. Likewise, mark intrinsics as readnone/readonly
and get rid of special aliasing logic (which didn't use
anything more than this anyway).
llvm-svn: 44544
2007-12-03 20:06:50 +00:00
196faa9dc5
Typo
...
llvm-svn: 44532
2007-12-03 10:00:00 +00:00
85ef9834a6
Update kill info for uses of split intervals.
...
llvm-svn: 44531
2007-12-03 09:58:48 +00:00
f45a1d623c
Remove redundant foldMemoryOperand variants and other code clean up.
...
llvm-svn: 44517
2007-12-02 08:30:39 +00:00
388f6f51a0
Fix a bug where splitting cause some unnecessary spilling.
...
llvm-svn: 44482
2007-12-01 04:42:39 +00:00
69fda0a716
Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0.
...
llvm-svn: 44479
2007-12-01 02:07:52 +00:00
b10dc27b20
Do not fold reload into an instruction with multiple uses. It issues one extra load.
...
llvm-svn: 44467
2007-11-30 21:23:43 +00:00
cc45c338d1
Provide a way to update DescGlobals cache directly.
...
llvm-svn: 44446
2007-11-30 00:51:33 +00:00
d35b5acae4
Do not lose rematerialization info when spilling already split live intervals.
...
llvm-svn: 44443
2007-11-29 23:02:50 +00:00
8494ee175c
Fix a major performance issue with splitting. If there is a def (not def/use)
...
in the middle of a split basic block, create a new live interval starting at
the def. This avoid artifically extending the live interval over a number of
cycles where it is dead. e.g.
bb1:
= vr1204 (use / kill) <= new interval starts and ends here.
...
...
vr1204 = (new def) <= start a new interval here.
= vr1204 (use)
llvm-svn: 44436
2007-11-29 10:12:14 +00:00
f85c063ec0
Replace the odd kill# hack with something less fragile.
...
llvm-svn: 44434
2007-11-29 09:49:23 +00:00
be255b0650
Fixed various live interval splitting bugs / compile time issues.
...
llvm-svn: 44428
2007-11-29 01:06:25 +00:00
147f7799c5
Kill info update bug.
...
llvm-svn: 44427
2007-11-29 01:05:47 +00:00
5208d1ab4a
Add some convenience methods for querying attributes, and
...
use them.
llvm-svn: 44403
2007-11-28 17:07:01 +00:00
45a0c3265f
Add missing newlines at EOF.
...
llvm-svn: 44399
2007-11-28 10:13:38 +00:00
c1648b6a0d
Recover compile time regression.
...
llvm-svn: 44386
2007-11-28 01:28:46 +00:00
30767b15e9
Add MachineLoopInfo. This is not yet tested.
...
llvm-svn: 44384
2007-11-27 22:47:08 +00:00
6f026a654c
Support returning non-power-of-2 vectors to unblock some work
...
llvm-svn: 44371
2007-11-27 19:28:48 +00:00
ad0ea2d430
Fix PR1146: parameter attributes are longer part of
...
the function type, instead they belong to functions
and function calls. This is an updated and slightly
corrected version of Reid Spencer's original patch.
The only known problem is that auto-upgrading of
bitcode files doesn't seem to work properly (see
test/Bitcode/AutoUpgradeIntrinsics.ll). Hopefully
a bitcode guru (who might that be? :) ) will fix it.
llvm-svn: 44359
2007-11-27 13:23:08 +00:00
698b1cb28d
err, no really.
...
llvm-svn: 44352
2007-11-27 06:14:32 +00:00
28caf2717a
don't depend on ADL.
...
llvm-svn: 44351
2007-11-27 06:14:12 +00:00
9a69341725
Don't lower srem/urem X%C to X-X/C*C unless the division is actually
...
optimized. This avoids creating illegal divisions when the combiner is
running after legalize; this fixes PR1815. Also, it produces better
code in the included testcase by avoiding the subtract and multiply
when the division isn't optimized.
llvm-svn: 44341
2007-11-26 23:46:11 +00:00
cab915f9cf
Implement expand support for MERGE_VALUEs that only produces one result.
...
llvm-svn: 44304
2007-11-24 19:12:15 +00:00
6e3641897b
Implement support for custom legalization in DAGTypeLegalizer::ExpandOperand.
...
Improve a comment.
Unbreak Duncan's carefully written path compression where I didn't realize
what was happening!
llvm-svn: 44301
2007-11-24 18:11:42 +00:00
f81d5886c6
Several changes:
...
1) Change the interface to TargetLowering::ExpandOperationResult to
take and return entire NODES that need a result expanded, not just
the value. This allows us to handle things like READCYCLECOUNTER,
which returns two values.
2) Implement (extremely limited) support in LegalizeDAG::ExpandOp for MERGE_VALUES.
3) Reimplement custom lowering in LegalizeDAGTypes in terms of the new
ExpandOperationResult. This makes the result simpler and fully
general.
4) Implement (fully general) expand support for MERGE_VALUES in LegalizeDAGTypes.
5) Implement ExpandOperationResult support for ARM f64->i64 bitconvert and ARM
i64 shifts, allowing them to work with LegalizeDAGTypes.
6) Implement ExpandOperationResult support for X86 READCYCLECOUNTER and FP_TO_SINT,
allowing them to work with LegalizeDAGTypes.
LegalizeDAGTypes now passes several more X86 codegen tests when enabled and when
type legalization in LegalizeDAG is ifdef'd out.
llvm-svn: 44300
2007-11-24 07:07:01 +00:00
b87dde7e8e
Fix a bug in which node A is replaced by node B, but later
...
node A gets back into the DAG again because it was hiding in
one of the node maps: make sure that node replacement happens
in those maps too.
llvm-svn: 44263
2007-11-21 16:43:19 +00:00
763e110a9f
Fix .eh table linkage issues on Darwin. Some EH support
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for Darwin PPC, but it's not fully working yet.
llvm-svn: 44258
2007-11-20 23:24:42 +00:00
09c0393d5e
ExpandUnalignedLoad doesn't handle vectors right at all apparently.
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Fix a couple of problems:
1. Don't assume the VT-1 is a VT that is half the size.
2. Treat vectors of FP in the vector path, not the FP path.
This has a couple of remaining problems before it will work with
the code in PR1811: the code below this change assumes that it can
use extload/shift/or to construct the result, which isn't right for
vectors.
This also doesn't handle vectors of 1 or vectors that aren't pow-2.
llvm-svn: 44243
2007-11-19 21:38:03 +00:00
6fa95ec19d
Implement vector expand support for shuffle_vector. This fixes PR1811.
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llvm-svn: 44242
2007-11-19 21:16:54 +00:00
67d77945e7
Implement splitting of UNDEF nodes. This is the first step towards fixing PR1811
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llvm-svn: 44239
2007-11-19 20:21:32 +00:00
36347a26f9
Add support in SplitVectorOp for remainder operators.
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llvm-svn: 44233
2007-11-19 15:15:03 +00:00
d4d45c268c
Add support for vectors to int <-> float casts.
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llvm-svn: 44204
2007-11-17 03:58:34 +00:00
8e22379303
Live interval splitting:
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When a live interval is being spilled, rather than creating short, non-spillable
intervals for every def / use, split the interval at BB boundaries. That is, for
every BB where the live interval is defined or used, create a new interval that
covers all the defs and uses in the BB.
This is designed to eliminate one common problem: multiple reloads of the same
value in a single basic block. Note, it does *not* decrease the number of spills
since no copies are inserted so the split intervals are *connected* through
spill and reloads (or rematerialization). The newly created intervals can be
spilled again, in that case, since it does not span multiple basic blocks, it's
spilled in the usual manner. However, it can reuse the same stack slot as the
previously split interval.
This is currently controlled by -split-intervals-at-bb.
llvm-svn: 44198
2007-11-17 00:40:40 +00:00
66b91e66ec
Implement necessary bits for flt_rounds gcc builtin.
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Codegen bits and llvm-gcc support will follow.
llvm-svn: 44182
2007-11-15 23:25:33 +00:00
bd117f06ba
Basic non-power-of-2 vector support
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llvm-svn: 44181
2007-11-15 21:15:26 +00:00
d4494352f8
This assertion was bogus.
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llvm-svn: 44167
2007-11-15 09:54:37 +00:00
2c1a50455c
Fix a thinko in post-allocation coalescer.
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llvm-svn: 44166
2007-11-15 08:13:29 +00:00
b3712f8146
Adding debug output during coalescing.
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llvm-svn: 44154
2007-11-15 02:06:30 +00:00
8269925b1e
Need to increment the iterator.
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llvm-svn: 44153
2007-11-15 00:40:48 +00:00
2c6387803e
Fix PIC jump table codegen on x86-32/linux. In fact, such thing should be applied
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to all targets uses GOT-relative offsets for PIC (Alpha?)
llvm-svn: 44108
2007-11-14 09:18:41 +00:00
7f02cfa599
Clean up sub-register implementation by moving subReg information back to
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MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.
llvm-svn: 44104
2007-11-14 07:59:08 +00:00
d8167ab332
Run computeDomForest() on the set of registers that need to be tested for
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interference.
llvm-svn: 44064
2007-11-13 20:13:24 +00:00
569ef71e44
Preserve LiveVariables when doing critical edge splitting.
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llvm-svn: 44063
2007-11-13 20:04:45 +00:00
7a7085f6d3
Add parameter to getDwarfRegNum to permit targets
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to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
llvm-svn: 44056
2007-11-13 19:13:01 +00:00
f359fed9f9
Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
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adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).
This can only result in tears...
llvm-svn: 44037
2007-11-13 00:44:25 +00:00
c520c4b325
Break critical edges coming into blocks with PHI nodes.
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llvm-svn: 44019
2007-11-12 17:27:27 +00:00
be51f28e2b
Refactor some code.
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llvm-svn: 44010
2007-11-12 06:35:08 +00:00
a1cd45213d
As Chris and Evan pointed out, BreakCriticalMachineEdges doesn't really need
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to be a pass of its own. Instead, move it out into a helper method.
llvm-svn: 44002
2007-11-12 01:05:09 +00:00
67297144ab
Fixed a strange construct. Please review.
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llvm-svn: 43960
2007-11-09 19:59:00 +00:00
e795efea5b
Move MinAlign to MathExtras.h.
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llvm-svn: 43944
2007-11-09 13:41:39 +00:00
e7a9ac929f
Fix some load/store logic that would be wrong for
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apints on big-endian machines if the bitwidth is
not a multiple of 8. Introduce a new helper,
MVT::getStoreSizeInBits, and use it.
llvm-svn: 43934
2007-11-09 08:57:19 +00:00
bab9dc9433
Add terminating newline.
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llvm-svn: 43933
2007-11-09 08:30:21 +00:00
797d56ff17
Much improved pic jumptable codegen:
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Then:
call "L1$pb"
"L1$pb":
popl %eax
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LBB1_1: # entry
imull $4, %ecx, %ecx
leal LJTI1_0-"L1$pb"(%eax), %edx
addl LJTI1_0-"L1$pb"(%ecx,%eax), %edx
jmpl *%edx
.align 2
.set L1_0_set_3,LBB1_3-LJTI1_0
.set L1_0_set_2,LBB1_2-LJTI1_0
.set L1_0_set_5,LBB1_5-LJTI1_0
.set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
Now:
call "L1$pb"
"L1$pb":
popl %eax
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LBB1_1: # entry
addl LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
jmpl *%eax
.align 2
.set L1_0_set_3,LBB1_3-"L1$pb"
.set L1_0_set_2,LBB1_2-"L1$pb"
.set L1_0_set_5,LBB1_5-"L1$pb"
.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
llvm-svn: 43924
2007-11-09 01:32:10 +00:00
f14006f4d6
Didn't mean to check these in.
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llvm-svn: 43923
2007-11-09 01:28:33 +00:00
1bf166312b
Bug fix. Passive nodes are not in SUnitMap.
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llvm-svn: 43922
2007-11-09 01:27:11 +00:00
65d2fcdd2a
This preserves critical edge breaking.
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llvm-svn: 43911
2007-11-08 22:23:57 +00:00
3bc8124a66
Make BreakCriticalMachineEdges available as a pass that can be depended on.
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llvm-svn: 43910
2007-11-08 22:20:23 +00:00
ece4c68b82
If both parts of smul_lohi, etc. are used, don't simplify. If only one part is used, try simplify it.
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llvm-svn: 43888
2007-11-08 09:25:29 +00:00
0be8c1dafe
Add the majority of machine-level critical edge breaking pass. Most of this was written by Fernando, cleanup and updating to TOT by me.
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This still needs a bit of work, particularly to handle jump tables properly.
llvm-svn: 43885
2007-11-08 07:55:43 +00:00
bfbc12973d
Take another stab at getting isLiveIn() and isLiveOut() right.
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llvm-svn: 43869
2007-11-08 01:32:45 +00:00
Chris Lattner