e6283f950d
Change the prologue and epilogue to use push/pop for the low ARM registers.
...
llvm-svn: 118823
2010-11-11 19:26:03 +00:00
7dacf8f3f3
Avoid calling alias on non-pointer values.
...
llvm-svn: 118822
2010-11-11 19:23:51 +00:00
7ffe3b35ac
Add support for Thumb2 encodings of NEON data processing instructions, using the new PostEncoderMethod infrastructure.
...
More tests to come.
llvm-svn: 118819
2010-11-11 19:07:48 +00:00
84d031870c
Mark labels declared in tls sections as STT_TLS. This matches the behavior of
...
gas.
llvm-svn: 118818
2010-11-11 19:04:55 +00:00
d1a6f5a384
Fixed some bugs in MBlaze asm parser that were introduced when removing OwningPtrs from the code.
...
llvm-svn: 118807
2010-11-11 18:41:33 +00:00
932aab3cbf
add a note
...
llvm-svn: 118806
2010-11-11 18:23:57 +00:00
a3e9a2298d
Initial comdat implementation.
...
llvm-svn: 118805
2010-11-11 18:13:52 +00:00
dcdfd8dd24
TBAA-enable ArgumentPromotion.
...
llvm-svn: 118804
2010-11-11 18:09:32 +00:00
4162e3e213
Add a FIXME comment.
...
llvm-svn: 118803
2010-11-11 18:08:43 +00:00
9d6d77a9f4
Encoding of destination fixup for ARM branch and conditional branch
...
instructions.
llvm-svn: 118801
2010-11-11 18:04:49 +00:00
f11344d770
Check TRI->getReservedRegs because other allocators do it. Even though
...
it makes no sense for allocation_order iterators to visit reserved regs.
The inline spiller depends on AliasAnalysis.
Manage the Query state to avoid uninitialized or stale results.
llvm-svn: 118800
2010-11-11 17:46:29 +00:00
fb6540c112
Make AliasedSymbol able to handle MCTargetExpr. They can get here if
...
a weakref is used with a VariantKind.
llvm-svn: 118798
2010-11-11 17:24:43 +00:00
1d6aa32b87
add pr#
...
llvm-svn: 118797
2010-11-11 17:17:56 +00:00
68685e644f
Encoding for ARM LDRSH_POST.
...
llvm-svn: 118794
2010-11-11 16:55:29 +00:00
fa7b55754c
Fix the symbol index of weak references. Also make RecordRelocation a bit
...
easier to read by having const references to the symbol, aliased symbol and
renamed symbol.
llvm-svn: 118793
2010-11-11 16:48:11 +00:00
f51d06bbee
Include ImmutablePass passes in -debug-pass=Arguments.
...
llvm-svn: 118790
2010-11-11 16:32:17 +00:00
6cf9bb45ad
Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this.
...
llvm-svn: 118789
2010-11-11 16:24:49 +00:00
0cc4c7516e
Make Sink tbaa-aware.
...
llvm-svn: 118788
2010-11-11 16:21:47 +00:00
c3b4ea7b7d
It's safe to sink some instructions which are not safe to speculatively
...
execute. Make Sink's predicate more precise.
llvm-svn: 118787
2010-11-11 16:20:28 +00:00
19fa38000a
Remove some explicit arguments to getELFSection. This is
...
a leftover from the removal of isExplicit.
llvm-svn: 118774
2010-11-11 03:40:25 +00:00
f18b951e18
Encoding for ARM LDRSH and LDRSH_PRE. Cannonicalize operand names.
...
llvm-svn: 118767
2010-11-11 01:55:59 +00:00
e967c0a795
Fix encoding of Ra register for ARM smla* instructions.
...
llvm-svn: 118761
2010-11-11 01:27:41 +00:00
607efcbc3e
ARM STRH encoding information.
...
llvm-svn: 118757
2010-11-11 01:09:40 +00:00
9a2c6b8f3e
Delete SplittingSpiller. It was not being used by anyone, and it is being
...
superceded by SplitKit.
llvm-svn: 118754
2010-11-11 00:52:44 +00:00
c87c843db7
It's not necessary to clear out the Size and TBAATag at each of
...
these points.
llvm-svn: 118752
2010-11-11 00:42:22 +00:00
8bf3d832e5
Set NonLocalDepInfo's Size field to UnknownSize when invalidating
...
it, so that it doesn't appear to be a known size.
llvm-svn: 118748
2010-11-11 00:20:27 +00:00
c400670bf1
Insert two blank SlotIndexes between basic blocks instead of just one.
...
This is the first small step towards using closed intervals for liveness instead
of the half-open intervals we're using now.
We want to be able to distinguish between a SlotIndex that represents a variable
being live-out of a basic block, and an index representing a variable live-in to
its successor.
That requires two separate indexes between blocks. One for live-outs and one for
live-ins.
With this change, getMBBEndIdx(MBB).getPrevSlot() becomes stable so it stays
greater than any instructions inserted at the end of MBB.
llvm-svn: 118747
2010-11-11 00:19:20 +00:00
3cb87f4c31
No need to add liveness that's already there.
...
llvm-svn: 118742
2010-11-10 23:56:00 +00:00
868dd4e66a
Hook up AliasAnalysis in InlineSpiller. This is used for rematerializing
...
constant loads.
llvm-svn: 118741
2010-11-10 23:55:56 +00:00
c4dd2349c7
Move LDM predicate operand encoding into base clase. Add STM missing STM
...
encoding bits.
llvm-svn: 118738
2010-11-10 23:44:32 +00:00
cc4a491557
ARM LDM encoding for the mode (ia, ib, da, db) operand.
...
llvm-svn: 118736
2010-11-10 23:38:36 +00:00
5a8d781caa
Factor some code into WriteSection.
...
llvm-svn: 118733
2010-11-10 23:36:59 +00:00
58ef598cd1
Fix ARM encoding of non-return LDM instructions.
...
llvm-svn: 118732
2010-11-10 23:18:49 +00:00
e39a9fcc0e
Fix ARM encoding of LDM+Return instruction.
...
llvm-svn: 118730
2010-11-10 23:12:48 +00:00
6791936848
When clearing a non-local pointer dependency cache entry, clear
...
the reverse map too. This fixes seflhost build errors.
llvm-svn: 118729
2010-11-10 22:35:02 +00:00
eb97f59753
Update the section index map after we add the medatada sections.
...
llvm-svn: 118728
2010-11-10 22:34:07 +00:00
364bf04267
Take care of special characters while creating named MDNode name to hold function specific local variable's info.
...
This fixes radar 8653152. I am checking in testcase as a separate check-in.
llvm-svn: 118726
2010-11-10 22:19:21 +00:00
1801410fa8
Use SectionIndexMap in WriteSymbolTable to make it a little less brittle.
...
llvm-svn: 118725
2010-11-10 22:16:43 +00:00
1d760ce8b3
Factor out the code for computing an AliasAnalysis::Location
...
for a given instruction into a helper function.
llvm-svn: 118723
2010-11-10 21:51:35 +00:00
d634003ebd
Factor some code into ComputeIndexMap.
...
llvm-svn: 118722
2010-11-10 21:51:05 +00:00
2e8ca44b81
Fully invalidate cached results when a prior query's size or
...
type is insufficient for, or incompatible with, the current query.
llvm-svn: 118721
2010-11-10 21:45:11 +00:00
ca52411955
Fix an issue where we tried to turn a v2f32 build_vector into a v4i32 build vector with 2 elts
...
llvm-svn: 118720
2010-11-10 21:35:41 +00:00
8f7220e9fd
Reduce the maximum recursion depth, 5 seems pointlessly too much.
...
Probably it should just be 1, but compromise with 3.
llvm-svn: 118718
2010-11-10 20:53:24 +00:00
0a6021a54d
Enhance GVN to do more precise alias queries for non-local memory
...
references. For example, this allows gvn to eliminate the load in
this example:
void foo(int n, int* p, int *q) {
p[0] = 0;
p[1] = 1;
if (n) {
*q = p[0];
}
}
llvm-svn: 118714
2010-11-10 20:37:15 +00:00
51d68339a2
Change the String<size> methods to take a fragment instead of a buffer.
...
llvm-svn: 118709
2010-11-10 20:02:59 +00:00
6ee7d9aade
Basic rematerialization during splitting.
...
Whenever splitting wants to insert a copy, it checks if the value can be
rematerialized cheaply instead.
Missing features:
- Delete instructions when all uses have been rematerialized.
- Truncate live ranges to the remaining uses after rematerialization.
llvm-svn: 118702
2010-11-10 19:31:50 +00:00
89eb6a8b94
RABasic is nearly functionally complete. There are a few remaining
...
benchmarks hitting an assertion.
Adds LiveIntervalUnion::collectInterferingVRegs.
Fixes "late spilling" by checking for any unspillable live vregs among
all physReg aliases.
llvm-svn: 118701
2010-11-10 19:18:47 +00:00
36ef57d2eb
Use MCSectionELF in places we know we have an ELF section.
...
llvm-svn: 118699
2010-11-10 19:05:07 +00:00
d209911642
Use getValueOperand() and getPointerOperand() on load and store
...
instructions instead of hard-coding operand numbers.
llvm-svn: 118698
2010-11-10 19:03:33 +00:00
f3b1bf1606
Teach InstructionSimplify how to look through PHI nodes. Since PHI
...
nodes can be used in loops, this could result in infinite looping
if there is no recursion limit, so add such a limit. It is also
used for the SelectInst case because in theory there could be an
infinite loop there too if the basic block is unreachable.
llvm-svn: 118694
2010-11-10 18:23:01 +00:00
066c1bb1e9
Add a doesAccessArgPointees helper function, and update code to use
...
it, and to be consistent.
llvm-svn: 118692
2010-11-10 18:17:28 +00:00
ca21cd749e
Simplify and clean up MC symbol lookup for ARM constant pool values. This fixes
...
double quoting of ObjC symbol names in constant pool entries.
rdar://8652107
llvm-svn: 118688
2010-11-10 17:59:10 +00:00
2577580967
Factor out the code for testing whether a function accesses
...
arbitrary memory into a helper function, and adjust some comments.
llvm-svn: 118687
2010-11-10 17:34:04 +00:00
b39a89716f
Fix Whitespace.
...
llvm-svn: 118683
2010-11-10 15:06:00 +00:00
909d238eba
System/Win32/Path: Implement isSymLink.
...
llvm-svn: 118681
2010-11-10 15:05:39 +00:00
b0579e9d3f
Simplify binary operations where one operand is a select instruction.
...
The simplifications performed here never create new instructions, they
only return existing instructions (or a constant), and so are always a
win. In theory they should transform (for example)
%z = and i32 %x, %y
%s = select i1 %cond, i32 %y, i32 %z
%r = and i32 %x, %s
into
%r = and i32 %x, y
but in practice they get into a fight with instcombine, and lose.
Unfortunately instcombine does a poor job in this case. Nonetheless
I'm committing this transform to make it easier to discuss what to
do to make peace with instcombine.
llvm-svn: 118679
2010-11-10 13:00:08 +00:00
23ebef1456
Win32/Process.inc: [PR8527] Process::FileDescriptorIsDisplayed(fd) should not check by FILE_TYPE_CHAR. It must be better to check it with Console API.
...
The special file "NUL" is FILE_TYPE_CHAR with GetFileType(h). It was treated as display device and discarding output to NUL had failed. (eg. opt -o nul)
llvm-svn: 118678
2010-11-10 08:37:47 +00:00
f23b2d9d8d
Update ARMConstantPoolValue to not use a modifier string. Use an explicit
...
VariantKind marker to indicate the additional information necessary. Update
MC to handle the new Kinds. rdar://8647623
llvm-svn: 118671
2010-11-10 03:26:07 +00:00
67fc18a493
Add clo instruction. Patch by Akira Hatanaka (ahatanaka@mips.com) with some minor tweaks
...
llvm-svn: 118667
2010-11-10 02:13:22 +00:00
0171dc30ff
When checking that the necessary bits are zero in
...
order to reduce ((x<<30)>>24) to x<<6, check the
correct bits. PR 8547.
llvm-svn: 118665
2010-11-10 01:30:56 +00:00
91607f878c
Emit a '!' if this is a "writeback" register or memory address.
...
llvm-svn: 118662
2010-11-10 01:07:54 +00:00
de5c4dc24b
Simplify the LiveRangeEdit::canRematerializeAt() interface a bit.
...
llvm-svn: 118661
2010-11-10 01:05:12 +00:00
2694e14087
Make ModRefBehavior a lattice. Use this to clean up AliasAnalysis
...
chaining and simplify FunctionAttrs' GetModRefBehavior logic.
llvm-svn: 118660
2010-11-10 01:02:18 +00:00
55c4cc76ce
Rename a parameter to avoid confusion with a local variable
...
llvm-svn: 118656
2010-11-10 00:08:58 +00:00
e9a9c6da04
Emit the warning about the register list not being in ascending order only once.
...
llvm-svn: 118653
2010-11-09 23:45:59 +00:00
9bb44a5ce8
Fixed version of 118639 with an extra assert to catch similar problems
...
earlier. Implicit bool -> int conversions are evil!
llvm-svn: 118651
2010-11-09 23:42:07 +00:00
bed9465a96
s/std::vector/SmallVector/
...
llvm-svn: 118648
2010-11-09 23:28:44 +00:00
33048f069f
Revert previous patch. Missed a case.
...
llvm-svn: 118645
2010-11-09 22:54:38 +00:00
da3c0fbc64
Delete the allocated vector.
...
llvm-svn: 118644
2010-11-09 22:51:42 +00:00
d0046ca62d
Define the subtarget feature for the architecture version,
...
as derived from the target triple. This is important for enabling
features that are implied based on the architecture version.
llvm-svn: 118643
2010-11-09 22:50:47 +00:00
193722ebc8
Do not use MEMBARRIER_MCR for any Thumb code.
...
It is only supported for ARM code. Normally Thumb2 code would use DMB instead,
but depending on how the compiler is invoked (e.g., -mattr=-db) that might be
disabled. This prevents a "cannot select MEMBARRIER_MCR" error in that
situation. Radar 8644195
llvm-svn: 118642
2010-11-09 22:50:44 +00:00
2cae3277a5
Two types of instructions have register lists:
...
* LDM, et al, uses a bit mask to indicate the register list.
* VLDM, et al, uses a base register plus number.
The LDM instructions may be non-contiguous, but the VLDM ones must be
contiguous. Those are semantic checks that should be done later in the
compiler. Also postpone the creation of the bit mask until it's needed.
llvm-svn: 118640
2010-11-09 22:44:22 +00:00
4bdd2724e3
Remove IsExplicit. It was always false.
...
llvm-svn: 118639
2010-11-09 22:37:44 +00:00
a942ad4222
Change the ARMConstantPoolValue modifier string to an enumeration. This will
...
help in MC'izing the references that use them.
llvm-svn: 118633
2010-11-09 21:36:17 +00:00
488660554e
Adds RABasic verification and tracing.
...
(retry now that the windows build is green)
llvm-svn: 118630
2010-11-09 21:04:34 +00:00
e3467a7687
Teach FunctionAttrs about the VAArg instruction.
...
llvm-svn: 118627
2010-11-09 20:17:38 +00:00
35814e6128
Use the AliasAnalysis interface to determine how a Function accesses
...
memory. This isn't a real improvement with present day AliasAnalysis
implementations; it's mainly for consistency.
llvm-svn: 118624
2010-11-09 20:13:27 +00:00
88ff1ece63
VAArg doesn't capture its operand.
...
llvm-svn: 118623
2010-11-09 20:09:35 +00:00
5d06f892ef
Teach AliasAnalysis about AccessesArgumentsReadonly.
...
llvm-svn: 118621
2010-11-09 20:06:55 +00:00
0f17507478
Teach LICM and AliasSetTracker about AccessesArgumentsReadonly.
...
llvm-svn: 118618
2010-11-09 19:58:21 +00:00
de52155685
Teach FunctionAttrs about AccessesArgumentsReadonly.
...
llvm-svn: 118617
2010-11-09 19:56:27 +00:00
7c1fddb531
Add a trivial virtual dtor to AbstractRegisterDescription to appease
...
-Wnon-virtual-dtor.
llvm-svn: 118616
2010-11-09 19:56:25 +00:00
42d50e920b
Reverting r118604. Windows build broke.
...
llvm-svn: 118613
2010-11-09 19:47:51 +00:00
2fd4c37d8b
Handle ARM constant pool values that need an explicit reference to the '.'
...
pseudo-label. (TLS stuff).
llvm-svn: 118609
2010-11-09 19:40:22 +00:00
4d94e47368
add a case we fail to devirt.
...
llvm-svn: 118608
2010-11-09 19:37:28 +00:00
68147ee320
Trailing whitespace.
...
llvm-svn: 118606
2010-11-09 19:22:26 +00:00
85064c17be
Adds RABasic verification and tracing.
...
llvm-svn: 118604
2010-11-09 19:01:17 +00:00
38f8e76e51
Further MCize ARM constant pool values. This allows basic PIC references for
...
object file emission.
llvm-svn: 118601
2010-11-09 18:45:04 +00:00
7e51095c23
Add encoding of Rt to ARM LDR/STR w/ reg+reg offset encoding.
...
llvm-svn: 118600
2010-11-09 18:43:54 +00:00
91bfeb10b5
Last try to get this reference counting right, I swear.
...
llvm-svn: 118589
2010-11-09 17:47:10 +00:00
2d335436f3
Really fix the leak in the attributes list. Thanks to Benjamin Kramer for pointing out how I was being stupid.
...
llvm-svn: 118588
2010-11-09 17:46:38 +00:00
59002dc973
For ARM load/store instructions, encode [reg+reg] with no shifter immediate as
...
a left shift by zero.
llvm-svn: 118587
2010-11-09 17:38:15 +00:00
9b973490c9
ARM .word data fixups don't need an adjustment.
...
llvm-svn: 118586
2010-11-09 17:36:59 +00:00
fc5ad3f0f9
Factorize code, no functionality change.
...
llvm-svn: 118516
2010-11-09 17:25:51 +00:00
9c5c829d9a
Fix trailing whitespace and style, no functionality change
...
llvm-svn: 118515
2010-11-09 17:25:34 +00:00
dbfb5edbdb
Add encoder method for ARM load/store shifted register offset operands.
...
llvm-svn: 118513
2010-11-09 17:20:53 +00:00
d7e3b54635
System/Path/Windows: Implement GetLLVMDefaultConfigDir.
...
llvm-svn: 118507
2010-11-09 15:11:42 +00:00
86cdb42737
System/Path/Windows: Generalize GetUserHomeDirectory.
...
llvm-svn: 118506
2010-11-09 15:11:31 +00:00
181fd8cd89
System/Path/Windows: Make GetSystemLibraryPaths more generic.
...
llvm-svn: 118505
2010-11-09 15:11:19 +00:00
bb6e51c957
System/Windows: Reduce dependencies.
...
llvm-svn: 118504
2010-11-09 15:11:07 +00:00
8daf3c00c9
System/Windows: Use normalized case and include method.
...
llvm-svn: 118503
2010-11-09 15:10:56 +00:00
df929cf8df
System/Path/Windows: Change GetRootDirectory to return file:/// instead of C:/.
...
llvm-svn: 118502
2010-11-09 15:10:45 +00:00
4b263dddc4
Update comment.
...
llvm-svn: 118501
2010-11-09 15:10:29 +00:00
25e84078e3
Fix leak in my recent fix for PR8442.
...
llvm-svn: 118490
2010-11-09 05:17:47 +00:00
5db8921422
Fix DAGCombiner to avoid folding a sext-in-reg or similar through a shl
...
in order to fold it into a load.
llvm-svn: 118471
2010-11-09 01:54:35 +00:00
9098714f8b
Add support for a few simple fixups to the ARM Darwin asm backend. This allows
...
constant pool references and global variable refernces to resolve properly
for object file generation. For example,
int x;
void foo(unsigned a, unsigned *p) {
p[a] = x;
}
can now be successfully compiled directly to an (ARM mode) object file.
llvm-svn: 118469
2010-11-09 01:37:15 +00:00
f11ea9ce61
Fix an inline asm pasto from 117667; was preventing
...
{i64, i64} from matching i128.
llvm-svn: 118465
2010-11-09 01:15:07 +00:00
1fc8ec1d4b
Fix PR8441, a thread unsafe static variable in our dynamic library loading facilities.
...
llvm-svn: 118463
2010-11-09 00:36:06 +00:00
1b83ed5f7c
Revert r118457 and r118458. These won't hold for GPRs.
...
llvm-svn: 118462
2010-11-09 00:30:18 +00:00
9b14a25126
Fix PR8441, a race condition in the static attributes list. While the reference counting was itself threadsafe,
...
the implicit removal of each object from the global list was not. Make this operation atomic.
llvm-svn: 118461
2010-11-09 00:27:03 +00:00
31b850be15
Get the register and count from the register list operands.
...
llvm-svn: 118458
2010-11-08 23:51:20 +00:00
aeead4d1e1
reglist has two operands.
...
llvm-svn: 118457
2010-11-08 23:50:20 +00:00
8d2aa03ce1
The "addRegListOperands()" function returns the start register and the total
...
number of registers in the list.
llvm-svn: 118456
2010-11-08 23:49:57 +00:00
c7baee31ad
Add support for ARM's specialized vector-compare-against-zero instructions.
...
llvm-svn: 118453
2010-11-08 23:21:22 +00:00
9c656fe815
Initial support for Mips32 and Mips32r2. Patch contributed by Akira Hatanaka (ahatanaka@mips.com)
...
llvm-svn: 118447
2010-11-08 21:42:32 +00:00
a91d02bc61
Add "write back" bit encoding.
...
llvm-svn: 118446
2010-11-08 21:28:03 +00:00
69ba1e9ccb
Fix PR8211
...
llvm-svn: 118445
2010-11-08 21:24:59 +00:00
023270e453
Remove contributor names as per coding statndard.
...
llvm-svn: 118442
2010-11-08 20:56:32 +00:00
142ff82a18
Re-introduce the MaxLookup limit to BasicAliasAnalysis'
...
pointsToConstantMemory code to guard against possible
compile time slowdowns.
llvm-svn: 118440
2010-11-08 20:26:19 +00:00
fc82674b9c
Adding working version of assembly parser for the MBlaze backend
...
Major cleanup of whitespace and formatting issues in MBlaze backend
llvm-svn: 118434
2010-11-08 19:40:01 +00:00
470ade12e0
Fix a thinko that Duncan spotted.
...
llvm-svn: 118430
2010-11-08 19:24:47 +00:00
0ef474730f
Revert 118422 in search of bot verdancy.
...
llvm-svn: 118429
2010-11-08 19:17:22 +00:00
3528465232
Adds support for spilling previously allocated live intervals to
...
handle cases in which a register is unavailable for spill code.
Adds LiveIntervalUnion::extract. While processing interferences on a
live virtual register, reuses the same Query object for each
physcial reg.
llvm-svn: 118423
2010-11-08 18:02:08 +00:00
f3e224f830
Support -mcpu=cortex-a8 in ARM attributes - Has Fixme. 1 Test modified.
...
llvm-svn: 118422
2010-11-08 17:58:07 +00:00
8a3c3f2ad3
Fix typo.
...
llvm-svn: 118421
2010-11-08 17:53:02 +00:00
2cd1fd4a82
Make FunctionAttrs TBAA-aware.
...
llvm-svn: 118417
2010-11-08 17:12:04 +00:00
601c94b309
Implement getModRefBehavior for TypeBasedAliasAnalysis.
...
llvm-svn: 118416
2010-11-08 17:10:22 +00:00
fc6b6bd5a6
Complete listing of ARM/MC/ELF relocation enums
...
llvm-svn: 118413
2010-11-08 16:47:27 +00:00
9130bad71f
Extend the AliasAnalysis::pointsToConstantMemory interface to allow it
...
to optionally look for constant or local (alloca) memory.
Teach BasicAliasAnalysis::pointsToConstantMemory to look through Select
and Phi nodes, and to support looking for local memory.
Remove FunctionAttrs' PointsToLocalOrConstantMemory function, now that
AliasAnalysis knows all the tricks that it knew.
llvm-svn: 118412
2010-11-08 16:45:26 +00:00
0b56778d65
Delete getIntrinsicModRefBehavior. Clients can just use the normal
...
getModRefBehavior now, since it now understands intrinsics as well
as normal functions.
llvm-svn: 118411
2010-11-08 16:11:19 +00:00
86449d705a
Make FunctionAttrs use AliasAnalysis::getModRefBehavior, now that it
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knows about intrinsic functions.
llvm-svn: 118410
2010-11-08 16:10:15 +00:00
e461d7d135
Teach BasicAliasAnalysis::getModRefBehavior(const Function *F)
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to analyze intrinsic functions.
llvm-svn: 118409
2010-11-08 16:08:43 +00:00
fab7697e42
Add generating function declaration for PTX
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llvm-svn: 118398
2010-11-08 03:06:08 +00:00
09bf309527
Add physical register counting functions
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llvm-svn: 118397
2010-11-08 03:00:52 +00:00
c03ec0cc42
Add a dummy PTXMCAsmStreamer class
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llvm-svn: 118396
2010-11-08 02:58:44 +00:00
9d17a3194e
Set default flags for .rodata.
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llvm-svn: 118395
2010-11-08 02:47:59 +00:00
345b98eddd
Add registry hook for assembly text output
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llvm-svn: 118394
2010-11-08 02:21:17 +00:00
424601a9b3
Make RegList an ASM operand so that TableGen will generate code for it. This is
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an initial implementation and may change once reglists are fully fleshed out.
llvm-svn: 118390
2010-11-08 00:39:58 +00:00
2f9d17c44f
Revert.
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llvm-svn: 118389
2010-11-08 00:32:40 +00:00
a620bd1fa3
Add simplification of floating point comparisons with the result
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of a select instruction, the same as already exists for integer
comparisons.
llvm-svn: 118379
2010-11-07 16:46:25 +00:00
f532d31198
Fix a README item: when doing a comparison with the result
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of a select instruction, see if doing the compare with the
true and false values of the select gives the same result.
If so, that can be used as the value of the comparison.
llvm-svn: 118378
2010-11-07 16:12:23 +00:00
20b11eaa01
Speed up AddSectionToTheEnd. It was walking all fragments in all sections.
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This is really slow with we have 1000s of sections each with a corresponding
relocation section. Also, it is only used by the ELF writer to add
basic data, so there is no need to force a new layout pass.
Should fix PR8563.
llvm-svn: 118377
2010-11-07 15:03:27 +00:00
68bac75190
In this context, a reglist is a reg.
...
llvm-svn: 118375
2010-11-07 13:08:28 +00:00
3e100cf582
Fix memory leak in StringRef::edit_distance(). 'Allocated' could be leaked on an early return.
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llvm-svn: 118370
2010-11-07 06:09:02 +00:00
559b8fbffc
Add method for checking if a path is a symbolic link.
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llvm-svn: 118367
2010-11-07 04:36:50 +00:00
5665a93bc5
Relax dwarf line fragments. This fixes a crash in the included testcase.
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llvm-svn: 118365
2010-11-07 02:07:12 +00:00
0530c024b6
implement aliases for div/idiv that have an explicit A register operand,
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implementing rdar://8431864
llvm-svn: 118364
2010-11-06 22:41:18 +00:00
e18980aeaa
Add support for parsing register lists. We can't use a bitfield to keep track of
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the registers, because the register numbers may be much greater than the number
of bits available in the machine's register.
I extracted the register list verification code out of the actual parsing of the
registers. This made checking for errors much easier. It also limits the number
of warnings that would be emitted for cascading infractions.
llvm-svn: 118363
2010-11-06 22:36:58 +00:00
9654e108d7
add aliases for movs between seg registers and mem. There are multiple
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different forms of this instruction (movw/movl/movq) which we reported
as being ambiguous. Since they all do the same thing, gas just picks the
one with the shortest encoding. Follow its lead here.
This implements rdar://8208615
llvm-svn: 118362
2010-11-06 22:35:34 +00:00
7923358842
move the "sh[lr]d op,op" -> "shld $1, op,op" aliases to the .td file.
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llvm-svn: 118361
2010-11-06 22:25:39 +00:00
Eric Christopher