Commit Graph

318030 Commits

Author SHA1 Message Date
Artem Dergachev c3236cd200 Revert "[analyzer] exploded-graph-rewriter: An attempt to fix Windows buildbots."
This reverts commit r362343.

Instead, disable tests on Windows for now.

llvm-svn: 362347
2019-06-03 00:21:00 +00:00
Nico Weber 3cbb8b8391 llvm-undname: Add coverage for some error paths
llvm-svn: 362346
2019-06-02 23:48:28 +00:00
Mike Spertus 2d59bab568 Update MSVC Visualizer to reflect new variadic PointerUnion
This changed updates the MSVC Visualizer to work with the recent change
of PointerUnion into a variadic template. As an extra bonus, we
fix some bit rot in the SmallPtrSet visualizer as well

llvm-svn: 362345
2019-06-02 23:33:32 +00:00
Nico Weber 54362477c7 llvm-undname; Add more test coverage for demangleFunctionClass()
Also add two FC_Far that seem to be missing, by symmetry from
the public and protected cases. (But FC_Far isn't really a thing
anymore, so this doesn't really have an observable effect.)

llvm-svn: 362344
2019-06-02 23:26:57 +00:00
Artem Dergachev 0ac4ab48fc [analyzer] exploded-graph-rewriter: An attempt to fix Windows buildbots.
Breakage caused by r362340.

llvm-svn: 362343
2019-06-02 23:17:56 +00:00
Craig Topper 50b35caf30 [DAGCombiner][X86] Fold away masked store and scatter with all zeroes mask.
Similar to what was done for masked load and gather.

llvm-svn: 362342
2019-06-02 22:52:38 +00:00
Craig Topper 5f79d74946 [X86] Add test cases for masked store and masked scatter with an all zeroes mask. Fix bug in ScalarizeMaskedMemIntrin
Need to cast only to Constant instead of ConstantVector to allow
ConstantAggregateZero.

llvm-svn: 362341
2019-06-02 22:52:34 +00:00
Artem Dergachev 162360774e [analyzer] exploded-graph-rewriter: Initial commit.
This is a utility to improve readability and generally manipulate
GraphViz dumps of the analysis graph. Such dumps are often huge and
not only hard to read, but also often hang the viewer apps with their
mere size. Such script should significantly improve debugging experience.

Differential Revision: https://reviews.llvm.org/D62638

llvm-svn: 362340
2019-06-02 21:40:53 +00:00
Alex Langford fde26d222d [Commands] Remove unused header
llvm-svn: 362339
2019-06-02 21:11:21 +00:00
Simon Pilgrim 8a32ca381d [CostModel][X86] Improve masked load/store AVX1/AVX2 costs
A mixture of internal tests and review of the scheduler models indicates we're overestimating the cost of a masked load, which we're estimating at 4x regular memory ops - more realistic values indicates that its closer to 2x. Masked stores costs are a lot more diverse but 8x is roughly in the middle of the range.

e.g. SandyBridge
defm : X86WriteRes<WriteFMaskedLoad, [SBPort23,SBPort05], 8, [1,2], 3>;
defm : X86WriteRes<WriteFMaskedLoadY, [SBPort23,SBPort05], 9, [1,2], 3>;
defm : X86WriteRes<WriteFMaskedStore, [SBPort4,SBPort01,SBPort23], 5, [1,1,1], 3>;
defm : X86WriteRes<WriteFMaskedStoreY, [SBPort4,SBPort01,SBPort23], 5, [1,1,1], 3>;

e.g. Btver2
defm : X86WriteRes<WriteFMaskedLoad, [JLAGU, JFPU01, JFPX], 6, [1, 2, 2], 1>;
defm : X86WriteRes<WriteFMaskedLoadY, [JLAGU, JFPU01, JFPX], 6, [2, 4, 4], 2>;
defm : X86WriteRes<WriteFMaskedStore, [JSAGU, JFPU01, JFPX], 6, [1, 1, 4], 1>;
defm : X86WriteRes<WriteFMaskedStoreY, [JSAGU, JFPU01, JFPX], 6, [2, 2, 4], 2>;

Differential Revision: https://reviews.llvm.org/D61257

llvm-svn: 362338
2019-06-02 20:37:02 +00:00
Craig Topper a7bc31ebc6 [DAGCombiner] Replace masked loads with a zero mask with the passthru value
Similar to what was recently done for gathers in r362015.

llvm-svn: 362337
2019-06-02 18:58:46 +00:00
Richard Smith 87346a15db Transform lambda expression captures when transforming an expression to
potentially-evaluated.

This ensures that every potentially-evaluated expression is built in a
potentially-evaluated context. No functionality change intended.

llvm-svn: 362336
2019-06-02 18:53:44 +00:00
Simon Pilgrim 59a8db628b [TTI][X86] Cleanup getMaskedMemoryOpCost. NFCI.
Prep work before resurrecting D61257.

llvm-svn: 362335
2019-06-02 18:06:42 +00:00
Don Hinton 232a8785c0 Fix bug in r362328 -- append to dependency list instead of overwrite it.
llvm-svn: 362334
2019-06-02 17:56:26 +00:00
Nico Weber b5cd6163f4 Remove code path that's dead after r358835
llvm-svn: 362333
2019-06-02 17:41:07 +00:00
Nico Weber 869308dd55 Add demangling test coverage for unsigned short, unsigned long
llvm-svn: 362332
2019-06-02 17:29:26 +00:00
Nico Weber dfe02bc4e9 Add mangling test coverage for non-volatile const member pointers
llvm-svn: 362331
2019-06-02 17:23:53 +00:00
Roman Lebedev 420f5df1c3 [NFC][X86] extract-{low,}bits.ll: one more pattern a with truncation
llvm-svn: 362330
2019-06-02 17:11:21 +00:00
Nico Weber d0d32c35d9 Add test coverage for __pascal mangling
llvm-svn: 362329
2019-06-02 16:47:07 +00:00
Don Hinton ccbda6b000 [test] Fix plugin tests
Recommit of r361790 that was temporarily reverted in r361793 due to bot breakage.

Summary:
The following changes were required to fix these tests:

1) Change LLVM_ENABLE_PLUGINS to an option and move it to
   llvm/CMakeLists.txt with an appropriate default -- which matches
   the original default behavior.

2) Move the plugins directory from clang/test/Analysis
   clang/lib/Analysis.  It's not enough to add an exclude to the
   lit.local.cfg file because add_lit_testsuites recurses the tree and
   automatically adds the appropriate `check-` targets, which don't
   make sense for the plugins because they aren't tests and don't
   have `RUN` statements.

   Here's a list of the `clang-check-anlysis*` targets with this
   change:

```
  $ ninja -t targets all| sed -n "s/.*\/\(check[^:]*\):.*/\1/p" | sort -u | grep clang-analysis
  check-clang-analysis
  check-clang-analysis-checkers
  check-clang-analysis-copypaste
  check-clang-analysis-diagnostics
  check-clang-analysis-engine
  check-clang-analysis-exploration_order
  check-clang-analysis-html_diagnostics
  check-clang-analysis-html_diagnostics-relevant_lines
  check-clang-analysis-inlining
  check-clang-analysis-objc
  check-clang-analysis-unified-sources
  check-clang-analysis-z3
```

3) Simplify the logic and only include the subdirectories under
   clang/lib/Analysis/plugins if LLVM_ENABLE_PLUGINS is set.

Reviewed By: NoQ

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D62445

llvm-svn: 362328
2019-06-02 15:53:43 +00:00
Simon Pilgrim 71a39bcf68 [X86] isHorizontalBinOp - add extract_subvector(shuffle(x)) handling (PR39921)
Let's us match horizontal op patterns on fast-variable-shuffle targets (Haswell etc.)

llvm-svn: 362327
2019-06-02 15:47:49 +00:00
Simon Pilgrim b0dc262ffb [X86] Add AVX2 'fast-variable-shuffle' PHADD tests (PR39921)
Haswell etc. will combine shuffles to a extract_subvector(permd(x)) before isHorizontalBinOp can match it.

llvm-svn: 362326
2019-06-02 15:33:28 +00:00
Roman Lebedev 2065ddfd79 [NFC][X86] extract-lowbits.ll: add one more pattern a with truncation
We are also free to interpret this as 'BZHI'/'BEXTR'.
https://rise4fun.com/Alive/dD6

llvm-svn: 362325
2019-06-02 15:07:49 +00:00
Simon Pilgrim 7a869e7036 [DAGCombine] Fold insert_subvector(bitcast(x),bitcast(y),c1) -> bitcast(insert_subvector(x,y),c2)
Move this combine from x86 into generic DAGCombine, which currently only manages cases where the bitcast is between types of the same scalarsize.

Differential Revision: https://reviews.llvm.org/D59188

llvm-svn: 362324
2019-06-02 14:42:11 +00:00
Simon Pilgrim ffb4d2bff7 [DAG] isBitwiseNot / isConstOrConstSplat - add support for build vector undefs + truncation (PR41020)
Add (opt-in) support for implicit truncation to isConstOrConstSplat, which allows us to match truncated 'all ones' cases in isBitwiseNot.

PR41020 compares against using ISD::isBuildVectorAllOnes() instead, but that predicate silently accepts any UNDEF elements in the build vector which might not be what we want in isBitwiseNot - so I've added an opt-in 'AllowUndefs' flag that is set to false by default but will allow us to enable it on individual cases where its safe.

Differential Revision: https://reviews.llvm.org/D62783

llvm-svn: 362323
2019-06-02 11:56:39 +00:00
Simon Pilgrim 88522ce388 [TargetLowering] SimplifyDemandedBits - don't use OriginalDemanded variables in analysis.
These might have been replaced in multiple use cases.

llvm-svn: 362322
2019-06-02 10:12:55 +00:00
Simon Pilgrim 30a6caa3e7 [TargetLowering] SimplifyDemandedVectorElts - use same arg names as SimplifyDemandedBits. NFCI.
Helps with debugging as we recurse between them.

llvm-svn: 362321
2019-06-02 10:03:56 +00:00
Nikita Popov eb37509832 [IndVarSimplify] Add tests for saturating math on IV; NFC
These saturating math ops can be replaced with simple math.

llvm-svn: 362320
2019-06-02 08:49:35 +00:00
Roman Lebedev 0bfa9359b0 [NFC][X86] extract-lowbits.ll: add patterns with truncation too
If we look past truncations of X too eagerly (D62786), we may
end up with 64-bit 'BEXTR', even though 32-bit-one would suffice.

llvm-svn: 362319
2019-06-02 08:05:24 +00:00
Alex Langford 591ede411d [Target] Adjust header in Thread
llvm-svn: 362318
2019-06-02 06:03:05 +00:00
Richard Smith e518235aca Factor out commonality between variable capture initialization and
'this' capture initialization.

llvm-svn: 362317
2019-06-02 04:00:43 +00:00
Richard Smith 2e2c02c0cd Add script to update OpenMP -ast-dump test expectations, and use it to
regenerate the test expectations.

(Only two tests change, as a result of no longer matching the 0x in a
pointer; the other tests were already excluding that.)

llvm-svn: 362316
2019-06-02 04:00:38 +00:00
Craig Topper f58ef87bb7 [DAGCombiner] Replace two unchecked dyn_casts with casts.
The results of the dyn_casts were immediately dereferenced on the next line
so they had better not be null.

I don't think there's any way for these dyn_casts to fail, so use a cast
of adding null check.

llvm-svn: 362315
2019-06-02 03:31:01 +00:00
Fangrui Song 0a6bababa8 [ELF][MIPS] Delete dead !Sym->isDefined() check in addAbsolute()
llvm-svn: 362314
2019-06-02 02:43:38 +00:00
Petr Hosek 84254dd8ab [CMake] Use libtool for runtimes when building for Apple platform
LLVM CMake build already uses libtool instead of ar when building
for Apple platform and we should be using the same when building
runtimes. To do so, this change extracts the logic for finding
libtool into a separate file and then uses it from both the LLVM
build as well as the LLVM runtimes build.

Differential Revision: https://reviews.llvm.org/D62769

llvm-svn: 362313
2019-06-02 02:05:01 +00:00
Craig Topper 78c794a70b [X86] Fix several places that weren't passing what they though they were to MachineInstr::print
Over a year ago, MachineInstr gained a fourth boolean parameter that occurs
before the TII pointer. When this happened, several places started accidentally
passing TII into this boolean parameter instead of the TII parameter.

llvm-svn: 362312
2019-06-02 01:36:48 +00:00
Petr Hosek 737de4d363 [libcxx] Use libtool when merging archives on Apple platforms
ar doesn't produce the correct results when used for linking static
archives on Apple platforms, so instead use libtool -static which is
the official way to build static archives on those platforms.

Differential Revision: https://reviews.llvm.org/D62770

llvm-svn: 362311
2019-06-02 01:14:31 +00:00
Craig Topper fe699c32a2 [X86] Simplify the CHECK lines in vector-reduce-and/or/xor-widen.ll in similar way to r362308.
Forgot to do the widen forms when I was doing the others.

llvm-svn: 362310
2019-06-02 00:43:02 +00:00
Craig Topper 396a915c26 [X86] Add the SSE versions of PMULLW and PMULLD to isAssociativeAndCommutative.
llvm-svn: 362309
2019-06-02 00:42:58 +00:00
Craig Topper 4721fad972 [X86] Simplify the CHECK lines in vector-reduce-and/or/xor.
The AVX512BW and AVX512VL checks were never used. And AVX512 is the same
as AVX on all tests that weren't already split for AVX1 and AVX2.

llvm-svn: 362308
2019-06-02 00:07:52 +00:00
Craig Topper eeaecc63e9 [X86] Add avx512 command lines and test cases to machine-combiner.ll
llvm-svn: 362307
2019-06-02 00:07:48 +00:00
Alexandre Ganea 5a2a054028 Silence 'warning: extra ‘;’ [-Wpedantic]' with GCC 7.3
llvm-svn: 362306
2019-06-01 21:47:44 +00:00
Nikita Popov 900578d1c1 [SimplifyIndVar] Refactor overflow check elimination code; NFC
Extract a willNotOverflow() helper function that is shared between
eliminateOverflowIntrinsic() and strengthenOverflowingOperation().
Use WithOverflowInst for the former.

We'll be able to reuse the same code for saturating intrinsics as
well.

llvm-svn: 362305
2019-06-01 20:21:53 +00:00
Craig Topper 7cebf0af40 [InlineCost] Don't add the soft float function call cost for the fneg idiom, fsub -0.0, %x
Summary: Fneg can be implemented with an xor rather than a function call so we don't need to add the function call overhead. This was pointed out in D62699

Reviewers: efriedma, cameron.mcinally

Reviewed By: efriedma

Subscribers: javed.absar, eraman, hiraditya, haicheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62747

llvm-svn: 362304
2019-06-01 19:40:07 +00:00
Simon Pilgrim cd1878d0f9 [AMDGPU] Regenerate SDIV tests for an upcoming patch
llvm-svn: 362303
2019-06-01 18:27:06 +00:00
Andrea Di Biagio 6a989c358c [MCA][Scheduler] Change how memory instructions are dispatched to the pending set. NFCI
llvm-svn: 362302
2019-06-01 15:22:37 +00:00
Simon Pilgrim a881ffeae4 [APInt] Add PR40897 test case
In reality APInt::getBitsNeeded(INT_MIN, base) cases require one less bit than is returned

llvm-svn: 362301
2019-06-01 14:58:36 +00:00
Simon Pilgrim 0d4a040510 [X86][AVX] Add tests for CONCAT(MOVDDUP(x),MOVDDUP(y))
llvm-svn: 362300
2019-06-01 14:05:46 +00:00
Simon Atanasyan 25694e0084 [mips] Extend range of register indexes accepted by cfcmsa/ctcmsa
The `cfcmsa` and `ctcmsa` instructions accept index of MSA control
register. The MIPS64 SIMD Architecture define eight MSA control
registers. But register index for `cfcmsa` and `ctcmsa` instructions
might be any number in 0..31 range. If the index is greater then 7,
`cfcmsa` writes zero to the destination registers and `ctcmsa` does
nothing [1].

[1] MIPS Architecture for Programmers Volume IV-j:
    The MIPS64 SIMD Architecture Module
https://www.mips.com/?do-download=the-mips64-simd-architecture-module

Differential Revision: https://reviews.llvm.org/D62597

llvm-svn: 362299
2019-06-01 13:55:18 +00:00
Dylan McKay 45eb4c7e55 [AVR] Disable register coalescing to the PTRDISPREGS class
If we would allow register coalescing on PTRDISPREGS class then register
allocator can lock Z register to some virtual register. Larger instructions
requiring a memory acces then fail during the register allocation phase since
there is no available register to hold a pointer if Y register was already
taken for a stack frame. This patch prevents it by keeping Z register
spillable. It does it by not allowing coalescer to lock it.

Original discussion on https://github.com/avr-rust/rust/issues/128.

llvm-svn: 362298
2019-06-01 12:38:56 +00:00