Commit Graph

60871 Commits

Author SHA1 Message Date
Benjamin Kramer 6877119ef3 Kill unneeded SExt.
llvm-svn: 104692
2010-05-26 09:45:04 +00:00
Zhongxing Xu 730a977e02 SRetReturnReg was set in LowerFormalArguments(). So only assert it here.
llvm-svn: 104691
2010-05-26 08:10:02 +00:00
Daniel Dunbar 870e5759e7 MC: Eliminate MCFragment vtable, which was unnecessary.
llvm-svn: 104689
2010-05-26 06:50:57 +00:00
Shih-wei Liao c4376b9b1b Coding style change (Adding 1 missing space.)
llvm-svn: 104670
2010-05-26 04:46:50 +00:00
Shih-wei Liao 0568ca0ddc Adding the missing implementation for ARM::SBFX and ARM::UBFX.
Fixing http://llvm.org/bugs/show_bug.cgi?id=7225.

llvm-svn: 104667
2010-05-26 03:21:39 +00:00
Eric Christopher e805ea9e39 Temporarily revert r104655 as it's breaking the bots.
llvm-svn: 104664
2010-05-26 01:59:55 +00:00
Jim Grosbach a6897ecbb5 fix off by 1 (insn) error in eh.sjlj.setjmp thumb code sequence.
llvm-svn: 104661
2010-05-26 01:22:21 +00:00
Jakob Stoklund Olesen 50eec620f4 Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."
This reverts commit 104654.

llvm-svn: 104660
2010-05-26 01:21:14 +00:00
Dan Gohman 7c00576a62 Change push_all to a non-virtual function and implement it in the
base class, since all the implementations are the same.

llvm-svn: 104659
2010-05-26 01:10:55 +00:00
Dan Gohman 5112aea14d Delete an unused function.
llvm-svn: 104658
2010-05-26 00:56:27 +00:00
Dan Gohman 3701b3928e Trim #include.
llvm-svn: 104657
2010-05-26 00:55:59 +00:00
Bill Wendling c5222d6c38 Dale and Evan suggested putting the "check for setjmp" much earlier in the
machine code generation. That's a good idea, so I made it so.

llvm-svn: 104655
2010-05-26 00:32:40 +00:00
Jakob Stoklund Olesen 0b0274524c Replace the SubRegSet tablegen class with a less error-prone mechanism.
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

llvm-svn: 104654
2010-05-26 00:28:19 +00:00
Shih-wei Liao b6e0bc9457 Adding the missing implementation of Bitfield's "clear" and "insert".
Fixing http://llvm.org/bugs/show_bug.cgi?id=7222.

llvm-svn: 104653
2010-05-26 00:25:05 +00:00
Shih-wei Liao e22abfa823 To handle s* registers in emitVFPLoadStoreMultipleInstruction().
Fixing http://llvm.org/bugs/show_bug.cgi?id=7221.

llvm-svn: 104652
2010-05-26 00:02:28 +00:00
Eric Christopher e7b64dcc1e Start adding mach-o tls reloc support.
llvm-svn: 104651
2010-05-26 00:02:12 +00:00
Jakob Stoklund Olesen 66c939a2ca Drop the SuperregHashTable. It is essentially the same as SubregHashTable.
llvm-svn: 104650
2010-05-25 23:43:18 +00:00
Devang Patel 9fc11706e3 First cut at supporting .debug_loc section.
This is used to track variable information.

llvm-svn: 104649
2010-05-25 23:40:22 +00:00
Benjamin Kramer 9439084cea Properly promote operands when optimizing a single-character memcmp.
llvm-svn: 104648
2010-05-25 22:53:43 +00:00
Bill Wendling 388f638511 Constify function.
llvm-svn: 104646
2010-05-25 22:02:22 +00:00
Dan Gohman ce3269b815 Do one map lookup instead of two.
llvm-svn: 104645
2010-05-25 21:59:42 +00:00
Dan Gohman a4abd035ea Fix a missing newline in debug output.
llvm-svn: 104644
2010-05-25 21:50:35 +00:00
Eric Christopher f3925438e5 Move the verbose asm output up a bit so it can be used in the special cases
as well.

llvm-svn: 104642
2010-05-25 21:49:43 +00:00
Bill Wendling b04ef0cfbc Okay, bear with me here...
If you have a setjmp/longjmp situation, it's possible for stack slot coloring to
reuse a stack slot before it's really dead. For instance, if we have something
like this:

1:  y = g;
    x = sigsetjmp(env, 0);
    switch (x) {
    case 1:
      /* ... */
      goto run;  
    case 0:
  run:
      do_run(); /* marked as "no return" */
      break;
    case 3:
      if (...) {
        /* ... */
        goto run;
      }
      /* ... */
      break;
    }

2:  g = y;

"y" may be put onto the stack, so the expression "g = y" is relying upon the
fact that the stack slot containing "y" isn't modified between (1) and (2). But
it can be, because of the "no return" calls in there. A longjmp might come back
with 3, modify the stack slot, and then go to case 0. And it's perfectly
acceptable to reuse the stack slot there because there's no CFG flow from case 3
to (2).

The fix is to disable certain optimizations in these situations. Ideally, we'd
disable them for all "returns twice" functions. But we don't support that
attribute. Check for "setjmp" and "sigsetjmp" instead.

llvm-svn: 104640
2010-05-25 21:44:26 +00:00
Eric Christopher 19a4b843cc Add support for initialized global data for darwin tls. Update comments
and testcases accordingly.

llvm-svn: 104635
2010-05-25 21:28:50 +00:00
Kevin Enderby 492d4f409a Changed the encoding of X86 floating point stack operations where both operands
are st(0).  These can be encoded using an opcode for storing in st(0) or using
an opcode for storing in st(i), where i can also be 0.  To allow testing with
the darwin assembler and get a matching binary the opcode for storing in st(0)
is now used.  To do this the same logical trick is use from the darwin assembler
in converting things like this:

fmul %st(0), %st

into this:

fmul %st(0)

by looking for the second operand being X86::ST0 for specific floating point
mnemonics then removing the second X86::ST0 operand.  This also has the add
benefit to allow things like:

fmul %st(1), %st

that llvm-mc did not assemble.

llvm-svn: 104634
2010-05-25 20:52:34 +00:00
Dale Johannesen cd4ba6caba Removing test; Chris thinks it's better to have the
bug go untested than have a testcase this large.  So be it.

llvm-svn: 104632
2010-05-25 20:40:10 +00:00
Jakob Stoklund Olesen 3311eb50d7 Separate unrelated cases that once shared a numeric value
llvm-svn: 104629
2010-05-25 19:49:40 +00:00
Jakob Stoklund Olesen 1ad0d5e25b Print symbolic SubRegIndex names on machine operands.
llvm-svn: 104628
2010-05-25 19:49:38 +00:00
Jakob Stoklund Olesen 673e7e0f37 Remove NumberHack entirely.
SubRegIndex instances are now numbered uniquely the same way Register instances
are - in lexicographical order by name.

llvm-svn: 104627
2010-05-25 19:49:33 +00:00
Daniel Dunbar 0e767d7364 MC/X86: Add a hack to allow recognizing 'cmpltps' and friends.
llvm-svn: 104626
2010-05-25 19:49:32 +00:00
Dale Johannesen 60fe2cdc4f Fix another variant of PR 7191. Also add a testcase
Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite.  8023512.

llvm-svn: 104624
2010-05-25 18:47:23 +00:00
Daniel Dunbar 4a5b2c597b MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}.
llvm-svn: 104622
2010-05-25 18:40:53 +00:00
Kevin Enderby c798965e63 The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required
for the 64-bit version of the Bit Test instruction.

llvm-svn: 104621
2010-05-25 18:16:58 +00:00
Dale Johannesen ff384ad981 Fix PR 7191. I have been unable to create a .ll file that fails, sorry.
(oye, a word which should be better known to people writing tree
traversals, means grandchild.)

llvm-svn: 104619
2010-05-25 17:50:03 +00:00
Eric Christopher f6562d35ac Make sure aeskeygenassist uses an unsigned immediate field.
Fixes rdar://8017638

llvm-svn: 104617
2010-05-25 17:33:22 +00:00
Jakob Stoklund Olesen 3b59e0601e Ignore NumberHack and give each SubRegIndex instance a unique enum value instead.
This passes lit tests, but I'll give it a go through the buildbots to smoke out
any remaining places that depend on the old SubRegIndex numbering.

Then I'll remove NumberHack entirely.

llvm-svn: 104615
2010-05-25 17:21:04 +00:00
Jakob Stoklund Olesen 36caaf1c59 Use enums instead of literals for SystemZ subregisters
llvm-svn: 104612
2010-05-25 17:04:18 +00:00
Jakob Stoklund Olesen 396c8802b2 Use enums instead of literals for X86 subregisters.
The cases in getMatchingSuperRegClass cannot be broken up until the enums have
unique values.

llvm-svn: 104611
2010-05-25 17:04:16 +00:00
Zonr Chang a6714e8a43 Add missing implementation to the materialization of VFP misc. instructions (vmrs, vmsr and vmov (immediate))
llvm-svn: 104588
2010-05-25 10:23:52 +00:00
Zonr Chang 2da5aa1b60 Add support to MOVimm32 using movt/movw for ARM JIT
llvm-svn: 104587
2010-05-25 08:42:45 +00:00
Bob Wilson 4f48499d2c Allow t2MOVsrl_flag and t2MOVsra_flag instructions to be predicated.
I don't know of any particular reason why that would be important, but
neither can I see any reason to disallow it.

llvm-svn: 104583
2010-05-25 04:51:47 +00:00
Bob Wilson debbbe3fd9 Fix up instruction classes for Thumb2 RSB instructions to be consistent with
Thumb2 ADD and SUB instructions: allow RSB instructions be changed to set the
condition codes, and allow RSBS instructions to be predicated.

llvm-svn: 104582
2010-05-25 04:43:08 +00:00
Bob Wilson 26fdebcae9 Clean up indentation.
llvm-svn: 104580
2010-05-25 03:36:52 +00:00
Jakob Stoklund Olesen adff18518a Disable invalid coalescer assertion.
llvm-svn: 104574
2010-05-25 00:15:18 +00:00
Jakob Stoklund Olesen 70affbd988 Use enums instead of literals in the ARM backend.
llvm-svn: 104573
2010-05-25 00:15:15 +00:00
Bill Wendling 0b7488e8d5 Print out the name of the function during SSC.
llvm-svn: 104572
2010-05-24 23:16:04 +00:00
Jakob Stoklund Olesen fdb25de17e Switch SubRegSet to using symbolic SubRegIndices
llvm-svn: 104571
2010-05-24 23:03:18 +00:00
Bob Wilson 91b2b8540c Allow Thumb2 MVN instructions to set condition codes. The immediate operand
version of t2MVN already allowed that, but not the register versions.

llvm-svn: 104570
2010-05-24 22:41:19 +00:00
Chris Lattner 76b3de92f2 diaggroup categories should take precedence over diag-specific groups.
llvm-svn: 104567
2010-05-24 21:55:47 +00:00