Commit Graph

307927 Commits

Author SHA1 Message Date
Andrey Churbanov b8e3643506 Fixed https://reviews.llvm.org/D55078 broken Fortran fixed form.
Long lines split in order to obey Fortran fixed form compilation.

Differential Revision: https://reviews.llvm.org/D57017

llvm-svn: 351745
2019-01-21 15:30:31 +00:00
Johannes Doerfert e068d054e8 [NFC] Fix comparison warning issues by MSVC
llvm-svn: 351744
2019-01-21 14:23:46 +00:00
Jonas Toth 67b7e23fa1 [clang] add tests to ExprMutAnalyzer that reproduced a crash in ASTMatchers
Summary:
This patch adds two unit-tests that are the result of reducing a crashing TU
when running ExprMutAnalyzer over it. They are added only to ensure the regression
that has been fixed with https://reviews.llvm.org/D56444 don't creep back.

Reviewers: aaron.ballman, sammccall, rsmith, george.karpenkov

Reviewed By: sammccall

Subscribers: baloghadamsoftware, a.sidorin, Szelethus, donat.nagy, dkrupp, cfe-commits

Differential Revision: https://reviews.llvm.org/D56917

llvm-svn: 351743
2019-01-21 13:26:18 +00:00
Andrea Di Biagio b68dd05c14 [X86][BtVer2] Update the WriteLoad latency.
r327630 introduced new write definitions for float/vector loads.
Before that revision, WriteLoad was used by both integer/float (scalar/vector)
load. So, WriteLoad had to conservatively declare a latency to 5cy. That is
because the load-to-use latency for float/vector load is 5cy.

Now that we have dedicated writes for float/vector loads, there is no reason why
we should keep the latency of WriteLoad to 5cy. At the moment, WriteLoad is only
used by scalar integer loads only; we can assume an optimstic 3cy latency for
them.
This patch changes that latency from 5cy to 3cy, and regenerates the affected
scheduling/mca tests.

Differential Revision: https://reviews.llvm.org/D56922

llvm-svn: 351742
2019-01-21 12:04:10 +00:00
Simon Pilgrim 44feb4a87b [CostModel][X86] Add XOP icmp cost tests (PR40376)
llvm-svn: 351741
2019-01-21 11:33:52 +00:00
Sam Parker a96f8461e7 [AArch64] Use LL for 64-bit intrinsic arguments
The ACLE states that 64-bit crc32, wsr, rsr and rbit operands are
uint64_t so we should have the clang builtin match this description
- which is what we already do for AArch32.

Differential Revision: https://reviews.llvm.org/D56852

llvm-svn: 351740
2019-01-21 11:01:05 +00:00
Raphael Isemann 4e4c0664f9 [ASTImporter] Add test for importing anonymous namespaces.
Reviewers: a.sidorin, a_sidorin

Reviewed By: a_sidorin

Subscribers: a_sidorin, martong, cfe-commits

Differential Revision: https://reviews.llvm.org/D51178

llvm-svn: 351739
2019-01-21 10:14:31 +00:00
Kadir Cetinkaya fd29980f09 [clang-tidy] Use getStripPluginsAdjuster
Summary: See rC351531 for the introduction of getStripPluginsAdjuster.

Reviewers: alexfh

Subscribers: xazax.hun, cfe-commits

Differential Revision: https://reviews.llvm.org/D56902

llvm-svn: 351738
2019-01-21 10:10:18 +00:00
Dmitry Venikov 119cf66fa5 [llvm-symbolizer] Add -no-demangle as alias for -demangle=false
Summary: Provides -no-demangle as alias for -demangle=false. Motivation: https://bugs.llvm.org/show_bug.cgi?id=40075

Reviewers: jhenderson, ruiu

Reviewed By: jhenderson

Subscribers: erik.pilkington, rupprecht, llvm-commits

Differential Revision: https://reviews.llvm.org/D56773

llvm-svn: 351735
2019-01-21 10:00:57 +00:00
Stephen Kelly be3cdd3542 Fix test after AST dump output change
llvm-svn: 351733
2019-01-21 09:54:31 +00:00
Chandler Carruth 4a1b95bda0 Fix typos throughout the license files that somehow I and my reviewers
all missed!

Thanks to Alex Bradbury for pointing this out, and the fact that I never
added the intended `legacy` anchor to the developer policy. Add that
anchor too. With hope, this will cause the links to all resolve
successfully.

llvm-svn: 351731
2019-01-21 09:52:34 +00:00
Eugene Leviant 0d7952ce78 [HWASAN] Improve tag mismatch diagnostics
Reports correct size and tags when either size is not power of two
or offset to bad granule is not zero.

Differential revision: https://reviews.llvm.org/D56603

llvm-svn: 351730
2019-01-21 09:51:10 +00:00
Craig Topper f608dc1f57 [X86] Remove and autoupgrade vpmovqd/vpmovwb intrinsics using trunc+select.
llvm-svn: 351729
2019-01-21 08:16:59 +00:00
Serge Guelton 52d777fc4f Tentative fix for r351701 and gcc 6.2 build on ubuntu
llvm-svn: 351728
2019-01-21 07:44:52 +00:00
Max Kazantsev dca1252a5b [NFC] Make getExpressionSize unsigned short
llvm-svn: 351727
2019-01-21 07:36:55 +00:00
Max Kazantsev 9d45edfa75 [NFC] Fix warnings in unit test of r351725
llvm-svn: 351726
2019-01-21 07:27:47 +00:00
Max Kazantsev 85c988388a [SCEV][NFC] Introduces expression sizes estimation
This patch introduces the field `ExpressionSize` in SCEV. This field is
calculated only once on SCEV creation, and it represents the complexity of
this SCEV from arithmetical point of view (not from the point of the number
of actual different SCEV nodes that are used in the expression). Roughly
saying, it is the number of operands and operations symbols when we print this
SCEV.

A formal definition is following: if SCEV `X` has operands
  `Op1`, `Op2`, ..., `OpN`,
then
  Size(X) = 1 + Size(Op1) + Size(Op2) + ... + Size(OpN).
Size of SCEVConstant and SCEVUnknown is one.

Expression size may be used as a universal way to limit SCEV transformations
for huge SCEVs. Currently, we have a bunch of options that represents various
limits (such as recursion depth limit) that may not make any sense from the
point of view of a LLVM users who is not familiar with SCEV internals, and all
these different options pursue one goal. A more general rule that may
potentially allow us to get rid of this redundancy in options is "do not make
transformations with SCEVs of huge size". It can apply to all SCEV traversals
and transformations that may need to visit a SCEV node more than once, hence
they are prone to combinatorial explosions.

This patch only introduces SCEV sizes calculation as NFC, its utilization will
be introduced in follow-up patches.

Differential Revision: https://reviews.llvm.org/D35989
Reviewed By: reames

llvm-svn: 351725
2019-01-21 06:19:50 +00:00
Kito Cheng 5e8798f987 [RISCV] Add R_RISCV_RELAX relocation to all possible relax candidates.
Summary:
Add R_RISCV_RELAX relocation to all possible relax candidates and
update corresponding testcase.

Reviewers: asb, apazos

Differential Revision: https://reviews.llvm.org/D46677

llvm-svn: 351723
2019-01-21 05:27:09 +00:00
Kristina Brooks e67d23905f [llgo]: fix compilation under current llvm
Patch rL322965 changed how intrinsics for memset and memzero
were defined. This causes a regression in LLGO making it no
longer buidable. In addition to that one pass was renamed,
so this also addresses the pass naming disparity.

I removed all split stack related bits from this patch as
as asked.

Differential Revision: https://reviews.llvm.org/D56638

llvm-svn: 351722
2019-01-21 04:36:43 +00:00
Dylan McKay 5c23410fdf [AVR] Insert unconditional branch when inserting MBBs between blocks with fallthrough
This updates the AVR Select8/Select16 expansion code so that, when
inserting the two basic blocks for true and false conditions, any
existing fallthrough on the previous block is preserved.

Prior to this patch, if the block before the Select pseudo fell through
to the subsequent block, two new basic blocks would be inserted at the
prior fallthrough point, changing the fallthrough destination.

The predecessor or successor lists were not updated, causing the
BranchFolding pass at -O1 and above the rearrange basic blocks, causing
an infinite loop. Not to mention the unconditional fallthrough to the
true block is incorrect in of itself.

This patch modifies the Select8/16 expansion so that, if inserting true
and false basic blocks at a fallthrough point, the implicit branch is
preserved by means of an explicit, unconditional branch to the previous
fallthrough destination.

Thanks to Carl Peto for reporting this bug.

This fixes avr-rust bug https://github.com/avr-rust/rust/issues/123.

llvm-svn: 351721
2019-01-21 04:32:02 +00:00
Dylan McKay f15cc113a5 [AVR] Enable emission of debug information
Prior to this, the code was missing AVR-specific relocation logic in
RelocVisitor.h.

This patch teaches RelocVisitor about R_AVR_16 and R_AVR_32.

Debug information is emitted in the final object file, and understood by
'avr-readelf --debug-dump' from AVR-GCC.

llvm-dwarfdump is yet to understand how to dump AVR DWARF symbols.

llvm-svn: 351720
2019-01-21 04:27:08 +00:00
Dylan McKay ce0ab06353 Revert "[AVR] Insert unconditional branch when inserting MBBs between blocks with fallthrough"
This reverts commit r351718.

Carl pointed out that the unit test could be improved.

This patch will be recommitted once the test is made more resilient.

llvm-svn: 351719
2019-01-21 02:46:13 +00:00
Dylan McKay 33acba43f0 [AVR] Insert unconditional branch when inserting MBBs between blocks with fallthrough
This updates the AVR Select8/Select16 expansion code so that, when
inserting the two basic blocks for true and false conditions, any
existing fallthrough on the previous block is preserved.

Prior to this patch, if the block before the Select pseudo fell through
to the subsequent block, two new basic blocks would be inserted at the
prior fallthrough point, changing the fallthrough destination.

The predecessor or successor lists were not updated, causing the
BranchFolding pass at -O1 and above the rearrange basic blocks, causing
an infinite loop. Not to mention the unconditional fallthrough to the
true block is incorrect in of itself.

This patch modifies the Select8/16 expansion so that, if inserting true
and false basic blocks at a fallthrough point, the implicit branch is
preserved by means of an explicit, unconditional branch to the previous
fallthrough destination.

Thanks to Carl Peto for reporting this bug.

This fixes avr-rust bug https://github.com/avr-rust/rust/issues/123.

llvm-svn: 351718
2019-01-21 02:44:09 +00:00
Vitaly Buka d733430c19 [fuzzer] Fix test checks broken after license header update
llvm-svn: 351717
2019-01-21 02:22:06 +00:00
Vitaly Buka 2b3d8b3286 [safestack] Remove unsupported platforms
llvm-svn: 351716
2019-01-21 02:21:59 +00:00
Vitaly Buka 7ef159dda5 [safestack] Fix FreeBSD runtime build
llvm-svn: 351715
2019-01-21 02:21:51 +00:00
Jonathan Metzman dd467f4f43 [libFuzzer][MSVC] Make Sanitizer Coverage MSVC-compatible
Summary:
Make Sanitizer Coverage work when compiled work when compiler-rt
is compiled with MSVC.

The previous solution did not work for MSVC because MSVC tried to
align the .SCOV$CZ section even though we used
__declspec(align(1)) on its only symbol:
__stop___sancov_cntrs.
Because the counter array is composed
of 1 byte elements, it does not always end on an 8 or 4 byte
boundary. This means that padding was sometimes added to
added to align the next section, .SCOV$CZ.
Use a different strategy now: instead of only instructing
the compiler not to align the symbol, make the section
one byte long by making its only symbol a uint8_t, so that
the linker won't try to align it.

Reviewers: morehouse, rnk

Reviewed By: rnk

Subscribers: kubamracek

Differential Revision: https://reviews.llvm.org/D56866

llvm-svn: 351714
2019-01-21 02:15:29 +00:00
Dan Liew a35df433bf [ASan] On Darwin record global allocator pointer and size in introspection struct.
This implements `mi_extra_init(...)` for the ASan allocator on
Darwin and uses the `__lsan::GetAllocatorGlobalRange(...)` function
to retrieve the allocator pointer and size.

rdar://problem/45284065

llvm-svn: 351713
2019-01-21 01:41:12 +00:00
Dan Liew 5a3857c9b2 On Darwin add allocator address and size fields to
`sanitizer_malloc_introspection_t` and initialize them to zero.

We allow sanitizer implementations to perform different initialization
by defining `COMMON_MALLOC_HAS_EXTRA_INTROSPECTION_INIT` to be `1`
and providing an implementation of `mi_extra_init(...)`.

We use these changes in future patches to implement malloc zone enumeration.

rdar://problem/45284065

llvm-svn: 351712
2019-01-21 01:41:08 +00:00
Dan Liew 4dd0bf9487 On Darwin allow for sanitizer malloc implementations to provide a zone
enumerator.

This is done by defining `COMMON_MALLOC_HAS_ZONE_ENUMERATOR` to `1` and
then by providing an implementation of the `mi_enumerator(...)` function.
If a custom implementation isn't desired the macro is set to `0` which
causes a stub version (that fails) to be used.

Currently all Darwin sanitizers that have malloc implementations define
this to be `0` so there is no functionality change.

rdar://problem/45284065

llvm-svn: 351711
2019-01-21 01:41:01 +00:00
Petr Hosek 9c178356e0 [Driver] Don't pass default value to getCompilerRTArgString
Using static library is already a default.

Differential Revision: https://reviews.llvm.org/D56043

llvm-svn: 351710
2019-01-21 01:34:09 +00:00
Petr Hosek 6d58c9e2b2 [CMake][Fuchsia] Drop -DNDEBUG, re-enable modules
-DNDEBUG is no longer needed now that we don't enable assertions,
modules should improve build times for the second stage.

Differential Revision: https://reviews.llvm.org/D56972

llvm-svn: 351709
2019-01-21 01:06:50 +00:00
Craig Topper 98b761541e [X86] Add missing test cases for some int/fp->fp conversion intrinsics with rounding mode. Use non-default rounding mode on some tests.
For some reason we were missing tests for several unmasked conversion intrinsics, but had their mask form.

Also use a non-default rounding mode on some tests to provide better coverage for a future patch.

llvm-svn: 351708
2019-01-20 23:49:50 +00:00
Stephen Kelly 168f58b726 Fix test after AST dump output change
llvm-svn: 351707
2019-01-20 23:46:30 +00:00
Serge Guelton c190404249 Tentative fix for r351701 and gcc 6.2 build on ubuntu
llvm-svn: 351706
2019-01-20 23:43:37 +00:00
Serge Guelton 836aa27063 Tentative fix for r351701 and gcc 6.2 build on ubuntu
llvm-svn: 351705
2019-01-20 23:06:45 +00:00
Vitaly Buka 9e23482d4b [safestack] Remove Darwin from supported platforms
r339720 already disabled it in the driver

llvm-svn: 351704
2019-01-20 23:03:10 +00:00
Stephen Kelly 7334d240b1 Try to port tests to AST dump changes
llvm-svn: 351703
2019-01-20 22:56:02 +00:00
Serge Guelton f81edba34d Add missing test file
llvm-svn: 351702
2019-01-20 21:24:05 +00:00
Serge Guelton be88539b85 Replace llvm::isPodLike<...> by llvm::is_trivially_copyable<...>
As noted in https://bugs.llvm.org/show_bug.cgi?id=36651, the specialization for
isPodLike<std::pair<...>> did not match the expectation of
std::is_trivially_copyable which makes the memcpy optimization invalid.

This patch renames the llvm::isPodLike trait into llvm::is_trivially_copyable.
Unfortunately std::is_trivially_copyable is not portable across compiler / STL
versions. So a portable version is provided too.

Note that the following specialization were invalid:

    std::pair<T0, T1>
    llvm::Optional<T>

Tests have been added to assert that former specialization are respected by the
standard usage of llvm::is_trivially_copyable, and that when a decent version
of std::is_trivially_copyable is available, llvm::is_trivially_copyable is
compared to std::is_trivially_copyable.

As of this patch, llvm::Optional is no longer considered trivially copyable,
even if T is. This is to be fixed in a later patch, as it has impact on a
long-running bug (see r347004)

Note that GCC warns about this UB, but this got silented by https://reviews.llvm.org/D50296.

Differential Revision: https://reviews.llvm.org/D54472

llvm-svn: 351701
2019-01-20 21:19:56 +00:00
Matt Arsenault 7ac79ed8f0 AMDGPU: Legalize more bitcasts
llvm-svn: 351700
2019-01-20 19:45:18 +00:00
Matt Arsenault a5195829f6 GlobalISel: Add isPointer legality predicates
llvm-svn: 351699
2019-01-20 19:45:14 +00:00
Matt Arsenault 46ffe68d77 AMDGPU/GlobalISel: Really legalize exts from i1
There is a combine that was hiding these tests
not actually testing what they should be, although
they were producing the expected end result.

llvm-svn: 351698
2019-01-20 19:28:20 +00:00
Simon Pilgrim e1143c1322 [X86] Auto upgrade VPCOM/VPCOMU intrinsics to generic integer comparisons
This causes a couple of changes in the upgrade tests as signed/unsigned eq/ne are equivalent and we constant fold true/false codes, these changes are the same as what we already do for avx512 cmp/ucmp.

Noticed while cleaning up vector integer comparison costs for PR40376.

llvm-svn: 351697
2019-01-20 19:27:40 +00:00
Matt Arsenault 745fd9f547 GlobalISel: Implement widenScalar for basic FP ops
llvm-svn: 351696
2019-01-20 19:10:31 +00:00
Matt Arsenault cfd9e7f594 AMDGPU/GlobalISel: Legalize f32->f16 fptrunc
llvm-svn: 351695
2019-01-20 19:10:26 +00:00
Craig Topper 9fddc3fd00 [X86] Remove the cvtuqq2ps256/cvtqq2ps256 mask builtins. Replace with uitofp/sitofp and select.
Reviewers: RKSimon, spatel

Reviewed By: RKSimon

Subscribers: kristina, cfe-commits

Differential Revision: https://reviews.llvm.org/D56965

llvm-svn: 351694
2019-01-20 19:04:56 +00:00
Matt Arsenault ff6a9a275b AMDGPU/GlobalISel: Fix some crashs in g_unmerge_values/g_merge_values
This was crashing in the predicate function assuming the value
is a vector.

Copy more of what AArch64 uses. This probably needs more refinement
later, but I don't exactly understand what it means in some cases,
particularly since any legalization for these seems to be missing.

llvm-svn: 351693
2019-01-20 18:40:36 +00:00
Matt Arsenault 2a2086b830 AMDGPU/GlobalISel: Regbank select for fpext
llvm-svn: 351692
2019-01-20 18:35:41 +00:00
Matt Arsenault 24563ef628 AMDGPU/GlobalISel: Cleanup legality for extensions
llvm-svn: 351691
2019-01-20 18:34:24 +00:00