Commit Graph

359497 Commits

Author SHA1 Message Date
Lei Zhang b80508703f [mlir][spirv] Introduce OwningSPIRVModuleRef for ownership
Similar to OwningModuleRef, OwningSPIRVModuleRef signals ownership
transfer clearly. This is useful for APIs like spirv::deserialize,
where a spirv::ModuleOp is returned by deserializing SPIR-V binary
module.

This addresses the ASAN error as reported in
https://bugs.llvm.org/show_bug.cgi?id=46272

Differential Revision: https://reviews.llvm.org/D81652
2020-07-07 08:29:27 -04:00
Ayal Zaks 7bf299c8d8 [LV] Vectorize without versioning-for-unit-stride under -Os/-Oz
If a loop is in a function marked OptSize, Loop Access Analysis should refrain
from generating runtime checks for unit strides that will version the loop.

If a loop is in a function marked OptSize and its vectorization is enabled, it
should be vectorized w/o any versioning.

Fixes PR46228.

Differential Revision: https://reviews.llvm.org/D81345
2020-07-07 15:04:21 +03:00
Raphael Isemann de0175d04b [lldb] Make TestIOHandlerResizeNoEditline pass with Python 2
io.BytesIO seems to produce a stream in Python 2 which isn't recognized
as a file object in the SWIG API, so this test fails for Python 2 (and I assume
also an old SWIG version needs to be involved).

Instead just open an empty input file which is a file object in all Python
versions to make this test pass everywhere.
2020-07-07 13:54:14 +02:00
Georgii Rymar a256193afa [llvm-readobj] - Add prepending # to mips-got.test and mips-plt.test. NFC.
It was requested in D83225 review to do it separately.
2020-07-07 14:44:30 +03:00
Haojian Wu 3b1e3d2273 [clang-tidy] Fix an unused-raii check crash on objective-c++.
Differential Revision: https://reviews.llvm.org/D83293
2020-07-07 13:36:20 +02:00
Georgii Rymar 0d656cb25d [llvm-readobj] - Refine the error reporting in LLVMStyle<ELFT>::printELFLinkerOptions.
It is possible to:
1) Avoid using the `unwrapOrError` calls and hence allow to continue dumping even when
   something is not OK with one of SHT_LLVM_LINKER_OPTIONS sections.
2) replace `reportWarning` with `reportUniqueWarning` calls. In this method it is no-op,
   because it is not possible to have a duplicated warnings anyways, but since we probably
   want to switch to `reportUniqueWarning` globally, this is a good thing to do.

This patch addresses both these points.

Differential revision: https://reviews.llvm.org/D83131
2020-07-07 14:04:17 +03:00
Georgii Rymar 8f0f7dbcea [llvm-readobj] - Split the printHashSymbols. NFCI.
This introduces `printHashTableSymbols` and
`printGNUHashTableSymbols` to split the `printHashSymbols`.

It makes the code more readable and consistent.

Differential revision: https://reviews.llvm.org/D83040
2020-07-07 14:01:34 +03:00
Kerry McLaughlin cdf2eef613 [SVE][CodeGen] Legalisation of unpredicated store instructions
Summary:
When splitting a store of a scalable type, the new address is
calculated in SplitVecOp_STORE using a vscale and an add instruction.

Reviewers: sdesmalen, efriedma, david-arm

Reviewed By: david-arm

Subscribers: tschuett, hiraditya, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83041
2020-07-07 11:47:10 +01:00
Georgii Rymar 2953ac0975 [llvm-readobj] - Refactor ELFDumper<ELFT>::getStaticSymbolName.
This is a followup for D83129.
It is possible to make `getStaticSymbolName` report warnings inside
and return the "<?>" on a error. This allows to encapsulate errors handling
and slightly simplifies the logic in callers code.

Differential revision: https://reviews.llvm.org/D83208
2020-07-07 13:33:47 +03:00
Georgii Rymar 2d9bd448c9 [llvm-readobj] - Allow dumping partially corrupted SHT_LLVM_CALL_GRAPH_PROFILE sections.
The code we have currently reports an error if something is not right with the
profile section. Instead we can report a warning and continue dumping when it is possible.
This patch does it.

Differential revision: https://reviews.llvm.org/D83129
2020-07-07 13:30:12 +03:00
Kerry McLaughlin 5e8084beba [SVE][CodeGen] Legalisation of unpredicated load instructions
Summary:
When splitting a load of a scalable type, the new address is
calculated in SplitVecRes_LOAD using a vscale and an add instruction.

This patch also adds a DAG combiner fold to visitADD for vscale:
 - Fold (add (vscale(C0)), (vscale(C1))) to (add (vscale(C0 + C1)))

Reviewers: sdesmalen, efriedma, david-arm

Reviewed By: david-arm

Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82792
2020-07-07 11:05:03 +01:00
Manuel Klimek 8c2a613976 Hand Allocator and IdentifierTable into FormatTokenLexer.
This allows us to share the allocator in the future so we can create tokens while parsing.

Differential Revision: https://reviews.llvm.org/D83218
2020-07-07 11:56:34 +02:00
Guillaume Chatelet 74c723757e [NFC] Adding the align attribute on Atomic{CmpXchg|RMW}Inst
This is the first step to add support for the align attribute to AtomicRMWInst and AtomicCmpXchgInst.
Next step is to add support in IRBuilder and BitcodeReader.
Bug: https://bugs.llvm.org/show_bug.cgi?id=27168

Differential Revision: https://reviews.llvm.org/D83136
2020-07-07 09:54:13 +00:00
Pavel Labath 2cdf108d32 [lldb/DWARF] Add a utility function for (forceful) completion of types
Summary:
Unify the code for requiring a complete type and move it into a single
place. The only functional change is that the "cannot start a definition
of an incomplete type" is upgrated from a runtime error/warning to an
lldbassert. An plain assert might also be fine, since (AFAICT) this can
only happen in case of a programmer error.

Reviewers: teemperor, aprantl, shafik

Subscribers: lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D83199
2020-07-07 11:37:55 +02:00
Georgii Rymar d5cbf7ba32 [llvm-readobj] - Fix a crash scenario in GNUStyle<ELFT>::printHashSymbols().
We might crash when the dynamic symbols table is empty (or not found)
and --hash-symbols is requested. Both .hash and .gnu.hash logic is affected.

The patch fixes this issue.

Differential revision: https://reviews.llvm.org/D83037
2020-07-07 11:59:00 +03:00
Kiran Kumar T P cd503166fb [flang][OpenMP] Enhance parser support for flush construct to OpenMP 5.0
Summary:
This patch enhances parser support for flush construct to OpenMP 5.0 by including memory-order-clause.

2.18.8 flush Construct
        !$omp flush [memory-order-clause] [(list)]
                where memory-order-clause is
                acq_rel
                release
                acquire

The patch includes code changes and testcase modifications.

Reviewed By: klausler, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D82177
2020-07-07 14:27:13 +05:30
River Riddle 9db53a1827 [mlir][NFC] Remove usernames and google bug numbers from TODO comments.
These were largely leftover from when MLIR was a google project, and don't really follow LLVM guidelines.
2020-07-07 01:40:52 -07:00
David Sherwood 9a1a7d888b [SVE] Add more warnings checks to clang and LLVM SVE tests
There are now more SVE tests in LLVM and Clang that do not
emit warnings related to invalid use of EVT::getVectorNumElements()
and VectorType::getNumElements(). For these tests I have added
additional checks that there are no warnings in order to prevent
any future regressions.

Differential Revision: https://reviews.llvm.org/D82943
2020-07-07 09:33:20 +01:00
David Sherwood 79d34a5a1b [SVE][CodeGen] Fix bug when falling back to DAG ISel
In an earlier commit 584d0d5c17 I
added functionality to allow AArch64 CodeGen support for falling
back to DAG ISel when Global ISel encounters scalable vector
types. However, it seems that we were not falling back early
enough as llvm::getLLTForType was still being invoked for scalable
vector types.

I've added a new fallback function to the call lowering class in
order to catch this problem early enough, rather than wait for
lowerFormalArguments to reject scalable vector types.

Differential Revision: https://reviews.llvm.org/D82524
2020-07-07 09:23:04 +01:00
David Sherwood c061e56e88 [CodeGen] Fix warnings in sve-vector-splat.ll and sve-trunc.ll
This patch fixes all remaining warnings in:

  llvm/test/CodeGen/AArch64/sve-trunc.ll
  llvm/test/CodeGen/AArch64/sve-vector-splat.ll

I hit some warnings related to getCopyPartsToVector. I fixed two
issues:

1. In widenVectorToPartType() we assumed that we'd always be
using BUILD_VECTOR nodes to expand from one vector type to another,
which is incorrect for scalable vector types. I've fixed this for now
by simply bailing out immediately for scalable vectors.
2. In getCopyToPartsVector() I've changed the code to compare
the element counts of different types.

Differential Revision: https://reviews.llvm.org/D83028
2020-07-07 09:21:47 +01:00
Craig Topper 44ea81acb6 [X86] Add 64bit and retpoline-external-thunk to list of featuers in X86TargetParser.def.
'64bit' shows up from -march=native on 64-bit capable CPUs.
'retpoline-eternal-thunk' isn't a real feature but shows up
when -mretpoline-external-thunk is passed to clang.
2020-07-07 00:57:04 -07:00
Craig Topper ef4cc70f3e [X86] Remove assert for missing features from X86::getImpliedFeatures
This is failing on the bots. Remove while I try to figure out
what feature I missed in the table.
2020-07-07 00:18:01 -07:00
Craig Topper 3cbfe988bc [X86] Merge X86TargetInfo::setFeatureEnabled and X86TargetInfo::setFeatureEnabledImpl. NFC
setFeatureEnabled is a virtual function. setFeatureEnabledImpl
was its implementation. This split was to avoid virtual calls
when we need to call setFeatureEnabled in initFeatureMap.

With C++11 we can use 'final' on setFeatureEnabled to enable
the compiler to perform de-virtualization for the initFeatureMap
calls.
2020-07-06 23:54:56 -07:00
Carl Ritson 560292fa99 [AMDGPU] Update isFMAFasterThanFMulAndFAdd assumptions
MAD/MAC is no longer always available.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D83207
2020-07-07 15:40:44 +09:00
Saiyedul Islam 38d6640ba5 [libomptarget] Implement atomic inc and fence functions for AMDGCN using clang builtins
This function uses __builtin_amdgcn_atomic_inc32():
  uint32_t atomicInc(uint32_t *address, uint32_t max);

These functions use __builtin_amdgcn_fence():
__kmpc_impl_threadfence()
__kmpc_impl_threadfence_block()
__kmpc_impl_threadfence_system()

They will take place of current mechanism of directly calling IR functions.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D83132
2020-07-07 06:36:25 +00:00
Saiyedul Islam 0882c9d4fc [AMDGPU] Change Clang AMDGCN atomic inc/dec builtins to take unsigned values
builtin_amdgcn_atomic_inc32(uint *Ptr, uint Val, unsigned MemoryOrdering, const char *SyncScope)
builtin_amdgcn_atomic_inc64(uint64_t *Ptr, uint64_t Val, unsigned MemoryOrdering, const char *SyncScope)
builtin_amdgcn_atomic_dec32(uint *Ptr, uint Val, unsigned MemoryOrdering, const char *SyncScope)
builtin_amdgcn_atomic_dec64(uint64_t *Ptr, uint64_t Val, unsigned MemoryOrdering, const char *SyncScope)

As AMDGCN IR instrinsic for atomic inc/dec does unsigned comparison,
these clang builtins should also take unsigned types instead of signed
int types.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D83121
2020-07-07 06:36:25 +00:00
Craig Topper 16f3d698f2 [X86] Move the feature dependency handling in X86TargetInfo::setFeatureEnabledImpl to a table based lookup in X86TargetParser.cpp
Previously we had to specify the forward and backwards feature dependencies separately which was error prone. And as dependencies have gotten more complex it was hard to be sure the transitive dependencies were handled correctly. The way it was written was also not super readable.

This patch replaces everything with a table that lists what features a feature is dependent on directly. Then we can recursively walk through the table to find the transitive dependencies. This is largely based on how we handle subtarget features in the MC layer from the tablegen descriptions.

Differential Revision: https://reviews.llvm.org/D83273
2020-07-06 23:14:02 -07:00
Max Kazantsev 094e99d264 [Test] Add one more missing optimization opportunity test 2020-07-07 13:04:15 +07:00
Craig Topper 7fb3a849c1 [X86] Remove duplicate SSE4A feature bit from X86TargetParser.def. NFC
We had both SSE4A and SSE4_A. So remove one of them.
2020-07-06 22:11:51 -07:00
Martin Waitz 72df59d590 [mlir] resolve types from attributes in assemblyFormat
An operation can specify that an operation or result type matches the
type of another operation, result, or attribute via the `AllTypesMatch`
or `TypesMatchWith` constraints.

Use these constraints to also automatically resolve types in the
automatically generated assembly parser.
This way, only the attribute needs to be listed in `assemblyFormat`,
e.g. for constant operations.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D78434
2020-07-07 04:40:01 +00:00
Sameer Arora 3b5db7fc69 [llvm-install-name-tool] Merge install-name options
This diff merges all options for llvm-install-name-tool under a single
function processLoadCommands. Also adds another test case for -add_rpath
option.

Test plan: make check-all

Reviewed by: jhenderson, alexshap, smeenai, Ktwu

Differential Revision: https://reviews.llvm.org/D82812
2020-07-06 20:32:32 -07:00
Nemanja Ivanovic 1b1539712e [PowerPC] Do not RAUW combined nodes in VECTOR_SHUFFLE legalization
When legalizing shuffles, we make an attempt to combine it into
a PPC specific canonical form that avoids a need for a swap. If the
combine is successful, we RAUW the node and the custom legalization
replaces the now dead node instead of the one it should replace.
Remove that erroneous call to RAUW.
2020-07-06 22:09:28 -05:00
LLVM GN Syncbot fc67b25426 [gn build] Port 939d8309db 2020-07-07 02:20:39 +00:00
Valentin Clement 65482e8a70 [openmp] Move isAllowedClauseForDirective to tablegen + add clause version to OMP.td
Summary:
Generate the isAllowedClauseForDirective function from tablegen. This patch introduce
the VersionedClause in the tablegen file so that clause can be encapsulated in this class to
specify a range of validity on a directive.

VersionedClause has default minVersion, maxVersion so it can be used without them or
minVersion.

Reviewers: jdoerfert, jdenny

Reviewed By: jdenny

Subscribers: yaxunl, hiraditya, guansong, jfb, sstefan1, aaron.ballman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82982
2020-07-06 22:20:06 -04:00
Xiang1 Zhang 939d8309db [X86-64] Support Intel AMX Intrinsic
INTEL ADVANCED MATRIX EXTENSIONS (AMX).
AMX is a new programming paradigm, it has a set of 2-dimensional registers
(TILES) representing sub-arrays from a larger 2-dimensional memory image and
operate on TILES.

These intrinsics use direct TMM register number as its params.

Spec can be found in Chapter 3 here https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D83111
2020-07-07 10:13:40 +08:00
Mauricio Sifontes 28a45d54a7 Create the framework and testing environment for MLIR Reduce - a tool
with the objective to reduce large test cases into smaller ones while
preserving their interesting behavior.

Implement the framework to parse the command line arguments, parse the
input MLIR test case into a module and call reduction passes on the MLIR module.

Implement the Tester class which allows the different reduction passes to test the
interesting behavior of the generated reduced variants of the test case and keep track
of the most reduced generated variant.
2020-07-07 01:59:11 +00:00
Biplob Mishra 0c6b6e28e7 [PowerPC] Implement Vector Splat Immediate Builtins in Clang
Implements builtins for the following prototypes:
  vector signed int vec_splati (const signed int);
  vector float vec_splati (const float);
  vector double vec_splatid (const float);
  vector signed int vec_splati_ins (vector signed int, const unsigned int,
                                    const signed int);
  vector unsigned int vec_splati_ins (vector unsigned int, const unsigned int,
                                      const unsigned int);
  vector float vec_splati_ins (vector float, const unsigned int, const float);

Differential Revision: https://reviews.llvm.org/D82520
2020-07-06 20:29:33 -05:00
Amy Kwan c13e3e2c2e [PowerPC][Power10] Exploit the xxsplti32dx instruction when lowering VECTOR_SHUFFLE.
This patch aims to exploit the xxsplti32dx XT, IX, IMM32 instruction when lowering VECTOR_SHUFFLEs.
We implement lowerToXXSPLTI32DX when lowering vector shuffles to check if:
- Element size is 4 bytes
- The RHS is a constant vector (and constant splat of 4-bytes)
- The shuffle mask is a suitable mask for the XXSPLTI32DX instruction where it is one of the 32 masks:
<0, 4-7, 2, 4-7>
<4-7, 1, 4-7, 3>

Differential Revision: https://reviews.llvm.org/D83245
2020-07-06 20:28:38 -05:00
Paula Toth ab25ed26c6 [libc] Add documentation for clang-tidy checks.
Reviewers: sivachandra

Reviewed By: sivachandra

Subscribers: tschuett, ecnelises, libc-commits

Tags: #libc-project

Differential Revision: https://reviews.llvm.org/D82846
2020-07-06 18:15:35 -07:00
David Blaikie 7a99aab869 [ModuloSchedule] Devirtualize PeelingModuloScheduleExpander::expand as it's not needed
The use case is out of tree code deriving from this class - but without
a need to use the base class polymorphically, so skip the virtualization
and virtual dtor.

Post-commit review from 50ac7ce94f
2020-07-06 18:05:32 -07:00
Jordan Rupprecht 10c82eecbc Revert "[LV] Enable the LoopVectorizer to create pointer inductions"
This reverts commit a8fe12065e.

It causes a crash when building gzip. Will post the detailed reduced test case to D81267.
2020-07-06 17:50:38 -07:00
LLVM GN Syncbot 7a3258912c [gn build] Port 05f2b5ccfc 2020-07-07 00:37:49 +00:00
LLVM GN Syncbot bfa8bda046 [gn build] Port 2020-07-07 00:37:49 +00:00
Nico Weber 003ea14220 fix typos to cycle bots 2020-07-06 20:37:11 -04:00
Wolfgang Pieb 129387497e Correct 3 spelling errors in headers and doc strings. 2020-07-06 17:27:51 -07:00
Amara Emerson 3c7e8d6d0e Fix sdk version test to use 99.99.99 as a max dummy version instead of 10.99.99.
Was failing on macOS 11 hosts which is > 10.99.99
2020-07-06 16:53:12 -07:00
Sanjay Patel ea71ba11ab [DAGCombiner] reassociate reciprocal sqrt expression to eliminate FP division
X / (fabs(A) * sqrt(Z)) --> X / sqrt(A*A*Z) --> X * rsqrt(A*A*Z)

In the motivating case from PR46406:
https://bugs.llvm.org/show_bug.cgi?id=46406
...this is restoring the sequence that was originally in the source code.
We extracted a term from within the sqrt because we do not know in
instcombine whether a target will expand a sqrt call.
Note: we could say that the transform in IR should be restricted, but
that would not solve the problem if the source was originally in the
pattern shown here.

This is a gray area for fast-math-flag requirements. I think we should at
least check fast-math-flags on the fdiv and fmul because I view this
transform as 2 pieces: reassociate the fmul operands and form reciprocal
from the fdiv (as with the existing transform). We could argue that the
sqrt also needs FMF, but that was not required before, so we should change
that in a follow-up patch if that seems better.

We don't currently have a way to check that the target will produce a sqrt
or recip estimate without actually creating nodes (the APIs are SDValue
getSqrtEstimate() and SDValue getRecipEstimate()), so we clean up
speculatively created nodes if we are not able to create an estimate.
The x86 test with doubles verifies that we are not changing a test with
no estimate sequence.

Differential Revision: https://reviews.llvm.org/D82716
2020-07-06 19:12:21 -04:00
Eric Christopher 4029f8ede4 Temporarily Revert "[llvm-install-name-tool] Merge install-name options" as it breaks the objcopy build.
This reverts commit c143900a08.
2020-07-06 15:40:14 -07:00
Yuanfang Chen 1e495e10e6 [NFC] change getLimitedCodeGenPipelineReason to static function 2020-07-06 15:39:27 -07:00
Roman Lebedev fc4f5d6584
[NFCI][llvm-reduce] ReduceOperandBundles: actually put Module forward-declaration back into llvm namespace 2020-07-07 01:32:26 +03:00