Commit Graph

10965 Commits

Author SHA1 Message Date
Chris Lattner 15090e1eb0 take care of some todos, transforming [us]mul_lohi into
a wider mul if the wider mul is legal.

llvm-svn: 121848
2010-12-15 06:04:19 +00:00
Chris Lattner b86dceea1b when transforming a MULHS into a wider MUL, there is no need to SRA the
result, the top bits are truncated off anyway, just use SRL.

llvm-svn: 121846
2010-12-15 05:51:39 +00:00
Jakob Stoklund Olesen 0b7ca3a6a7 Simplify RegAllocGreedy's use of register aliases.
llvm-svn: 121807
2010-12-14 23:38:19 +00:00
Jakob Stoklund Olesen 47b93401d8 Simplify CCState's use of register aliases.
llvm-svn: 121806
2010-12-14 23:28:01 +00:00
Jakob Stoklund Olesen be1c8d3a82 Simplify AggressiveAntiDepBreaker's use of register aliases.
llvm-svn: 121805
2010-12-14 23:23:15 +00:00
Jakob Stoklund Olesen 6a5bf7782a Simplyfy RegAllocBasic by using getOverlaps instead of getAliasSet.
llvm-svn: 121801
2010-12-14 23:10:48 +00:00
Evan Cheng 19dc77cec6 Fix a minor bug in two-address pass. It was missing a commute opportunity.
regB = move RCX
regA = op regB, regC
RAX  = move regA
where both regB and regC are killed. If regB is constrainted to non-compatible
physical registers but regC is not constrainted at all, then it's better to
commute the instruction.
       movl    %edi, %eax
       shlq    $32, %rcx
       leaq    (%rcx,%rax), %rax
=>
       movl    %edi, %eax
       shlq    $32, %rcx
       orq     %rcx, %rax
rdar://8762995

llvm-svn: 121793
2010-12-14 21:34:53 +00:00
Matt Beaumont-Gay 86a05d0bed Move debugging code entirely within DEBUG(). Silences an unused variable
warning in the opt build.

llvm-svn: 121791
2010-12-14 21:14:55 +00:00
Jakob Stoklund Olesen 5c3ad0d51e Add LiveIntervalUnion print methods, RegAllocGreedy::trySplit debug spew.
llvm-svn: 121783
2010-12-14 19:38:49 +00:00
Jakob Stoklund Olesen d5e38383e0 Use TRI::printReg instead of AbstractRegisterDescription when printing
LiveIntervalUnions.

llvm-svn: 121781
2010-12-14 18:53:47 +00:00
Jakob Stoklund Olesen e7ee72087e Q.seenAllInterferences() must be called after Q.collectInterferingVRegs().
llvm-svn: 121774
2010-12-14 17:47:36 +00:00
Jakob Stoklund Olesen eba9095df2 Remove unused vector.
llvm-svn: 121741
2010-12-14 00:58:47 +00:00
Jakob Stoklund Olesen 903b6d3261 Try reassigning all virtual register interferences, not just those with lower
spill weight. Filter out fixed registers instead.

Add support for reassigning an interference that was assigned to an alias.

llvm-svn: 121737
2010-12-14 00:37:49 +00:00
Jakob Stoklund Olesen 3d7b8066aa Add stub for RAGreedy::trySplit.
llvm-svn: 121736
2010-12-14 00:37:44 +00:00
Chris Lattner 10bd29f1d4 Add a couple dag combines to transform mulhi/mullo into a wider multiply
when the wider type is legal.  This allows us to compile:

define zeroext i16 @test1(i16 zeroext %x) nounwind {
entry:
	%div = udiv i16 %x, 33
	ret i16 %div
}

into:

test1:                                  # @test1
	movzwl	4(%esp), %eax
	imull	$63551, %eax, %eax      # imm = 0xF83F
	shrl	$21, %eax
	ret

instead of:

test1:                                  # @test1
        movw    $-1985, %ax             # imm = 0xFFFFFFFFFFFFF83F
        mulw    4(%esp)
        andl    $65504, %edx            # imm = 0xFFE0
        movl    %edx, %eax
        shrl    $5, %eax
        ret

Implementing rdar://8760399 and example #4 from:
http://blog.regehr.org/archives/320

We should implement the same thing for [su]mul_hilo, but I don't
have immediate plans to do this.

llvm-svn: 121696
2010-12-13 08:39:01 +00:00
Chris Lattner f8d180b808 remove the verbose-asm "constant pool double" comments that we were printing
for each constant pool entry.  Using WriteTypeSymbolic here takes time
proportional to the size of the module, for each constant pool entry.

This speeds up -verbose-asm llc on 252.eon (a random testcase at my disposal)
from 4.4s to 2.137s.  llc takes 2.11s with asm-verbose off, so this is now a
pretty reasonable cost for verbose comments.

llvm-svn: 121691
2010-12-13 07:35:47 +00:00
Chris Lattner cb404360ca reduce indentation by using continue, no functionality change.
llvm-svn: 121662
2010-12-13 01:11:17 +00:00
Duncan Sands d2e70b5442 Catch attempts to remove a deleted node from the CSE maps. Better to
catch this here rather than later after accessing uninitialized memory
etc.  Fires when compiling the testcase in PR8237.

llvm-svn: 121635
2010-12-12 13:22:50 +00:00
Jakob Stoklund Olesen 92da705261 Add named timer groups for the different stages of register allocation.
llvm-svn: 121604
2010-12-11 00:19:56 +00:00
Jakob Stoklund Olesen 8de03d222f Move MRI into RegAllocBase. Clean up debug output a bit.
llvm-svn: 121599
2010-12-10 23:49:00 +00:00
Nick Lewycky bb8610635f Remove extraneous close parenthesis.
Fix build breakage.

llvm-svn: 121596
2010-12-10 23:14:35 +00:00
Nick Lewycky 07a95f8f06 Move variable that's unused in an NDEBUG build inside the DEBUG() macro, fixing
lib/CodeGen/RegAllocGreedy.cpp:233: error: unused variable 'TRC' [-Wunused-variable]

llvm-svn: 121594
2010-12-10 23:05:10 +00:00
Jakob Stoklund Olesen adecb5e82c Force the greedy register allocator to always use the inline spiller.
Soon, RegAllocGreedy will start splitting live ranges, and then deferred
spilling won't work anyway.

llvm-svn: 121591
2010-12-10 22:54:44 +00:00
Jakob Stoklund Olesen 276445f3b8 Rip out live range splitting support from the inline spiller.
The spiller should only spill. The register allocator will drive live range
splitting, it has the needed information about register pressure and
interferences.

llvm-svn: 121590
2010-12-10 22:54:40 +00:00
Jakob Stoklund Olesen 4d7432ebf1 Use AllocationOrder in RegAllocGreedy, fix a bug in the hint calculation.
llvm-svn: 121584
2010-12-10 22:21:05 +00:00
Jakob Stoklund Olesen 1c6196228a Fix miscompilation caused by trivial logic error in the reassignVReg()
interference check.

llvm-svn: 121519
2010-12-10 20:45:04 +00:00
Jakob Stoklund Olesen 0c67e01e5f Add an AllocationOrder class that can iterate over the allocatable physical
registers for a given virtual register.

Reserved registers are filtered from the allocation order, and any valid hint is
returned as the first suggestion.

For target dependent hints, a number of arcane target hooks are invoked.

llvm-svn: 121497
2010-12-10 18:36:02 +00:00
Rafael Espindola 0a017a6db2 Fixed version of 121434 with no new memory leaks.
llvm-svn: 121471
2010-12-10 07:39:47 +00:00
Rafael Espindola a945a34c73 Revert my previous patch to make the valgrind bots happy.
llvm-svn: 121461
2010-12-10 04:01:09 +00:00
Rafael Espindola 56eb741237 Initial support for the cfi directives. This is just enough to get
f:
        .cfi_startproc
        nop
        .cfi_endproc

assembled (on ELF).

llvm-svn: 121434
2010-12-09 23:48:29 +00:00
Stuart Hastings d2ea97cbef Initial support for nested CALLSEQ_START/CALLSEQ_END constructs in LegalizeDAG.
Necessary for byval support on ARM.  Radar 7662569.

llvm-svn: 121412
2010-12-09 21:25:20 +00:00
Jakob Stoklund Olesen 3413807913 Remember to filter out reserved rergisters from the allocation order.
llvm-svn: 121411
2010-12-09 21:20:46 +00:00
Jakob Stoklund Olesen 4c2fadbc18 Add a forgotten initializer for CheckedFirstInterference.
llvm-svn: 121410
2010-12-09 21:20:44 +00:00
Andrew Trick ccef09888c Added register reassignment prototype to RAGreedy. It's a simple
heuristic to reshuffle register assignments when we can't find an
available reg.

llvm-svn: 121388
2010-12-09 18:15:21 +00:00
Eric Christopher d9e8eac235 80-col fixups.
llvm-svn: 121356
2010-12-09 04:48:06 +00:00
Jakob Stoklund Olesen e6dc3c899e IntervalMap iterators are heavyweight, so avoid copying them around and use
references instead.

Similarly, IntervalMap::begin() is almost as expensive as find(), so use find(x)
instead of begin().advanceTo(x);

This makes RegAllocBasic run another 5% faster.

llvm-svn: 121344
2010-12-09 01:06:52 +00:00
Devang Patel c26da9005b DW_FORM_data1 may not provide sufficient room for vtable index, use _udata instead.
This fixes radar 8730409.

llvm-svn: 121323
2010-12-09 00:10:40 +00:00
Jakob Stoklund Olesen 8c5f0c3115 Properly deal with empty intervals when checking for interference.
llvm-svn: 121319
2010-12-08 23:51:35 +00:00
Jakob Stoklund Olesen eaa650a945 Implement very primitive hinting support in RegAllocGreedy.
The hint is simply tried first and then forgotten if it couldn't be allocated
immediately.

llvm-svn: 121306
2010-12-08 22:57:16 +00:00
Jakob Stoklund Olesen e0df786c98 Store (priority,regnum) pairs in the priority queue instead of providing an
abstract priority queue interface in subclasses that want to override the
priority calculations.

Subclasses must provide a getPriority() implementation instead.

This approach requires less code as long as priorities are expressable as simple
floats, and it avoids the dangers of defining potentially expensive priority
comparison functions.

It also should speed up priority_queue operations since they no longer have to
chase pointers when comparing registers. This is not measurable, though.

Preferably, we shouldn't use floats to guide code generation. The use of floats
here is derived from the use of floats for spill weights. Spill weights have a
dynamic range that doesn't lend itself easily to a fixpoint implementation.

When someone invents a stable spill weight representation, it can be reused for
allocation priorities.

llvm-svn: 121294
2010-12-08 22:22:41 +00:00
Eric Christopher 1b93e7b4ed Reword comment slightly.
llvm-svn: 121293
2010-12-08 22:21:42 +00:00
Eric Christopher 66a8bf57ea Fix comment.
llvm-svn: 121285
2010-12-08 21:35:09 +00:00
Jakob Stoklund Olesen 310916a22d Trim includes.
llvm-svn: 121283
2010-12-08 21:12:00 +00:00
Andrew Trick 00067fb147 Generalize PostRAHazardRecognizer so it can be used in any pass for
both forward and backward scheduling. Rename it to
ScoreboardHazardRecognizer (Scoreboard is one word). Remove integer
division from the scoreboard's critical path.

llvm-svn: 121274
2010-12-08 20:04:29 +00:00
Jakob Stoklund Olesen b8812a1c15 Stub out RegAllocGreedy.
This new register allocator is initially identical to RegAllocBasic, but it will
receive all of the tricks that RegAllocBasic won't get.

RegAllocGreedy will eventually replace linear scan.

llvm-svn: 121234
2010-12-08 03:26:16 +00:00
Jakob Stoklund Olesen 5885e99405 Move RABasic::addMBBLiveIns to the base class, it is generally useful.
Minor optimization to the use of IntervalMap iterators. They are fairly
heavyweight, so prefer SI.valid() over SI != end().

llvm-svn: 121217
2010-12-08 01:06:06 +00:00
Jakob Stoklund Olesen db357d71f1 Switch LiveIntervalUnion from std::set to IntervalMap.
This speeds up RegAllocBasic by 20%, not counting releaseMemory which becomes
way faster.

llvm-svn: 121201
2010-12-07 23:18:47 +00:00
Jakob Stoklund Olesen fb207c1cb9 Simplify assertion.
llvm-svn: 121162
2010-12-07 18:51:27 +00:00
Jay Foad 583abbc4df PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and
zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.

llvm-svn: 121120
2010-12-07 08:25:19 +00:00
Jakob Stoklund Olesen 436dae5cf3 Remove unused member.
llvm-svn: 121098
2010-12-07 01:32:45 +00:00