b244b80172
Implemented x86 inline asm b, h, w, k modifiers.
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llvm-svn: 28020
2006-04-28 23:11:40 +00:00
655d08fda8
Fix InstCombine/2006-04-28-ShiftShiftLongLong.ll
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llvm-svn: 28019
2006-04-28 22:21:41 +00:00
00aaa76da3
new testcase miscompiled by instcombine
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llvm-svn: 28018
2006-04-28 22:17:20 +00:00
84b49d51be
Fix CodeGen/Generic/2006-04-28-Sign-extend-bool.ll
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llvm-svn: 28017
2006-04-28 21:56:10 +00:00
a2cef87a30
testcase that crashes the ppc backend, which can't sextinreg(i1)
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llvm-svn: 28016
2006-04-28 21:52:24 +00:00
88decded82
Initial caller side support (for CCC only, not FastCC) of 128-bit vector
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passing by value.
llvm-svn: 28015
2006-04-28 21:29:37 +00:00
68a44dc445
Bare-bone X86 inline asm printer support.
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llvm-svn: 28014
2006-04-28 21:19:05 +00:00
e3ca069d35
Update. It should use two shufps, not three!
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llvm-svn: 28013
2006-04-28 18:55:34 +00:00
c5e8ce8b8c
Remove the temporary option: -no-isel-fold-inflight
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llvm-svn: 28012
2006-04-28 18:54:11 +00:00
3cd4362ade
Implement four-wide shuffle with 2 shufps if no more than two elements come
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from each vector. e.g.
shuffle(G1, G2, 7, 1, 5, 2)
==>
movaps _G2, %xmm0
shufps $151, _G1, %xmm0
shufps $216, %xmm0, %xmm0
llvm-svn: 28011
2006-04-28 07:03:38 +00:00
1b7a51520c
Fix PR743: emit -help output of a tool to cout, not cerr.
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llvm-svn: 28010
2006-04-28 05:36:25 +00:00
d43c5c6046
TargetLowering::LowerArguments should return a VBIT_CONVERT of
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FORMAL_ARGUMENTS SDOperand in the return result vector.
llvm-svn: 28009
2006-04-28 05:25:15 +00:00
79c50d96c9
Mapping of physregs can make it so that the designated and input physregs are
...
the same. In this case, don't emit a noop copy.
llvm-svn: 28008
2006-04-28 04:43:18 +00:00
e63d808b6e
Fix Transforms/Reassociate/2006-04-27-ReassociateVector.ll
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llvm-svn: 28007
2006-04-28 04:14:49 +00:00
7abfb81e30
new testcase
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llvm-svn: 28006
2006-04-28 04:14:29 +00:00
f0157cb0bc
Use movaps instead of movapd for spill / restore.
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llvm-svn: 28005
2006-04-28 02:23:35 +00:00
51ab4498e7
Added a temporary option -no-isel-fold-inflight to control whether a "inflight"
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node can be folded.
llvm-svn: 28003
2006-04-28 02:09:19 +00:00
54acf6eddc
When isel'ing a node, mark its operands "InFlight" before selecting them. These
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nodes should not be folded into other nodes.
This fixes the miscompilation of PR 749.
Temporarily under flag control.
llvm-svn: 28002
2006-04-28 02:08:10 +00:00
84e95d00b5
When we have a two-address instruction where the input cannot be clobbered
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and is already available, instead of falling back to emitting a load, fall
back to emitting a reg-reg copy. This generates significantly better code
for some SSE testcases, as SSE has lots of two-address instructions and
none of them are read/modify/write. As one example, this change does:
pshufd %XMM5, XMMWORD PTR [%ESP + 84], 255
xorps %XMM2, %XMM5
cmpltps %XMM1, %XMM0
- movaps XMMWORD PTR [%ESP + 52], %XMM0
- movapd %XMM6, XMMWORD PTR [%ESP + 52]
+ movaps %XMM6, %XMM0
cmpltps %XMM6, XMMWORD PTR [%ESP + 68]
movapd XMMWORD PTR [%ESP + 52], %XMM6
movaps %XMM6, %XMM0
cmpltps %XMM6, XMMWORD PTR [%ESP + 36]
cmpltps %XMM3, %XMM0
- movaps XMMWORD PTR [%ESP + 20], %XMM0
- movapd %XMM7, XMMWORD PTR [%ESP + 20]
+ movaps %XMM7, %XMM0
cmpltps %XMM7, XMMWORD PTR [%ESP + 4]
movapd XMMWORD PTR [%ESP + 20], %XMM7
cmpltps %XMM4, %XMM0
... which is far better than a store followed by a load!
llvm-svn: 28001
2006-04-28 01:46:50 +00:00
c4d77c46b8
Test case for PR748
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llvm-svn: 28000
2006-04-28 01:21:37 +00:00
a4c2c4a276
Add a note
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llvm-svn: 27999
2006-04-28 00:04:05 +00:00
b209131b56
Add a note
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llvm-svn: 27998
2006-04-27 21:40:57 +00:00
b6cb64b7e6
Add support for inserting undef into a vector. This implements
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Transforms/InstCombine/vec_insert_to_shuffle.ll
llvm-svn: 27997
2006-04-27 21:14:21 +00:00
51fecaa8b3
This should turn into one vector shuffle instruction.
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llvm-svn: 27996
2006-04-27 21:13:58 +00:00
f4f3f0d25f
Make x86 isel lowering produce tailcall nodes. They are match to normal calls
...
for now.
Patch contributed by Alexander Friedman.
llvm-svn: 27994
2006-04-27 08:40:39 +00:00
ec04a37edd
A couple of new entries.
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llvm-svn: 27993
2006-04-27 08:31:33 +00:00
89001ad729
Support for passing 128-bit vector arguments via XMM registers.
...
llvm-svn: 27992
2006-04-27 08:31:10 +00:00
3784f3c57c
Insert a VBIT_CONVERT between a FORMAL_ARGUMENT node and its vector uses
...
(VAND, VADD, etc.). Legalizer will assert otherwise.
llvm-svn: 27991
2006-04-27 08:29:42 +00:00
bb0be98fed
For PR747:
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If we fail to find a required program, simply set that program to echo
out something that tells the user the situation. That is, instead of just
"true runtest" we now get "echo 'Skipped: runtest not found'".
llvm-svn: 27990
2006-04-27 07:49:24 +00:00
a0374e1bed
Oops
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llvm-svn: 27989
2006-04-27 05:44:50 +00:00
24eb3f4765
Bug fix: not updating NumIntRegs.
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llvm-svn: 27988
2006-04-27 05:35:28 +00:00
393d96a56c
Fix Regression/CodeGen/Generic/2006-04-26-SetCCAnd.ll and
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PR748.
llvm-svn: 27987
2006-04-27 05:01:07 +00:00
fb1ab10337
new testcase
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llvm-svn: 27986
2006-04-27 05:00:43 +00:00
48940d16b2
- Clean up formal argument lowering code. Prepare for vector pass by value work.
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- Fixed vararg support.
llvm-svn: 27985
2006-04-27 01:32:22 +00:00
f98b4aa2e7
Fix some nondeterminstic behavior in the mem2reg pass that (in addition to
...
nondeterminism being bad) could cause some trivial missed optimizations (dead
phi nodes being left around for later passes to clean up).
With this, llvm-gcc4 now bootstraps and correctly compares. I don't know
why I never tried to do it before... :)
llvm-svn: 27984
2006-04-27 01:14:43 +00:00
027fbc2a6a
Actually, semantical doesn't appear to be a word.
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llvm-svn: 27983
2006-04-26 21:03:17 +00:00
e8cbdbf314
Implement Transforms/IndVarsSimplify/complex-scev.ll, a case where we didn't
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recognize some simple affine IV's.
llvm-svn: 27982
2006-04-26 18:34:07 +00:00
684a8546f4
new testcase
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llvm-svn: 27981
2006-04-26 18:32:59 +00:00
1c39903297
Fix fastcc failures.
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llvm-svn: 27980
2006-04-26 18:21:31 +00:00
6b764e7625
Unfortunately this really isn't the place for advertisement.
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llvm-svn: 27979
2006-04-26 18:10:59 +00:00
e42f3ba44c
Fix typo.
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llvm-svn: 27978
2006-04-26 18:05:25 +00:00
4d3171fc41
Fix some anchors.
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llvm-svn: 27977
2006-04-26 15:46:53 +00:00
9aa244ed16
Add some notes about the current state of source (front end) languages
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so we can point to them on llvm-dev.
llvm-svn: 27976
2006-04-26 14:52:19 +00:00
e0bcfbe811
Switching over FORMAL_ARGUMENTS mechanism to lower call arguments.
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llvm-svn: 27975
2006-04-26 01:20:17 +00:00
9618df1190
Don't forget return void.
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llvm-svn: 27974
2006-04-25 23:03:35 +00:00
4530327c04
Keep the stack from on darwin 16-byte aligned. This fixes many JIT
...
failres.
llvm-svn: 27973
2006-04-25 20:54:26 +00:00
a9467aab0a
Separate LowerOperation() into multiple functions, one per opcode.
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llvm-svn: 27972
2006-04-25 20:13:52 +00:00
3c775bcd86
slightly more useful error message
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llvm-svn: 27971
2006-04-25 19:33:41 +00:00
f5a713d273
better c99 struct handling
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llvm-svn: 27970
2006-04-25 19:33:23 +00:00
a3f7583408
another c99 style problem
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llvm-svn: 27969
2006-04-25 19:27:56 +00:00
Evan Cheng