c6a5387d09
Add some more of StrongPHIElim.
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llvm-svn: 43805
2007-11-07 05:17:15 +00:00
fbe69d2cd6
Interchange Dwarf numbers of ESP and EBP on x86 Darwin.
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Much improvement in exception handling.
llvm-svn: 43794
2007-11-07 00:25:05 +00:00
bf75685321
Serializer no longer automatically emits a root-level block in the bitstream.
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llvm-svn: 43784
2007-11-06 22:22:25 +00:00
cd0c32865c
Augmented ReadPtr and ReadOwnedPtr to control whether or not a pointer is allowed to be backpatched
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or can be registered with the deserializer to backpatch other pointers.
llvm-svn: 43783
2007-11-06 22:21:14 +00:00
581f006f5d
make smallptrset more const and type correct, which caught a few
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minor bugs.
llvm-svn: 43782
2007-11-06 22:12:43 +00:00
ccfc028283
Remainder operations must be either integer or floating-point.
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llvm-svn: 43781
2007-11-06 22:11:54 +00:00
8201a9bca0
fix const correctness, BB is const, so its predecessors are too
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llvm-svn: 43780
2007-11-06 22:07:40 +00:00
cbad11e027
don't put erase or query for non-allocainst pointers in an set of allocainsts*'s
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llvm-svn: 43779
2007-11-06 22:07:22 +00:00
d8515f8e80
Implement PR1777 by detecting dependent phis that
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all compute the same value.
llvm-svn: 43777
2007-11-06 21:52:06 +00:00
dd71a5c37b
When the allocator rewrite a spill register with new virtual register, it replaces other operands of the same register. Watch out for situations where
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only some of the operands are sub-register uses.
llvm-svn: 43776
2007-11-06 21:12:10 +00:00
f042e862fd
At the point of calculating the shift amount, the
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type of SV has changed from what it originally was.
However we need the store width of the original.
llvm-svn: 43775
2007-11-06 20:39:11 +00:00
e344bbbe84
Renamed "Flush()" to "FlushRecord()".
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llvm-svn: 43772
2007-11-06 19:49:50 +00:00
d015c7b4fd
Added support for processing abbreviations in the Deserializer.
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Added some #ifdef-controlled messages for debugging backpatching.
llvm-svn: 43771
2007-11-06 19:49:16 +00:00
d5d59ad634
First step towards moving the coalescer to priority_queue based machinery.
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llvm-svn: 43764
2007-11-06 08:52:21 +00:00
92d23e5204
Fix a bug where a def use operand isn't being detected as a sub-register use.
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llvm-svn: 43763
2007-11-06 08:50:44 +00:00
2dbffa4e76
Add pseudo dependency to force two-address instruction to be scheduled after
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other uses. There was a overly restricted check that prevented some obvious
cases.
llvm-svn: 43762
2007-11-06 08:44:59 +00:00
0fc613b85d
Fix PR1774 and BasicAA/2007-11-05-SizeCrash.ll
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llvm-svn: 43756
2007-11-06 05:58:42 +00:00
d378cea030
Add a few comments.
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llvm-svn: 43755
2007-11-06 05:26:02 +00:00
eb964eb2c8
DomForest is a forest of registers, not instructions.
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llvm-svn: 43754
2007-11-06 05:22:43 +00:00
a9057f0b97
StrongPHIElimination requires LiveVariables.
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llvm-svn: 43751
2007-11-06 04:49:43 +00:00
87bb032c05
Better processor definition
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llvm-svn: 43749
2007-11-06 03:15:20 +00:00
362709dff1
wrap long lines
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llvm-svn: 43745
2007-11-06 01:15:27 +00:00
08143e397d
Add support for vector remainder operations.
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llvm-svn: 43744
2007-11-05 23:35:22 +00:00
4decbc5002
Fix an abort in instcombine when folding creates a vector rem instruction.
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llvm-svn: 43743
2007-11-05 23:16:33 +00:00
fa0df55bdd
Move the LowerMEMCPY and LowerMEMCPYCall to a common place.
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Thanks for the suggestions Bill :-)
llvm-svn: 43742
2007-11-05 23:12:20 +00:00
4556582e2b
Added support in serializer and deserializer to create arbitrary blocks.
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Added detection of end-of-stream in deserializer.
llvm-svn: 43736
2007-11-05 21:36:35 +00:00
4646aa3e33
Make labels work in asm blocks; allow labels as
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parameters. Rename ValueRefList to ParamList
in AsmParser, since its only use is for parameters.
llvm-svn: 43734
2007-11-05 21:20:28 +00:00
e7fb505f58
Added default creation of root-level block by bitstream serializer.
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llvm-svn: 43732
2007-11-05 20:47:27 +00:00
b98d2050a2
If a value is incoming from outside the loop then the value does not need remapping and the value is never tracked through LastValueMap.
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llvm-svn: 43728
2007-11-05 19:32:30 +00:00
1a30c18e88
[ARM] Fix code generation for:
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static __thread struct {
int a;
int b;
} teste = {0, 0};
llvm-svn: 43722
2007-11-05 18:33:37 +00:00
f7ae8bd090
Don't output ABI size padding twice. By using the store
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size for the field we get ABI padding automatically, so
no need to put it in again when we emit the field.
llvm-svn: 43720
2007-11-05 18:03:02 +00:00
8bb30184a8
Move SimpleRegisterCoalescing.h to lib/CodeGen since there is now a common
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register coalescer interface: RegisterCoalescing.
llvm-svn: 43714
2007-11-05 17:41:38 +00:00
9337929aae
Use movups to spill / restore SSE registers on targets where stacks alignment is
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less than 16. This is a temporary solution until dynamic stack alignment is
implemented.
llvm-svn: 43703
2007-11-05 07:30:01 +00:00
17b0e3e1ae
Skip over deleted val#'s.
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llvm-svn: 43700
2007-11-05 06:46:45 +00:00
a406b47f14
Handle cases where a register and one of its super-register are both marked as
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defined on the same instruction. This fixes PR1767.
llvm-svn: 43699
2007-11-05 03:11:55 +00:00
3e0d030dad
Added support for PIC code with "explicit relocations" *only*.
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Removed all macro code for PIC (goodbye "la").
Support tested with shootout bench.
llvm-svn: 43697
2007-11-05 03:02:32 +00:00
2ed067a0d9
Deleting redundant copy of block extractor pass. See also PR1775.
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llvm-svn: 43694
2007-11-05 01:54:05 +00:00
a8044084ac
Fix PR1187.
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llvm-svn: 43692
2007-11-05 00:59:10 +00:00
f07fa24289
If a long double is in a packed struct, it may be
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that there is no padding.
llvm-svn: 43691
2007-11-05 00:35:07 +00:00
283207a71c
Eliminate the remaining uses of getTypeSize. This
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should only effect x86 when using long double. Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment). This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.
llvm-svn: 43688
2007-11-05 00:04:43 +00:00
eea82746b3
Another step of stronger PHI elimination down.
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llvm-svn: 43684
2007-11-04 22:33:26 +00:00
35f398a9cd
Deleting -emitbitcode option which did nothing.
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llvm-svn: 43683
2007-11-04 20:28:31 +00:00
9329e780cd
Fix PR1761 by not printing (rip) suffix when in -static mode.
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Evan, please review this.
llvm-svn: 43680
2007-11-04 19:23:28 +00:00
d954dcd138
Fix crash before main on ppc/linux with static constructors. PR1771
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llvm-svn: 43676
2007-11-04 17:32:10 +00:00
d568767ecb
Finishing initial docs for all transformations in Passes.html.
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Also cleaned up some comments in source files.
llvm-svn: 43674
2007-11-04 16:15:04 +00:00
399d97987b
Change uses of getTypeSize to getABITypeSize, getTypeStoreSize
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or getTypeSizeInBits as appropriate in ScalarReplAggregates.
The right change to make was not always obvious, so it would
be good to have an sroa guru review this. While there I noticed
some bugs, and fixed them: (1) arrays of x86 long double have
holes due to alignment padding, but this wasn't being spotted
by HasStructPadding (renamed to HasPadding). The same goes
for arrays of oddly sized ints. Vectors also suffer from this,
in fact the problem for vectors is much worse because basic
vector assumptions seem to be broken by vectors of type with
alignment padding. I didn't try to fix any of these vector
problems. (2) The code for extracting smaller integers from
larger ones (in the "int union" case) was wrong on big-endian
machines for integers with size not a multiple of 8, like i1.
Probably this is impossible to hit via llvm-gcc, but I fixed
it anyway while there and added a testcase. I also got rid of
some trailing whitespace and changed a function name which
had an obvious typo in it.
llvm-svn: 43672
2007-11-04 14:43:57 +00:00
5c1b044899
If an interval is being undone clear its preference as well since the source interval may have been undone as well.
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llvm-svn: 43670
2007-11-04 08:32:21 +00:00
296160d443
Fix PR1763 by allowing the 'q' constraint to work with 64-bit
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regs on x86-64.
llvm-svn: 43669
2007-11-04 06:51:12 +00:00
ce8c62665a
Disable tail duplication of call instructions. The cost
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metric is way off for these in general, and this works around
buggy code like that in PR1764. we'll see if there is a big
performance impact of this. If so, I'll revert it tomorrow.
llvm-svn: 43668
2007-11-04 06:37:55 +00:00
66298e226f
There are times when the coalescer would not coalesce away a copy but the copy
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can be eliminated by the allocator is the destination and source targets the
same register. The most common case is when the source and destination registers
are in different class. For example, on x86 mov32to32_ targets GR32_ which
contains a subset of the registers in GR32.
The allocator can do 2 things:
1. Set the preferred allocation for the destination of a copy to that of its source.
2. After allocation is done, change the allocation of a copy destination (if
legal) so the copy can be eliminated.
This eliminates 443 extra moves from 403.gcc.
llvm-svn: 43662
2007-11-03 07:20:12 +00:00
Owen Anderson