Commit Graph

292113 Commits

Author SHA1 Message Date
Taiju Tsuiki b000a8860e Update NRVO logic to support early return (Attempt 2)
Summary:
This is the second attempt of r333500 (Update NRVO logic to support early return).
The previous one was reverted for a miscompilation for an incorrect NRVO set up on templates such as:
```
struct Foo {};

template <typename T>
T bar() {
  T t;
  if (false)
    return T();
  return t;
}
```

Where, `t` is marked as non-NRVO variable before its instantiation. However, while its instantiation, it's left an NRVO candidate, turned into an NRVO variable later.

Reviewers: rsmith

Reviewed By: rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D47586

llvm-svn: 335019
2018-06-19 04:39:07 +00:00
Craig Topper c2965214ef [X86] Add the ability to force an EVEX2VEX mapping table entry from the .td files. Remove remaining manual table entries from the tablegen emitter.
This adds an EVEX2VEXOverride string to the X86 instruction class in X86InstrFormats.td. If this field is set it will add manual entry in the EVEX->VEX tables that doesn't check the encoding information.

Then use this mechanism to map VMOVDU/A8/16, 128-bit VALIGN, and VPSHUFF/I instructions to VEX instructions.

Finally, remove the manual table from the emitter.

This has the bonus of fully sorting the autogenerated EVEX->VEX tables by their EVEX instruction enum value. We may be able to use this to do a binary search for the conversion and get rid of the need to create a DenseMap.

llvm-svn: 335018
2018-06-19 04:24:44 +00:00
Craig Topper 0a5e90cc2a [X86] Add a new VEX_WPrefix encoding to tag EVEX instruction that have VEX.W==1, but can be converted to their VEX equivalent that uses VEX.W==0.
EVEX makes heavy use of the VEX.W bit to indicate 64-bit element vs 32-bit elements. Many of the VEX instructions were split into 2 versions with different masking granularity.

The EVEX->VEX table generate can collapse the two versions if the VEX version uses is tagged as VEX_WIG. But if the VEX version is instead marked VEX.W==0 we can't combine them because we don't know if there is also a VEX version with VEX.W==1.

This patch adds a new VEX_W1X tag that indicates the EVEX instruction encodes with VEX.W==1, but is safe to convert to a VEX instruction with VEX.W==0.

This allows us to remove a bunch of manual EVEX->VEX table entries. We may want to look into splitting up the VEX_WPrefix field which would simplify the disassembler.

llvm-svn: 335017
2018-06-19 04:24:42 +00:00
Sanjoy Das 6e9b355cc9 Revert "[SCEV] Add nuw/nsw to mul ops in StrengthenNoWrapFlags"
This reverts r334428.  It incorrectly marks some multiplications as nuw.  Tim
Shen is working on a proper fix.

Original commit message:

[SCEV] Add nuw/nsw to mul ops in StrengthenNoWrapFlags where safe.

Summary:
Previously we would add them for adds, but not multiplies.

llvm-svn: 335016
2018-06-19 04:09:44 +00:00
Craig Topper 46c0b368d6 [X86] Simplify the TSFlags checking code in EvexToVexInstPass. NFCI
The code was previously checking the L2 and L flag on 3 separate lines, treating the combination as an encoding. Instead its better to think of the L2 bit as being something that can't be done with VEX and early returning. Then we just need to check the L bit.

llvm-svn: 335015
2018-06-19 03:17:46 +00:00
Alex Langford f66a36d2dc Fix up Info.plist when building LLDB.framework with CMake
Summary:
We weren't using the Info.plist template in resources previously.
When using that template, some of the key's values weren't being populated
because some variables were not being defined. In one case, CMake didn't
like the substring expansion syntax of CFBundleIdentifier so I got rid of that.

Differential Revision: https://reviews.llvm.org/D47792

llvm-svn: 335014
2018-06-19 02:59:30 +00:00
Francis Visoiu Mistrih 972a462a7e Fix bots after r334981
llvm-svn: 335013
2018-06-19 02:56:24 +00:00
Heejin Ahn 5e7bbdabe1 [WebAssembly] Remove an extra ';' at the end of a namespace
llvm-svn: 335008
2018-06-19 01:23:14 +00:00
Reid Kleckner b8a5ee2b00 [asan] Avoid deadlock when initializing the symbolizer CHECK fails
llvm-svn: 335007
2018-06-19 00:36:47 +00:00
Heejin Ahn 817811caae [WebAssembly] Add more utility functions
Summary:
Added more utility functions that will be used in EH-related passes Also
changed `LoopBottom` function to `getBottom` and uses templates to be
able to handle other classes as well, which will be used in CFGSort
later.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D48262

llvm-svn: 335006
2018-06-19 00:32:03 +00:00
Heejin Ahn 33c3fce592 [WebAssembly] Add WasmEHFuncInfo for unwind destination information
Summary:
Add WasmEHFuncInfo and routines to calculate and fill in this struct to
keep track of unwind destination information. This will be used in
other EH related passes.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, chrib, llvm-commits

Differential Revision: https://reviews.llvm.org/D48263

llvm-svn: 335005
2018-06-19 00:26:39 +00:00
Eli Friedman de735c977d [ARM] Thumb2 constant cmp testcases.
Shows some missed optimizations for the -7929856 and -2166 testcases.
-7929856 is due to a bug in ARMTargetLowering::getARMCmp, I think;
the -2166 case is a missing pattern.

llvm-svn: 335004
2018-06-19 00:14:10 +00:00
Eli Friedman 9e3bb196cb [ARM] Testcase for Thumb1 cmp with constants.
Even if a comparison isn't legal, we should try to prefer constants
which can be materialized with a two-instruction sequence. (Thinking
about it a bit more, there might be some more clever sequence we could
generate for certain comparisons invoving powers of two, but I'm not
sure exactly what that would look like.)

llvm-svn: 335003
2018-06-19 00:12:13 +00:00
Eli Friedman e6b4719244 [ARM] Add Thumb1 coverage for cmn testcases.
There's a missed optimization for immediates: we can save two
instructions by using adds instead of movs+mvns+cmp.

llvm-svn: 335002
2018-06-19 00:09:44 +00:00
Eli Friedman 892366d025 [ARM] Testcase for missed optimization for masking.
When the result of masking is truncated to i16, we should try to use
"bic" instead of "and".

llvm-svn: 335001
2018-06-19 00:08:32 +00:00
Eli Friedman 801c2f4c3a [ARM] Testcase for missed optimization with i16 compare.
The result looks weird because the DAG actually has an explicit
shift; I haven't figured out why, exactly.

llvm-svn: 335000
2018-06-19 00:07:30 +00:00
Derek Schuff cf3a986087 [WebAssembly] Fixed disassembler unit test failure.
Summary: A recent commit forgot to update the unit tests.

Differential Revision: https://reviews.llvm.org/D48304

Patch by Wouter Van Oortmerssen

llvm-svn: 334999
2018-06-19 00:02:34 +00:00
Heejin Ahn 6279d71227 [WebAssembly] Make rethrow instruction take a target BB argument
Summary:
This patch changes the rethrow instruction to take a BB argument in LLVM
backend, like `br` and `br_if`s. This BB is a target catch BB the
rethrow instruction unwinds to. This BB argument will be converted to an
relative depth immediate at the end of CFGStackify pass, as in the same
way of branches.

RETHROW_TO_CALLER is a codegen-only instruction that should be used when
a rethrow instruction does not have an unwind destination BB, i.e., it
should rethrow to its caller function.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D48260

llvm-svn: 334998
2018-06-18 23:54:29 +00:00
Heejin Ahn 56e1271020 [VPlan] Add Analysis and Core to LLVM_LINK_COMPONENTS
Summary: Without these, build with `-DSHARED_LIB=ON` fails.

Reviewers: dschuff

Subscribers: mgorny, bollu, tschuett, rkruppe, rogfer01, llvm-commits

Differential Revision: https://reviews.llvm.org/D48300

llvm-svn: 334997
2018-06-18 23:51:16 +00:00
Michael Berg 7b993d762f Utilize new SDNode flag functionality to expand current support for fadd
Summary: This patch originated from D46562 and is a proper subset, with some issues addressed.

Reviewers: spatel, hfinkel, wristow, arsenm, javed.absar

Reviewed By: spatel

Subscribers: wdng, nhaehnle

Differential Revision: https://reviews.llvm.org/D47909

llvm-svn: 334996
2018-06-18 23:44:59 +00:00
Jason Molenda 87f0f95e4c Some NFC changes to how we scan of kexts & kernels in memory in the
DynamicLoaderDarwinKernel plugin.  Created a new function ReadMachHeader
and instead of reading through the target cached memory reader,
start by reading only a mach header sized chunk of memory, then
check it for a valid mach-o magic # and use the size of the load
commands to pre-fetch the entire load commands of the kext which
is the only thing we're going to read, instead of letting the generic
mach-o parser read it in 512 byte chunks.

Functionally this is doing exactly the same thing as before, but by
cutting down on the # of packets going back and forth, even on a 
local connection it's close to a quarter faster than it was before.

<rdar://problem/38570146> 

llvm-svn: 334995
2018-06-18 23:30:03 +00:00
Craig Topper a7b7f2f4d8 [X86] Remove ReadAfterLd from avx512_shift_rmbi multiclass.
The instructions that use this class don't have another source register. So I think this was just marking one of the address operands as ReadAfterLd?

llvm-svn: 334994
2018-06-18 23:20:57 +00:00
Xin Tong 54b4227f32 Revert "Simplify blockaddress usage before giving up in MergeBlockIntoPredecessor"
This reverts commit f976cf4cca0794267f28b54e468007fd476d37d9.

I am reverting this because it causes break in a few bots and its going
to take me sometime to look at this.

llvm-svn: 334993
2018-06-18 23:20:08 +00:00
Xin Tong bfd8cfcb8d Simplify blockaddress usage before giving up in MergeBlockIntoPredecessor
Summary:
Simplify blockaddress usage before giving up in MergeBlockIntoPredecessor

This is a missing small optimization in MergeBlockIntoPredecessor.

This helps with one simplifycfg test which expects this case to be handled.

Reviewers: davide, spatel, brzycki, asbirlea

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D48284

llvm-svn: 334992
2018-06-18 22:59:13 +00:00
Fangrui Song d9c3c1cd9d [ELF] Uniquify --wrap list.
Summary: For --wrap foo --wrap foo, bfd/gold wrap the symbol only once but LLD would rotate it twice.

Reviewers: ruiu, espindola

Subscribers: emaste, arichardson, mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D48298

llvm-svn: 334991
2018-06-18 22:32:15 +00:00
Eric Christopher 88bbad24c0 Tidy comment language and explanation.
llvm-svn: 334990
2018-06-18 22:21:19 +00:00
Eric Christopher b1faaf3069 Pull non-lazy stub table emission into a separate function alongside
the individual stub creation to increase readability a bit in the
non-object file format specific function.

llvm-svn: 334989
2018-06-18 22:21:18 +00:00
Eric Christopher b6d0b99f3b Add return statements to make it clear that all of these are mutually exclusive conditions.
else if would have worked just as well, but this keeps the original readability a bit more clear.

llvm-svn: 334988
2018-06-18 22:21:13 +00:00
Stanislav Mekhanoshin 9347c7b939 Tests for dag combine select (binop) -> select. NFC.
Tests will be updated with https://reviews.llvm.org/D48223

llvm-svn: 334987
2018-06-18 21:49:07 +00:00
Matt Davis 712db51edd [llvm-mca] Cleanup the header syntax line. Fix a comment. NFC.
This patch removes a few dashes from the header comment to make room for the syntax line.

llvm-svn: 334986
2018-06-18 21:38:38 +00:00
Wouter van Oortmerssen 48dac3109e [WebAssembly] Modified tablegen defs to have 2 parallel instuction sets.
Summary:
One for register based, much like the existing definitions,
and one for stack based (suffix _S).

This allows us to use registers in most of LLVM (which works better),
and stack based in MC (which results in a simpler and more readable
assembler / disassembler).

Tried to keep this change as small as possible while passing tests,
follow-up commit will:
- Add reg->stack conversion in MI.
- Fix asm/disasm in MC to be stack based.
- Fix emitter to be stack based.

tests passing:
llvm-lit -v `find test -name WebAssembly`

test/CodeGen/WebAssembly
test/MC/WebAssembly
test/MC/Disassembler/WebAssembly
test/DebugInfo/WebAssembly
test/CodeGen/MIR/WebAssembly
test/tools/llvm-objdump/WebAssembly

Reviewers: dschuff, sbc100, jgravelle-google, sunfish

Subscribers: aheejin, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D48183

llvm-svn: 334985
2018-06-18 21:22:44 +00:00
Michael Berg 932ba20af8 refactor of visitFADD for AllowNewConst cases
Summary: Refactoring for all constant cases which require AllowNewConst and some staging for future fmf usage.

Reviewers: spatel, hfinkel, wristow

Reviewed By: spatel

Subscribers: nhaehnle

Differential Revision: https://reviews.llvm.org/D48289

llvm-svn: 334984
2018-06-18 21:12:21 +00:00
Sander de Smalen 067eee1c13 [AArch64][SVE] Asm: Fix predicate pattern diagnostics.
This patch uses the DiagnosticPredicate for SVE predicate patterns
to improve their diagnostics, now giving a 'invalid operand' diagnostic
if the type is not an immediate or one of the expected pattern
labels.

Reviewers: samparker, SjoerdMeijer, javed.absar, fhahn

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D48220

llvm-svn: 334983
2018-06-18 21:03:02 +00:00
Peter Collingbourne d914fd2163 IRgen: Mark aliases of ctors and dtors as unnamed_addr.
This is not only semantically correct but ensures that they will not
be marked as address-significant once D48155 lands.

Differential Revision: https://reviews.llvm.org/D48206

llvm-svn: 334982
2018-06-18 20:58:54 +00:00
Chris Bieneman feb4537b44 Fixing os_version_check.c to be actual C source
The initial implementaiton was using the C++ typeof keyword. This
causes the compiler to spew warnings unnecissarilly. This patch removes
the uses of typeof and replaces them with explicit typedefs of the
function types.

llvm-svn: 334981
2018-06-18 20:56:19 +00:00
Sander de Smalen 7ac9e193ec [AArch64][SVE] Asm: Support for saturating INC/DEC (32bit scalar) instructions.
The variants added by this patch are:
- SQINC     signed increment, e.g. sqinc x0, w0, all, mul #4
- SQDEC     signed decrement, e.g. sqdec x0, w0, all, mul #4
- UQINC   unsigned increment, e.g. uqinc w0, all, mul #4
- UQDEC   unsigned decrement, e.g. uqdec w0, all, mul #4
 
This patch includes asmparser changes to parse a GPR64 as a GPR32 in
order to satisfy the constraint check:
  x0 == GPR64(w0)
in:
  sqinc x0, w0, all, mul #4
         ^___^ (must match)

Reviewers: rengolin, fhahn, SjoerdMeijer, samparker, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D47716

llvm-svn: 334980
2018-06-18 20:50:33 +00:00
Wouter van Oortmerssen 78c62966c2 [WebAssembly] Cleaned up register accessors in WebAssemblyMachineFunctionInfo.h
Tested: llvm-lit -v `find test -name WebAssembly`

(This is a commit access "test commit" :)

llvm-svn: 334979
2018-06-18 20:45:49 +00:00
Raphael Isemann 4621e0b058 Fixed file completion for paths that start with '~'.
We didn't add the remaining path behind the '~' to the completion string,
causing it to just complete directories inside the user home directory. This
patch just adds the directory of the remaining path if there is one.

Fixes rdar://problem/40147002

llvm-svn: 334978
2018-06-18 20:11:38 +00:00
Sanjay Patel 3e52deb144 [x86] regenerate checks and adjust tests
2 of these tests were clearly not doing what the comments
said they were doing.

The last test was added at rL177933 with no assertions
(presumably it used to crash). But either we don't have 
that problem anymore, or this test is folded sooner,
so we don't hit the bug that was fixed by disabling late
FP constant creation. Looking at this as part of reviewing
D48289.

llvm-svn: 334977
2018-06-18 20:05:16 +00:00
Simon Pilgrim a5638431dc [docs] Fix indentation of llvm-exegesis command line arguments
llvm-svn: 334976
2018-06-18 20:05:02 +00:00
Alex Shlyapnikov c75d47b52d [TSan] Report proper error on allocator failures instead of CHECK(0)-ing
Summary:
Following up on and complementing D44404 and other sanitizer allocators.

Currently many allocator specific errors (OOM, for example) are reported as
a text message and CHECK(0) termination, no stack, no details, not too
helpful nor informative. To improve the situation, detailed and structured
common errors were defined and reported under the appropriate conditions.

Common tests were generalized a bit to cover a slightly different TSan
stack reporting format, extended to verify errno value and returned
pointer value check is now explicit to facilitate debugging.

Reviewers: dvyukov

Subscribers: srhines, kubamracek, delcypher, #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D48087

llvm-svn: 334975
2018-06-18 20:03:31 +00:00
Reid Kleckner 80274b1ce7 Fix clangd test to pass when delayed template parsing is on by default
llvm-svn: 334973
2018-06-18 18:55:10 +00:00
Nico Weber ef524f97f4 Don't let test/Driver/no-canonical-prefixes.c form a symlink cycle the second time it runs.
The test makes %t.fake a symlink to %t.real by running `ln -sf %t.real
%t.fake`. If %t.fake already is a symlink to %t.real when this runs (e.g. if
the test has run before), then this effectively becomes `ln -sf %t.real %t.real`,
symlinking the directory to itself. At least on my mac, this leads to the
directory containing itself.

As fix, just remove %t.fake before creating the symlink. To clean up build dirs
on bots, also remove %t.real for a while.

https://reviews.llvm.org/D48224

llvm-svn: 334972
2018-06-18 18:50:35 +00:00
Craig Topper 17bd84c12c [X86] Encode the EVEX2VEX exception list information in .td files instead of the emitter source.
Rather than having an exclusion list in tablegen sources, add a flag to the X86 instruction records that can be used to suppress checking for convertibility.

llvm-svn: 334971
2018-06-18 18:47:07 +00:00
Michael Berg cafe947445 [NFC] make MIFlag accessor functions consistant with usage model
llvm-svn: 334970
2018-06-18 18:37:48 +00:00
Florian Hahn 3385caaafd [VPlan] Add VPInstruction to VPRecipe transformation.
This patch introduces a VPInstructionToVPRecipe transformation, which
allows us to generate code for a VPInstruction based VPlan re-using the
existing infrastructure.

Reviewers: dcaballe, hsaito, mssimpso, hfinkel, rengolin, mkuper, javed.absar, sguggill

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D46827

llvm-svn: 334969
2018-06-18 18:28:49 +00:00
Alex Langford 27510c18ad Introduce lldb-framework CMake target and centralize its logic
Summary:
In this patch I aim to do the following:

1) Create an lldb-framework target that acts as the target that handles generating LLDB.framework. Previously, liblldb acted as the target for generating the framework in addition to generating the actual lldb library. This made the target feel overloaded.
2) Centralize framework generation as much as it makes sense to do so.
3) Create a target lldb-suite, which depends on every tool and library that makes liblldb fully functional. One result of having this target is it makes tracking dependencies much clearer.

Differential Revision: https://reviews.llvm.org/D48060

llvm-svn: 334968
2018-06-18 18:27:16 +00:00
Lang Hames 68c9b8d6a1 [ORC] Add an initial implementation of a replacement CompileOnDemandLayer.
CompileOnDemandLayer2 is a replacement for CompileOnDemandLayer built on the ORC
Core APIs. Functions in added modules are extracted and compiled lazily.
CompileOnDemandLayer2 supports multithreaded JIT'd code, and compilation on
multiple threads.

llvm-svn: 334967
2018-06-18 18:01:43 +00:00
Lang Hames 2e96114caf [ORC] Keep weak flag on VSO symbol tables during materialization, but treat
materializing weak symbols as strong.

This removes some elaborate flag tweaking and plays nicer with RuntimeDyld,
which relies of weak/common flags to determine whether it should emit a given
weak definition. (Switching to strong up-front makes it appear as if there is
already an overriding definition, which would require an extra back-channel to
override).

llvm-svn: 334966
2018-06-18 18:01:41 +00:00
George Karpenkov fdbc1bf62e [analyzer] Remove accidentally committed lines.
llvm-svn: 334965
2018-06-18 17:59:03 +00:00