Commit Graph

59707 Commits

Author SHA1 Message Date
Michael Ilseman a7b93c1e5f Constant fold vector bitcasts of halves similarly to how floats and doubles are folded. Test case included.
llvm-svn: 176131
2013-02-26 22:51:07 +00:00
Roman Divacky fd666e9e3c Add support for autodetection of ADM bdver2.
llvm-svn: 176130
2013-02-26 22:41:01 +00:00
Manman Ren fe494749e4 Revert r176120 as it caused a failure at static-member.cpp
llvm-svn: 176129
2013-02-26 22:35:53 +00:00
Michael J. Spencer 2bb7db9d01 [TableGen] Fix ICE on MSVC 2012 Release builds.
llvm-svn: 176125
2013-02-26 21:29:47 +00:00
Bill Schmidt 8ea7af8e44 Fix PR15332 (patch by Florian Zeitz).
There's no need to generate a stack frame for PPC32 SVR4 when there are
no local variables assigned to the stack, i.e., when no red zone is needed.
(PPC64 supports a red zone, but PPC32 does not.)

llvm-svn: 176124
2013-02-26 21:28:57 +00:00
Matt Arsenault bceea5dfea Fix auto_ptr is deprecated warnings
llvm-svn: 176123
2013-02-26 21:20:35 +00:00
Manman Ren 5222195831 Debug Info: for static member variables, move AT_MIPS_linkage_name from
TAG_member inside a class to the specification DIE.

Having AT_MIPS_linkage_name on TAG_member caused old gdb (GNU 6.3.50) to
error out. Also gcc 4.7 has AT_MIPS_linkage_name on the specification DIE.

rdar://problem/13291234

llvm-svn: 176120
2013-02-26 20:48:29 +00:00
Jim Grosbach 94a2260a7f AsmParser: More generic support for integer type suffices.
For integer constants, allow 'L', 'UL' as well as 'ULL' and 'LL'. This provides
better support for shared headers between .s and .c files that define bunches
of constant values.

rdar://9321056

llvm-svn: 176118
2013-02-26 20:17:10 +00:00
Matt Arsenault 2d17bbee48 Fix typo
llvm-svn: 176117
2013-02-26 20:13:09 +00:00
Christian Konig e500e445c5 R600/SI: Add promotion of e32 to e64 in operand folding
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176105
2013-02-26 17:52:47 +00:00
Christian Konig f741fbfb1b R600/SI: add VOP mapping functions
Make it possible to map between e32 and e64 encoding opcodes.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176104
2013-02-26 17:52:42 +00:00
Christian Konig 6612ac39c9 R600/SI: swap operands if it helps folding
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176103
2013-02-26 17:52:36 +00:00
Christian Konig 76edd4f2bc R600/SI: add some more instruction flags
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176102
2013-02-26 17:52:29 +00:00
Christian Konig f82901af2a R600/SI: add post ISel folding for SI v2
Include immediate folding and SGPR limit handling for VOP3 instructions.

v2: remove leftover hasExtraSrcRegAllocReq

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176101
2013-02-26 17:52:23 +00:00
Christian Konig d910b7d534 R600/SI: add folding helper
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176100
2013-02-26 17:52:16 +00:00
Christian Konig d303996918 R600/SI: fix VOP3b encoding v2
v2: document why we hardcode VCC for now.

This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176099
2013-02-26 17:52:09 +00:00
Christian Konig 0f0a8fe2dd R600/SI: fix and cleanup SI register definition v2
Prevent producing real strange tablegen code by using
proper register sizes, alignments and hierarchy.

Also cleanup the unused definitions and add some comments.

v2: add SGPR 512 bit registers, stop registers from wrapping around,
    fix SGPR alignment

This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176098
2013-02-26 17:52:03 +00:00
Christian Konig d76ed54b60 R600/SI: fix stupid typo
This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176097
2013-02-26 17:51:57 +00:00
Bill Schmidt 441907dc09 Fix PR15359.
The PowerPC TLS relocation types were not previously added to the
necessary list in MCELFStreamer::fixSymbolsInTLSFixups().  Now they are!

llvm-svn: 176094
2013-02-26 16:41:03 +00:00
Kostya Serebryany cf880b9443 Unify clang/llvm attributes for asan/tsan/msan (LLVM part)
These are two related changes (one in llvm, one in clang).
LLVM: 
- rename address_safety => sanitize_address (the enum value is the same, so we preserve binary compatibility with old bitcode)
- rename thread_safety => sanitize_thread
- rename no_uninitialized_checks -> sanitize_memory

CLANG: 
- add __attribute__((no_sanitize_address)) as a synonym for __attribute__((no_address_safety_analysis))
- add __attribute__((no_sanitize_thread))
- add __attribute__((no_sanitize_memory))

for S in address thread memory
If -fsanitize=S is present and __attribute__((no_sanitize_S)) is not
set llvm attribute sanitize_S

llvm-svn: 176075
2013-02-26 06:58:09 +00:00
Michael Ilseman c33b6ac7c9 Use a DenseMap instead of a std::map for AnalysisID -> Pass* maps. This reduces the pass-manager overhead from FPPassManager::runOnFunction() by about 10%.
llvm-svn: 176072
2013-02-26 01:31:59 +00:00
Akira Hatanaka 979899e5cc [mips] Use class RegDefsUses to track register defs and uses.
No functionality change.

llvm-svn: 176070
2013-02-26 01:30:05 +00:00
Chad Rosier 1b33e8d63e [fast-isel] Make sure the FastLowerArguments function checks to make sure the
arguments type is a simple type.
rdar://13290455

llvm-svn: 176066
2013-02-26 01:05:31 +00:00
Michael Liao 609a527286 Refine fix to PR10499, no functionality change
- Put expensive checking after simple one

llvm-svn: 176060
2013-02-25 23:16:36 +00:00
Michael Liao ab97668061 Fix PR10499
- Check whether SSE is available before lowering all 1s vector building with
  PCMPEQD, which is only available from SSE2

llvm-svn: 176058
2013-02-25 23:01:03 +00:00
Chad Rosier 0587597fb8 Fix wording.
llvm-svn: 176055
2013-02-25 22:20:00 +00:00
Chad Rosier a92ef4ba5b [fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 or
fewer scalar integer (i32 or i64) arguments. It completely eliminates the need
for SDISel for trivial functions.

Also, add the new llc -fast-isel-abort-args option, which is similar to
-fast-isel-abort option, but for formal argument lowering.

llvm-svn: 176052
2013-02-25 21:59:35 +00:00
Andrew Trick 7cf4361912 pre-RA-sched fix: only reevaluate physreg interferences when necessary.
Fixes rdar:13279013: scheduler was blowing up on select instructions.

llvm-svn: 176037
2013-02-25 19:11:48 +00:00
Chad Rosier 669bb3ee77 [ms-inline asm] Add support for the pushad/popad mnemonics.
rdar://13254235

llvm-svn: 176036
2013-02-25 19:06:27 +00:00
Matt Beaumont-Gay 0e760da5fc 'Hexadecimal' has two 'a's and only one 'i'.
llvm-svn: 176031
2013-02-25 18:11:18 +00:00
Bill Schmidt b454829981 Fix missing relocation for TLS addressing peephole optimization.
Report and fix due to Kai Nacke.  Testcase update by me.

llvm-svn: 176029
2013-02-25 16:44:35 +00:00
Chandler Carruth 121dbf8846 Fix spelling noticed by Duncan.
llvm-svn: 176023
2013-02-25 14:29:38 +00:00
Chandler Carruth 05920b1847 Fix the root cause of PR15348 by correctly handling alignment 0 on
memory intrinsics in the SDAG builder.

When alignment is zero, the lang ref says that *no* alignment
assumptions can be made. This is the exact opposite of the internal API
contracts of the DAG where alignment 0 indicates that the alignment can
be made to be anything desired.

There is another, more explicit alignment that is better suited for the
role of "no alignment at all": an alignment of 1. Map the intrinsic
alignment to this early so that we don't end up generating aligned DAGs.

It is really terrifying that we've never seen this before, but we
suddenly started generating a large number of alignment 0 memcpys due to
the new code to do memcpy-based copying of POD class members. That patch
contains a bug that rounds bitfield alignments down when they are the
first field. This can in turn produce zero alignments.

This fixes weird crashes I've seen in library users of LLVM on 32-bit
hosts, etc.

llvm-svn: 176022
2013-02-25 14:20:21 +00:00
Reed Kotler bd1058a877 Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters.
llvm-svn: 176007
2013-02-25 02:25:47 +00:00
David Blaikie bbe0e1abe6 DIBuilder: support structs with vtable pointers in the same way as classes
llvm-svn: 176004
2013-02-25 01:07:18 +00:00
Reed Kotler 7a86b3dc2b Make psuedo FEXT_T8I816_ins into a custom emitter.
llvm-svn: 176002
2013-02-24 23:17:51 +00:00
Bill Schmidt c68c6df884 Fix PR14364.
This removes a const_cast hack from PPCRegisterInfo::hasReservedSpillSlot().
The proper place to save the frame index for the CR spill slot is in the
PPCFunctionInfo object, not the PPCRegisterInfo object.

No new test cases, as this just reimplements existing function.  Existing
tests such as test/CodeGen/PowerPC/crsave.ll are sufficient.

llvm-svn: 175998
2013-02-24 17:34:50 +00:00
Benjamin Kramer ee40b9a2d4 CVP: If we have a PHI with an incoming select, try to skip the select.
This is a common pattern with dyn_cast and similar constructs, when the
PHI no longer depends on the select it can often be turned into a simpler
construct or even get hoisted out of the loop.

PR15340.

llvm-svn: 175995
2013-02-24 15:34:43 +00:00
Francois Pichet d1cef3ecd3 Typo
llvm-svn: 175991
2013-02-24 12:34:13 +00:00
Nadav Rotem b532fca92c Revert r169638 because it broke Mesa llvmpipe tests.
Fix PR15239.

llvm-svn: 175985
2013-02-24 07:09:35 +00:00
Reed Kotler e2bead7a2d Make psuedo FEXT_T8I816_ins a custom inserter. It should be expanded
as early as possible; which means during instruction selection.

llvm-svn: 175984
2013-02-24 06:16:39 +00:00
Cameron Zwarich 1b4c64c23b Add a use of an otherwise unused variable to remove a warning in non-Asserts
builds.

llvm-svn: 175981
2013-02-24 01:26:05 +00:00
Cameron Zwarich 6868f386c7 TwoAddressInstructionPass::tryInstructionTransform() only potentially returns
true when shouldOnlyCommute is false, so we can remove code that checks
otherwise.

llvm-svn: 175980
2013-02-24 00:27:29 +00:00
Cameron Zwarich f05c0cbb20 TwoAddrInstructionPass::tryInstructionTransform() has a case where it calls
itself recursively with a new instruction that has not been finalized, in order
to determine whether to keep the instruction. On 'make check' and test-suite the
only cases where the recursive invocation made any transformations were simple
instruction commutations, so I am restricting the recursive invocation to do
only this.

The other cases wouldn't work correctly when updating LiveIntervals, since the
new instructions don't have slot indices and LiveIntervals hasn't yet been
updated. If the other transformations were actually triggering in any test case
it would be possible to support it with a lot of effort, but since they don't
it's not worth it.

llvm-svn: 175979
2013-02-24 00:27:26 +00:00
Reed Kotler 80070bd439 Add new base instruction def for cmpi, cmp, slt and sltu so that def/uses
proper. Fixed this already a few days ago for slti.

llvm-svn: 175975
2013-02-23 23:37:03 +00:00
Cameron Zwarich e6907bc0e6 TargetInstrInfo::commuteInstruction() doesn't actually return a new instruction
unless it was requested to with an optional parameter that defaults to false, so
we don't need to handle that case in TwoAddressInstructionPass.

llvm-svn: 175974
2013-02-23 23:13:28 +00:00
Benjamin Kramer ee23dcb461 X86: Disable cmov-memory patterns on subtargets without cmov.
Fixes PR15115.

llvm-svn: 175962
2013-02-23 10:40:58 +00:00
Cameron Zwarich 63acc73f21 Make some fixes for LiveInterval repair with debug info. Debug value
MachineInstrs don't have a slot index.

llvm-svn: 175961
2013-02-23 10:25:25 +00:00
Cameron Zwarich 4e80d9e853 Fix a bug with the LiveIntervals updating in the two-address pass found by
running ASCI_Purple/SMG2000 in the test-suite.

llvm-svn: 175957
2013-02-23 04:49:22 +00:00
Cameron Zwarich 35c3050e7a Make TwoAddressInstructionPass::sink3AddrInstruction() LiveIntervals-aware.
llvm-svn: 175956
2013-02-23 04:49:20 +00:00