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237 Commits

Author SHA1 Message Date
Evan Cheng 637395e6bd It's not safe to rematerialize MOV32r0 etc. by simply cloning the original 
instruction. These are implemented with xor which will modify the conditional
code. They should be rematerialized as move instructions.

llvm-svn: 41802
 2007-09-10 20:48:53 +00:00
Owen Anderson e2f23a3abf Add lengthof and endof templates that hide a lot of sizeof computations. 
Patch by Sterling Stein!

llvm-svn: 41758
 2007-09-07 04:06:50 +00:00
Evan Cheng ebb8540067 Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses. 
llvm-svn: 41599
 2007-08-30 05:54:07 +00:00
Duncan Sands 7741427a09 Move getX86RegNum into X86RegisterInfo and use it 
in the trampoline lowering.  Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.

llvm-svn: 41577
 2007-08-29 19:01:20 +00:00
Evan Cheng d204d08b97 Make sure epilogue esp adjustment is placed before any terminator and pop instructions. 
llvm-svn: 40538
 2007-07-26 17:45:41 +00:00
Anton Korobeynikov 0c46451d2b Heal EH handling stuff by emitting correct offsets to callee-saved registers. 
Pretty hackish, but code itself is dirty mess, so we won't make anything worse. :)

llvm-svn: 40472
 2007-07-24 21:07:39 +00:00
Evan Cheng 94b5a80b93 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;

llvm-svn: 40033
 2007-07-19 01:14:50 +00:00
Evan Cheng 7b5b06805a Only adjust esp around calls in presence of alloca. 
llvm-svn: 40028
 2007-07-19 00:42:05 +00:00
Evan Cheng 8941071ae1 Use MOV instead of LEA to restore ESP if callee-saved frame size is 0; if previous instruction updates esp, fold it in. 
llvm-svn: 40018
 2007-07-18 21:26:06 +00:00
Evan Cheng 97b5dc63d7 Fold prologue esp update when possible. 
llvm-svn: 39984
 2007-07-17 21:26:42 +00:00
Evan Cheng b2bb4b4040 Make sure not to break eh_return. 
llvm-svn: 39978
 2007-07-17 18:40:47 +00:00
Evan Cheng 67e2e22e97 Missed the case where alloca is used but the stack size (not including callee-saved portion) is zero. Thanks Dan. 
llvm-svn: 39974
 2007-07-17 18:03:34 +00:00
Evan Cheng 9ae2eb43d8 Use push / pop for prologues and epilogues. 
llvm-svn: 39967
 2007-07-17 07:59:08 +00:00
Anton Korobeynikov 383a324735 Long live the exception handling! 
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.

llvm-svn: 39855
 2007-07-14 14:06:15 +00:00
Dan Gohman 57111e7a60 Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp, 
in addition to the intrinsic forms. Add spill-folding entries for these new
instructions, and for the scalar min and max instrinsic instructions which
were missing. And add some preliminary ISelLowering code for using the new
non-intrinsic vector sqrt instruction, and fneg and fabs.

llvm-svn: 38478
 2007-07-10 00:05:58 +00:00
Dale Johannesen 3d7008cd49 Refactor X87 instructions. As a side effect, all 
their names are changed.

llvm-svn: 37876
 2007-07-04 21:07:47 +00:00
Dale Johannesen a2b3c175db Fix for PR 1505 (and 1489). Rewrite X87 register 
model to include f32 variants.  Some factoring
improvments forthcoming.

llvm-svn: 37847
 2007-07-03 00:53:03 +00:00
Anton Korobeynikov 13da17843c More DWARF-related things cleanup: 
1. Fix PR1380
2. Apply Duncan's patch from PR1410
3. Insert workaround for "one personality function per module" as noted in PR1414
4. Emit correct debug frames for x86/linux. This partly fixes DebugInfo/2006-11-06-StackTrace.cpp: stack trace is
shown correctly, but arguments for function on top of stack are displayed incorrectly.

llvm-svn: 37015
 2007-05-12 22:36:25 +00:00
Anton Korobeynikov f1dcf69fc3 Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux 
with non-llvm-compiled (e.g. "native") unwind runtime.

llvm-svn: 36647
 2007-05-02 19:53:33 +00:00
Anton Korobeynikov 073ad20459 Emit correct DWARF reg # for RA (return address) register 
llvm-svn: 36646
 2007-05-02 08:46:03 +00:00
Evan Cheng 5662b21db1 eliminateFrameIndex() change. 
llvm-svn: 36626
 2007-05-01 09:13:03 +00:00
Evan Cheng ce6e6db704 Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add / sub instructions. 
llvm-svn: 36456
 2007-04-26 01:09:28 +00:00
Chris Lattner d20cd6658a do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292 
when promoted to 64-bits

llvm-svn: 36442
 2007-04-25 17:23:53 +00:00
Chris Lattner b975bebec1 support for >4G stack frames 
llvm-svn: 36425
 2007-04-25 04:30:24 +00:00
Chris Lattner 1ef35a2721 support >4G stack frames 
llvm-svn: 36423
 2007-04-25 04:25:10 +00:00
Bill Wendling b3b6c35beb Add the PADDQ to the list. 
llvm-svn: 36406
 2007-04-24 21:19:14 +00:00
Chris Lattner ff0598de75 rename X86FunctionInfo to X86MachineFunctionInfo to match the header file 
it is defined in.

llvm-svn: 36196
 2007-04-17 17:21:52 +00:00
Anton Korobeynikov 8b7aab009e Implemented correct stack probing on mingw/cygwin for dynamic alloca's. 
Also, fixed static case in presence of eax livin. This fixes PR331

PS: Why don't we still have push/pop instructions? :)
llvm-svn: 36195
 2007-04-17 09:20:00 +00:00
Bill Wendling 652c7b2d73 Changed to new MMX_ recipes. 
llvm-svn: 35617
 2007-04-03 06:18:31 +00:00
Evan Cheng 61f39d186c Added MRegisterInfo hook to re-materialize an instruction. 
llvm-svn: 35205
 2007-03-20 08:09:38 +00:00
Bill Wendling 6092ce25cf Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that 
moves, loads, etc. are recognized.

llvm-svn: 35031
 2007-03-08 22:09:11 +00:00
Evan Cheng 95ae95a6a6 PEI now passes a RegScavenger ptr to eliminateFrameIndex. 
llvm-svn: 34707
 2007-02-28 00:21:17 +00:00
Evan Cheng df5899258c By default, spills kills the register being stored. 
llvm-svn: 34515
 2007-02-23 01:10:04 +00:00
Jim Laskey 3796abea0f Support to provide exception and selector registers. 
llvm-svn: 34482
 2007-02-21 22:54:50 +00:00
Evan Cheng f7ed82da10 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. 
llvm-svn: 34428
 2007-02-19 21:49:54 +00:00
Reid Spencer da81bf4d3e For PR1207: 
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399
 2007-02-19 03:20:00 +00:00
Evan Cheng 9865be6d40 Added getReservedRegs(). 
llvm-svn: 34376
 2007-02-17 11:06:00 +00:00
Jim Laskey 3f9f250928 Only gather frame info if debug or eh. 
llvm-svn: 33639
 2007-01-29 23:20:22 +00:00
Jim Laskey b4a2f05d1c Landing pad-less eh for PPC. 
llvm-svn: 33622
 2007-01-29 18:51:14 +00:00
Jim Laskey c56315c2b5 Change the MachineDebugInfo to MachineModuleInfo to better reflect usage 
for debugging and exception handling.

llvm-svn: 33550
 2007-01-26 21:22:28 +00:00
Jim Laskey f9e5445ed4 Make LABEL a builtin opcode. 
llvm-svn: 33537
 2007-01-26 14:34:52 +00:00
Jim Laskey 7ad04830b1 Call frames for intel. 
llvm-svn: 33490
 2007-01-24 19:15:24 +00:00
Jim Laskey 5f24d10381 80 columns 
llvm-svn: 33489
 2007-01-24 18:50:57 +00:00
Evan Cheng 6730e12ae4 PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary. 
llvm-svn: 33460
 2007-01-23 09:38:11 +00:00
Evan Cheng 16e58be1bc hasFP() is now a virtual method of MRegisterInfo. 
llvm-svn: 33455
 2007-01-23 00:57:47 +00:00
Evan Cheng 706b6797a0 One more try... 
llvm-svn: 33400
 2007-01-20 10:17:53 +00:00
Evan Cheng b268184363 Last check-in was bogus. There is no need to align the stack if the function is a leaf function (and without alloca). 
llvm-svn: 33399
 2007-01-20 10:11:56 +00:00
Evan Cheng 86468ccaf3 Backend is reponsible for aligning the stack. 
llvm-svn: 33388
 2007-01-20 02:08:16 +00:00
Anton Korobeynikov a0554d90e8 * PIC codegen for X86/Linux has been implemented 
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)

llvm-svn: 33136
 2007-01-12 19:20:47 +00:00
Anton Korobeynikov 4efbbc963f Really big cleanup. 
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin

llvm-svn: 32833
 2007-01-03 11:43:14 +00:00