Commit Graph

149600 Commits

Author SHA1 Message Date
Teresa Johnson a6a3fb57a1 [ThinLTO] Reduce unnecessary map lookups during combined summary write
Summary:
Don't assign values to undefined references, simply don't emit those
reference edges as they are not useful (we were already not emitting
call edges to undefined refs).

Also, streamline the later lookup of value ids when writing the
summaries, by combining the check for value id existence with the access
of that value id.

Reviewers: pcc

Subscribers: Prazek, llvm-commits, inglorion

Differential Revision: https://reviews.llvm.org/D33634

llvm-svn: 304323
2017-05-31 18:58:11 +00:00
Nirav Dave 3424373f30 [ScheduleDAG] Deal with already scheduled loads in ScheduleDAG.
Summary:
If we attempt to unfold an SUnit in ScheduleDAG that results in
finding an already scheduled load, we must should abort the
unfold as it will not improve scheduling.

This fixes PR32610.

Reviewers: jmolloy, sunfish, bogner, spatel

Subscribers: llvm-commits, MatzeB

Differential Revision: https://reviews.llvm.org/D32911

llvm-svn: 304321
2017-05-31 18:43:17 +00:00
Matthias Braun d6a36ae282 TargetMachine: Indicate whether machine verifier passes.
This adds a callback to the LLVMTargetMachine that lets target indicate
that they do not pass the machine verifier checks in all cases yet.

This is intended to be a temporary measure while the targets are fixed
allowing us to enable the machine verifier by default with
EXPENSIVE_CHECKS enabled!

Differential Revision: https://reviews.llvm.org/D33696

llvm-svn: 304320
2017-05-31 18:41:23 +00:00
Kostya Serebryany 53b34c8443 [sanitizer-coverage] remove stale code (old coverage); llvm part
llvm-svn: 304319
2017-05-31 18:27:33 +00:00
Sean Fertile 457ddd311a [PowerPC] Correctly specify the cache line size for Power 7, 8 and 9.
Fixes PPCTTIImpl::getCacheLineSize() returning the wrong cache line size for
newer ppc processors.

Commiting on behalf of Stefan Pintilie.
Differential Revision: https://reviews.llvm.org/D33656

llvm-svn: 304317
2017-05-31 18:20:17 +00:00
Anna Thomas 777bb90bdc Revert "[Atomics][LoopIdiom] Recognize unordered atomic memcpy"
This reverts commit r304310.

It caused build failures in polly and mingw
due to undefined reference to
llvm::RTLIB::getMEMCPY_ELEMENT_ATOMIC.

llvm-svn: 304315
2017-05-31 17:20:51 +00:00
Zaara Syeda 3a7578c658 [PPC] Inline expansion of memcmp
This patch does an inline expansion of memcmp.
It changes the memcmp library call into an inline expansion when the size is
known at compile time and is under a target specified threshold.
This expansion is implemented in CodeGenPrepare and expands into straight line
code. The target specifies a maximum load size and the expansion works by using
this size to load the two sources, compare, and exit early if a difference is
found. It also has a special case when the memcmp result is used in a compare
to zero equality.

Differential Revision: https://reviews.llvm.org/D28637

llvm-svn: 304313
2017-05-31 17:12:38 +00:00
Galina Kistanova 6ad77845e2 Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.
llvm-svn: 304312
2017-05-31 17:10:03 +00:00
Mark Searles 11d0a04050 [AMDGPU] Fix bugs in new waitcnt pass. Add test.
- new waitcnt pass remains off by default; -enable-si-insert-waitcnts=1 to enable it
- fix handling of PERMUTE ops
- fix insertion of waitcnt instrs at function begin/end ( port of analogous code that was added to old waitcnt pass )
- add new test

  Differential Revision: https://reviews.llvm.org/D33114

llvm-svn: 304311
2017-05-31 16:44:23 +00:00
Anna Thomas 056c009f1b [Atomics][LoopIdiom] Recognize unordered atomic memcpy
Summary:
Expanding the loop idiom test for memcpy to also recognize unordered atomic memcpy.
The only difference for recognizing
an unordered atomic memcpy and instead of a normal memcpy is
that the loads and/or stores involved are unordered atomic operations.
Background:  http://lists.llvm.org/pipermail/llvm-dev/2017-May/112779.html

Patch by Daniel Neilson!

Reviewers: reames, anna, skatkov

Reviewed By: reames

Subscribers: llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D33243

llvm-svn: 304310
2017-05-31 16:39:52 +00:00
Dmitry Preobrazhensky 793c592652 [AMDGPU][MC] New syntax for ds_swizzle_b32 offset
See Bug 28601: https://bugs.llvm.org//show_bug.cgi?id=28601

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D33542

llvm-svn: 304309
2017-05-31 16:26:47 +00:00
Florian Hahn ff25b6d8f6 [AArch64] Enable FeatureFuseAES on Cortex-A53.
It improves performance on Cortex-A53.

llvm-svn: 304307
2017-05-31 15:50:03 +00:00
Florian Hahn 064a2f9222 [AArch64] Enable FeatureFuseAES on Cortex-A73.
It improves performance on Cortex-A73.

llvm-svn: 304304
2017-05-31 15:25:25 +00:00
Reid Kleckner 1d7cbdfc3d Fix assertion when merging multiple empty AttributeLists
Patch by Nicholas Wilson!

Differential Revision: https://reviews.llvm.org/D33627

llvm-svn: 304300
2017-05-31 14:24:06 +00:00
Nirav Dave 7c70fddba6 [DAG] Avoid use of stale store.
Correct references to alignment of store which may be deleted in a
previous iteration of merge. Instead use first store that would be
merged.

Corrects pr33172's use-after-poison caught by ASan.

Reviewers: spatel, hfinkel, RKSimon

Reviewed By: RKSimon

Subscribers: thegameg, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33686

llvm-svn: 304299
2017-05-31 13:36:17 +00:00
Tony Jiang 60c247de18 [PowerPC] Fix a performance bug for PPC::XXPERMDI.
There are some VectorShuffle Nodes in SDAG which can be selected to XXPERMDI
Instruction, this patch recognizes them and does the selection to improve
the PPC performance.

Differential Revision: https://reviews.llvm.org/D33404

llvm-svn: 304298
2017-05-31 13:09:57 +00:00
Amaury Sechet 6a303a4e73 Regenerate xchg-nofold.ll expected results. NFC.
llvm-svn: 304291
2017-05-31 09:44:08 +00:00
Nemanja Ivanovic accab033c9 [PowerPC] Eliminate integer compare instructions - vol. 3
This patch builds upon https://reviews.llvm.org/rL302810 to add
handling for the 64-bit SETEQ patterns.

Differential Revision: https://reviews.llvm.org/D33369

llvm-svn: 304286
2017-05-31 08:04:07 +00:00
Dylan McKay 043fa4b3d6 [AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo Erdi
When generating code for a shift loop, check the shift
 amount against the literal value 0, not R0

llvm-svn: 304284
2017-05-31 06:27:46 +00:00
Dylan McKay 48614d4a2c [AVR] CPIRdK can only work with r16..r31; Authored by Dr. Gergo Erdi
(https://github.com/avr-rust/rust/issues/50)

llvm-svn: 304283
2017-05-31 06:10:59 +00:00
Nemanja Ivanovic e597bd8230 [PowerPC] Eliminate integer compare instructions - vol. 2
This patch builds upon https://reviews.llvm.org/rL302810 to add
handling for bitwise logical operations in general purpose registers.
The idea is to keep the values in GPRs as long as possible - only
extracting them to a condition register bit when no further operations
are to be done.

Differential Revision: https://reviews.llvm.org/D31851

llvm-svn: 304282
2017-05-31 05:40:25 +00:00
Craig Topper 16942c2cb2 [TableGen] Implement non-const versions of Record::getValue by delegating to the const versions to avoid duplicate code. NFC
llvm-svn: 304281
2017-05-31 05:12:36 +00:00
Craig Topper 01197f686f [TableGen] Make one of RecordVal's constructors delegate to the other to reduce duplicate code.
llvm-svn: 304280
2017-05-31 05:12:33 +00:00
Zachary Turner 1b88f4f33a [ObjectYAML] Split CodeViewYAML into 3 pieces.
The code was a mess and disorganized due to the sheer amount
of it being in one file.  So I'm splitting this into three files.
One for CodeView types, one for CodeView symbols, and one for
CodeView debug subsections.  NFC.

llvm-svn: 304278
2017-05-31 04:17:13 +00:00
Gor Nishanov 2bc782d8da [coroutines] Call initializePass in coroutine pass constructors
Summary:

Fixes: https://bugs.llvm.org/show_bug.cgi?id=33226

Reviewers: chandlerc, davide, majnemer, dblaikie

Reviewed By: chandlerc

Subscribers: EricWF, llvm-commits

Differential Revision: https://reviews.llvm.org/D33701

llvm-svn: 304277
2017-05-31 03:12:42 +00:00
George Burgess IV 0a7b989036 [CFLAA] Add missing break; note things are broken.
Thanks to Galina Kistanova for finding the missing break!

When trying to make a test for this, I realized our logic for handling
extractvalue/insertvalue/... is somewhat broken. This makes constructing
a test-case for this missing break nontrivial.

llvm-svn: 304275
2017-05-31 02:35:26 +00:00
Matthias Braun bcd4c68233 X86FrameLowering: No need to mark FP as live-in everywhere
The frame pointer (when used as frame pointer) is a reserved register.
We do not track liveness of reserved registers and hence do not need to
add them to the basic block livein lists.

llvm-svn: 304274
2017-05-31 02:11:10 +00:00
Galina Kistanova 49b6023095 Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.
llvm-svn: 304273
2017-05-31 01:54:18 +00:00
Daniel Berlin be3e7ba45e NewGVN: Fix PR 33185 by checking whether we need to recursively
generate a phi of ops, which we don't currently support.

llvm-svn: 304272
2017-05-31 01:47:32 +00:00
Daniel Berlin 9ceafe267b Fix test that wasn't update_test_check'd
llvm-svn: 304271
2017-05-31 01:47:29 +00:00
Daniel Berlin 71ff663e1b InstructionSimplify: Remove now-redundant reachability tests, as dominates() already does them
llvm-svn: 304270
2017-05-31 01:47:24 +00:00
Vedant Kumar b745804bb1 Mark a test as requiring a default triple
This test assumes that llc can infer a default triple. I'm not sure why
exactly, but the Verify MachineInstrs bot requires tests to be explicit
about this dependency.

This commit follows the lead from r248452 and adds in 'REQUIRES:
default_triple' to omit-empty.ll.

Bot URL: http://lab.llvm.org:8080/green/job/Verify-Machineinstrs_AArch64/7500

llvm-svn: 304269
2017-05-31 01:42:55 +00:00
Galina Kistanova 9ee35cf57b Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.
llvm-svn: 304268
2017-05-31 01:33:39 +00:00
Matthias Braun 05eeadbfd1 ARM: Fix cmpxchg O0 expansion
This is the equivalent of r304048 for ARM:

- Rewrite livein calculation to use the computeLiveIns() helper
  function. This is slightly less efficient but easier to reason about
  and doesn't unnecessarily add pristine and reserved registers[1]
- Zero the status register at the beginning of the loop to make sure it
  has a defined value.
- Remove kill flags of values that need to stay alive throughout the loop.

[1] An upcoming commit of mine will tighten the MachineVerifier to catch
    these.

llvm-svn: 304267
2017-05-31 01:21:35 +00:00
Matthias Braun 0dba4e3509 ARM: Do not add reserved registers to block livein lists; NFC
llvm-svn: 304266
2017-05-31 01:21:30 +00:00
Eugene Zelenko 4e9736b1c9 [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 304265
2017-05-31 01:10:10 +00:00
Vedant Kumar bf154dd27f Fix CodeView-related modules build failures post-r304248
llvm-svn: 304264
2017-05-31 01:08:43 +00:00
Zachary Turner 083342bd34 [ObjectYAML] Clean up the CodeView headers a bit.
CodeViewYAML.h attempts to hide the details of many of the
CodeView yaml structures and types, but at the same time it
exposes the mapping traits for them to external users of the
header.

This patch just hides these in the implementation files so that
the interface is kept as simple as possible.

llvm-svn: 304263
2017-05-31 01:08:36 +00:00
Alina Sbirlea 032b5bdf2b Fix misspelling
llvm-svn: 304262
2017-05-31 01:00:51 +00:00
Abderrazek Zaafrani 855411566b Add latency info for Exynos interleaved Load/Store instructions.
llvm-svn: 304259
2017-05-31 00:20:55 +00:00
Zachary Turner 7a75bc05b7 Try to fix build again.
llvm-svn: 304257
2017-05-30 23:57:46 +00:00
Zachary Turner 1e4d3693c4 [CodeView] Move CodeView symbol yaml logic to ObjectYAML.
This continues the effort to get the CodeView YAML parsing logic
into ObjectYAML.  After this patch, the only missing piece will
be the CodeView debug symbol subsections.

llvm-svn: 304256
2017-05-30 23:50:44 +00:00
Eric Beckmann 025e82bac1 Fix bug on Big-Endian system, due to reference to vector out of scope.
llvm-svn: 304255
2017-05-30 23:10:57 +00:00
Matthias Braun bc09894d6a MachineInstr: Do not skip dead def operands when printing.
This was introduced a long time ago in r86583 when regmask operands
didn't exist. Nowadays the behavior hurts more than it helps. This
removes it.

llvm-svn: 304254
2017-05-30 23:09:21 +00:00
Eric Beckmann ba395ef491 This patch should fix various clang warnings and a use of to_string
which isn't support before c++11.

llvm-svn: 304252
2017-05-30 22:29:06 +00:00
Tim Shen 0bd0aa8f07 [AntiDepBreaker] Revert r299124 and add a test.
Summary:
AntiDepBreaker intends to add all live-outs, including the implicit
CSRs, in StartBlock. r299124 was done without understanding that
intention.

Now with the live-ins propagated correctly (D32464), we can revert this change.

Reviewers: MatzeB, qcolombet

Subscribers: nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D33697

llvm-svn: 304251
2017-05-30 22:26:52 +00:00
Tim Northover d276d85309 MIR: update test for noVRegs removal.
I think I hadn't git pulled recently enough to bring it in.

llvm-svn: 304250
2017-05-30 22:02:19 +00:00
Zachary Turner 9c1ba225a9 Try to fix build.
llvm-svn: 304249
2017-05-30 22:00:37 +00:00
Zachary Turner d427383cb8 [CodeView] Move CodeView YAML code to ObjectYAML.
This is the beginning of an effort to move the codeview yaml
reader / writer into ObjectYAML so that it can be shared.
Currently the only consumer / producer of CodeView YAML is
llvm-pdbdump, but CodeView can exist outside of PDB files, and
indeed is put into object files and passed to the linker to
produce PDB files.  Furthermore, there are subtle differences
in the types of records that show up in object file CodeView
vs PDB file CodeView, but they are otherwise 99% the same.

By having this code in ObjectYAML, we can have llvm-pdbdump
reuse this code, while teaching obj2yaml and yaml2obj to use
this syntax for dealing with object files that can contain
CodeView.

This patch only adds support for CodeView type information
to ObjectYAML.  Subsequent patches will add support for
CodeView symbol information.

llvm-svn: 304248
2017-05-30 21:53:05 +00:00
Matthias Braun 5e394c3d6f TargetPassConfig: Keep a reference to an LLVMTargetMachine; NFC
TargetPassConfig is not useful for targets that do not use the CodeGen
library, so we may just as well store a pointer to an
LLVMTargetMachine instead of just to a TargetMachine.

While at it, also change the constructor to take a reference instead of a
pointer as the TM must not be nullptr.

llvm-svn: 304247
2017-05-30 21:36:41 +00:00