Summary:
If 'i' is an rvalue reference to an 'int', evaluating it with the
'expression' command will return an 'int' value and not an 'int &&'.
Before this patch, an 'int &&' type was expected.
Enabled the test for clang and gcc as all parts of the test now pass
when the testcase is compiled with them.
Test Plan: dotest.py -C <gcc|clang> -p TestRvalueReferences
Reviewers: spyffe, chaoren
Subscribers: lldb-commits
Differential Revision: http://reviews.llvm.org/D9005
llvm-svn: 235036
Summary:
If the string is not formatted, these can happen when compiled with GCC:
1. If it is a null string "", then GCC completely removes the call to
printf even with -O0.
2. If the string is a single character string, say "\n" for example,
then GCC replaces the call to printf with a call to putchar.
3. If the string length is greater than 1, but is not formatted, then
GCC replaces the call to printf with a call to puts.
All the above will fail the test as we want a breakpoint on "printf" to
hit.
Test Plan: dotest.py -C gcc -p TestMiBreak
Reviewers: chying, ki.stfu
Reviewed By: ki.stfu
Subscribers: lldb-commits
Differential Revision: http://reviews.llvm.org/D9025
llvm-svn: 235034
signature match the other layers.
This makes it possible to compose other layers (e.g. IRTransformLayer) on top
of CompileOnDemandLayer.
llvm-svn: 235029
BXJ was incorrectly said to be unsupported in ARMv8-A. It is not
supported in the A64 instruction set, but it is supported in the T32
and A32 instruction sets, because it's listed as an instruction in the
ARM ARM section F7.1.28.
Using SP as an operand to BXJ changed from UNPREDICTABLE to
PREDICTABLE in v8-A. This patch reflects that update as well.
This was found by MCHammer.
llvm-svn: 235024
"multiple methods named '<selector>' found" warning by noting
the method that is actualy used. It also cleans up and refactors
code in this area and selects a method that matches actual arguments
in case of receiver being a forward class object.
rdar://19265430
llvm-svn: 235023
Summary:
With this patch, SLSR may rewrite
S1: X = B + i * S
S2: Y = B + i' * S
to
S2: Y = X + (i' - i) * S
A secondary improvement: if (i' - i) is a power of 2, emit Y as X + (S << log(i' - i)). (S << log(i' -i)) is in a canonical form and thus more likely GVN'ed than (i' - i) * S.
Test Plan: slsr-add.ll
Reviewers: hfinkel, sanjoy, meheff, broune, eliben
Reviewed By: eliben
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D8983
llvm-svn: 235019
Summary:
This patch adds the comments which are included in LLDB disassembly, but are currently missing in MI, e.g.
^done,asm_insns=[...,{address="0x00000000004004ff",func-name="main",offset="18",size="2",inst="jmp 0x40050b ; <+30> at main.c:7"}]
instead of
^done,asm_insns=[...,{address="0x00000000004004ff",func-name="main",offset="18",size="2",inst="jmp 0x40050b"}]
Thanks, Ewan
Patch from ewan@codeplay.com
Reviewers: abidh, EwanCrawford
Subscribers: ted, lldb-commits, deepak2427
Differential Revision: http://reviews.llvm.org/D8964
llvm-svn: 235017
Many of these predate llvm-readobj. With elf-dump we had to match
a relocation to symbol number and symbol number to symbol name or
section number.
llvm-svn: 235015
This is a 1-line patch (with a TODO for AVX because that will affect
even more regression tests) that lets us substitute the appropriate
64-bit store for the float/double/int domains.
It's not clear to me exactly what the difference is between the 0xD6 (MOVPQI2QImr) and
0x7E (MOVSDto64mr) opcodes, but this is apparently the right choice.
Differential Revision: http://reviews.llvm.org/D8691
llvm-svn: 235014
Set the transform bar at 2 divisions because the fastest current
x86 FP divider circuit is in SandyBridge / Haswell at 10 cycle
latency (best case) relative to a 5 cycle multiplier.
So that's the worst case for this transform (no latency win),
but multiplies are obviously pipelined while divisions are not,
so there's still a big throughput win which we would expect to
show up in typical FP code.
These are the sequences I'm comparing:
divss %xmm2, %xmm0
mulss %xmm1, %xmm0
divss %xmm2, %xmm0
Becomes:
movss LCPI0_0(%rip), %xmm3 ## xmm3 = mem[0],zero,zero,zero
divss %xmm2, %xmm3
mulss %xmm3, %xmm0
mulss %xmm1, %xmm0
mulss %xmm3, %xmm0
[Ignore for the moment that we don't optimize the chain of 3 multiplies
into 2 independent fmuls followed by 1 dependent fmul...this is the DAG
version of: https://llvm.org/bugs/show_bug.cgi?id=21768 ...if we fix that,
then the transform becomes even more profitable on all targets.]
Differential Revision: http://reviews.llvm.org/D8941
llvm-svn: 235012
Summary:
This patch fixes the following bug: https://llvm.org/bugs/show_bug.cgi?id=23181
For some reason some lldb-server tests should be kicked using SIGHUP and SIGINT before termination, otherwise it will leave a zombie process.
I think the reason is that the lldb-server will terminate a slave process if it gets the SIGHUP/SIGINT and if so it should be fixed in lldb-server.
The solution is to terminate process like it does the pexpect (including the delayafterterminate interval).
Also this patch reverts the following commits:
* r234549 - Skip lldb-server tests according to bug 23181
* r234765 - Skip a few tests on OS X according to the bug 23181
* r234803 - Skip the TestGdbRemoteRegisterState.test_grp_register_save_restore_works_no_suffix_debugserver_dsym test on OS X according to the bug 23181
Test Plan:
```
$ ps | grep Z | grep a.out | wc -l
447
$ ./dosep.py --options "-v --executable $INSTALLDIR/bin/lldb"
[...]
$ ps | grep Z | grep a.out | wc -l
447
```
Reviewers: jasonmolenda, clayborg, tberghammer
Reviewed By: clayborg
Subscribers: lldb-commits, dawn, tberghammer, clayborg, jasonmolenda
Differential Revision: http://reviews.llvm.org/D9019
llvm-svn: 235008
Summary:
MSP430 doesn't seem to have any additional constraints. Therefore remove
the target hook.
No functional change intended.
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D8208
llvm-svn: 235003
Summary:
Refactor MipsAsmParser::getATReg to return an internal register number instead of a register index.
Also change all the int's to unsigned, seeing as the current AT register index is stored as an unsigned in MipsAssemblerOptions.
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D8478
llvm-svn: 234996
Typically, LLGS only sends stdout/stderr notifications when the inferior
process is running.
Because LLGS reads stdout from the process in a separate thread, sometimes
these stdout notifications can be received after the server has sent a thread
stop message. The host isn't expecting stdout to be generated by the target
after a stop message and these messages interfere with the host's request/
response paradigm.
Differential Revision: http://reviews.llvm.org/D9024
llvm-svn: 234995
Test was waiting for wrong string on Linux.
It is still marked as XFAIL because of an intermittent failure.
Differential Revision: http://reviews.llvm.org/D8679
llvm-svn: 234993
Linux arm don't support hardware stepping (neither mismatch
breakpoints). This patch implement signle stepping with doing a software
emulation of the next instruction and then setting a temporary
breakpoint at the address where the thread will stop next.
Differential revision: http://reviews.llvm.org/D8976
llvm-svn: 234987
Siva Chandra