replica
/
hanchenye-llvm-project
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
103,354 Commits 2 Branches 0 Tags 1.8 GiB
Commit Graph

103354 Commits

Author SHA1 Message Date
Johnny Chen 9cd9c4e5c9 Add a test case for a malformed LDC/LDC2 instructions with PUDW = 0b0000, which 
amounts to an UNDEFINED instruction.

llvm-svn: 128668
 2011-03-31 20:54:30 +00:00
Evan Cheng 38bf5adcea Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier 
accumulator forwarding:
vadd d3, d0, d1
vmul d3, d3, d2
=>
vmul d3, d0, d2
vmla d3, d1, d2

llvm-svn: 128665
 2011-03-31 19:38:48 +00:00
Sebastian Redl 7ac974122f Make ChainedIncludesSource an ExternalSemaSource, otherwise initialization of the ASTReader is incomplete, leading to errors like not realizing std::type_info is already defined. 
llvm-svn: 128664
 2011-03-31 19:29:24 +00:00
Sebastian Redl 604caf4008 Tell the diagnostic client about starting and ending source files when automatically creating chained PCHs. This way, we don't get a crash whenever a diagnostic is emitted while processing the include. 
llvm-svn: 128663
 2011-03-31 19:29:18 +00:00
Johnny Chen 7b203f9cae Fix single word and unsigned byte data transfer instruction encodings so that 
Inst{4} = 0.

rdar://problem/9213022

llvm-svn: 128662
 2011-03-31 19:28:35 +00:00
Caroline Tice 5901ea7e67 Add code to emulate VST1 (single element from one lane) ARM 
instruction (more floating point stores).

llvm-svn: 128661
 2011-03-31 19:17:12 +00:00
Caroline Tice d64a08144c Add code to emulate VST1 (multiple single elements) ARM 
instruction (floating point store).

llvm-svn: 128656
 2011-03-31 18:44:04 +00:00
Jakob Stoklund Olesen f4c9754d5c Fix Mips, Sparc, and XCore tests that were dependent on register allocation. 
Add an extra run with -regalloc=basic to keep them honest.

llvm-svn: 128654
 2011-03-31 18:42:43 +00:00
Akira Hatanaka a535270d91 Added support for FP conditional move instructions and fixed bugs in handling of FP comparisons. 
llvm-svn: 128650
 2011-03-31 18:26:17 +00:00
Nick Lewycky 9feca67182 Pick better examples. "fpext float 3.1415 to double" won't parse because 3.1415 
isn't an exact float. Also "fpext float 1.0 to float" is invalid IR because
it's not performing an extension.

llvm-svn: 128647
 2011-03-31 18:20:19 +00:00
Caroline Tice bc2b96b699 Add code to emulate VLD1 (single element to one lane) floating point 
register load instruction (ARM) .

llvm-svn: 128646
 2011-03-31 17:58:23 +00:00
Jakob Stoklund Olesen e6e6750670 Don't completely eliminate identity copies that also modify super register liveness. 
Turn them into noop KILL instructions instead. This lets the scavenger know when
super-registers are killed and defined.

llvm-svn: 128645
 2011-03-31 17:55:25 +00:00
Johnny Chen 13baa0e650 Add BLXi to the instruction table for disassembly purpose. 
A8.6.23 BLX (immediate)

rdar://problem/9212921

llvm-svn: 128644
 2011-03-31 17:53:50 +00:00
Jakob Stoklund Olesen 561cea0480 Allow kill flags on two-address instructions. They are harmless. 
llvm-svn: 128643
 2011-03-31 17:52:41 +00:00
Jakob Stoklund Olesen 9a78835414 Mark all uses as <undef> when joining a copy. 
This way, shrinkToUses() will ignore the instruction that is about to be
deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like.

Fix a misunderstanding in MachineVerifier about <def,undef> operands. The
<undef> flag is valid on def operands where it has the same meaning as <undef>
on a use operand. It only applies to sub-register defines which also read the
full register.

llvm-svn: 128642
 2011-03-31 17:23:25 +00:00
Daniel Dunbar ebc34dff18 Driver/Darwin: Tweak link logic for simulator. 
llvm-svn: 128641
 2011-03-31 17:12:33 +00:00
Daniel Dunbar 22c5560bc8 Remove stray empty test file. 
llvm-svn: 128640
 2011-03-31 17:01:56 +00:00
Devang Patel e0cbe31ebb Remove dead code. 
llvm-svn: 128639
 2011-03-31 16:53:49 +00:00
Caroline Tice 8071f11208 Revert changes that caused this scheme to be hidden in certain cases. 
llvm-svn: 128638
 2011-03-31 16:45:59 +00:00
Caroline Tice 31d8498f6f Add code to emulate VLD1 (multiple single elements) ARM instruction. 
llvm-svn: 128637
 2011-03-31 16:41:19 +00:00
Howard Hinnant 890477f333 Provide a more readable error message for <atomic> until it is implemented. 
llvm-svn: 128636
 2011-03-31 16:39:39 +00:00
Bruno Cardoso Lopes c2452a6f1d Revert r128632 again, until I figure out what break the tests 
llvm-svn: 128635
 2011-03-31 15:54:36 +00:00
Jakob Stoklund Olesen 2ee5a0fc7f Fix bug found by valgrind. 
llvm-svn: 128634
 2011-03-31 15:14:11 +00:00
Richard Osborne 9a827b30ab Add XCore intrinsics for initializing / starting / synchronizing threads. 
llvm-svn: 128633
 2011-03-31 15:13:13 +00:00
Bruno Cardoso Lopes 4c0aebfb91 Reapply r128585 without generating a lib depedency cycle. An updated log: 
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
  {STR,LDC}{2}_{PRE,POST} fixing the encoding wherever is possible.
- Move all instructions which use am2offset without a pattern to use
  addrmode2.
- Add a new encoding bit to describe the index mode used and teach
  printAddrMode2Operand to check by the addressing mode which index
  mode to print.
- Testcases

llvm-svn: 128632
 2011-03-31 14:52:28 +00:00
Michael J. Spencer 3df5c04fe4 Fix whitespace. 
llvm-svn: 128631
 2011-03-31 13:06:39 +00:00
Michael J. Spencer c60223ef6c Switch FileRemover from PathV1 to V2. 
llvm-svn: 128630
 2011-03-31 13:04:19 +00:00
NAKAMURA Takumi 41f32c7127 lib/CodeGen/LiveIntervalAnalysis.cpp: [PR9590] Don't use std::pow(float,float) here. 
We don't expect the real "powf()" on some hosts (and powf() would be available on other hosts).
For consistency, std::pow(double,double) may be called instead.
Or, precision issue might attack us, to see unstable regalloc and stack coloring.

llvm-svn: 128629
 2011-03-31 12:11:33 +00:00
Benjamin Kramer be209ab8a2 InstCombine: Fix transform to use the swapped predicate. 
Thanks Frits!

llvm-svn: 128628
 2011-03-31 10:46:03 +00:00
Benjamin Kramer d159d94644 InstCombine: fold fcmp (fneg x), (fneg y) -> fcmp x, y 
llvm-svn: 128627
 2011-03-31 10:12:22 +00:00
Benjamin Kramer a8c5d0872d InstCombine: fold fcmp pred (fneg x), C -> fcmp swap(pred) x, -C 
llvm-svn: 128626
 2011-03-31 10:12:15 +00:00
Benjamin Kramer cbb18e91a8 InstCombine: Shrink "fcmp (fpext x), C" to "fcmp x, C" if C can be losslessly converted to the type of x. 
Fixes PR9592.

llvm-svn: 128625
 2011-03-31 10:12:07 +00:00
Benjamin Kramer 2ccfbc8b71 InstCombine: fold fcmp (fpext x), (fpext y) -> fcmp x, y. 
llvm-svn: 128624
 2011-03-31 10:11:58 +00:00
Duncan Sands 7c2b338a7e Will not compile without the spec! 
llvm-svn: 128623
 2011-03-31 10:03:32 +00:00
Duncan Sands 6ae98633dd Strip trailing whitespace. 
llvm-svn: 128622
 2011-03-31 09:58:51 +00:00
John McCall 7c623641a6 Whoops. 
llvm-svn: 128621
 2011-03-31 09:19:20 +00:00
Bill Wendling 01cbbd8555 Testcase for r128619 (PR9571). 
llvm-svn: 128620
 2011-03-31 08:13:57 +00:00
John McCall f9b056b002 After much contemplation, I've decided that we probably shouldn't "unique" 
__block object copy/dispose helpers for C++ objects with those for
different variables with completely different semantics simply because
they happen to both be no more aligned than a pointer.

Found by inspection.

Also, internalize most of the helper generation logic within CGBlocks.cpp,
and refactor it to fit my peculiar aesthetic sense.

llvm-svn: 128618
 2011-03-31 08:03:29 +00:00
Caroline Tice 8e4ed85520 Add code to emulate VSTR ARM instruction (store a floating point register). 
llvm-svn: 128614
 2011-03-31 05:38:36 +00:00
Caroline Tice df6dec754b Add code to emulate the VLDR Arm instruction (load a floating poitn register). 
llvm-svn: 128613
 2011-03-31 05:05:30 +00:00
Ted Kremenek 40d16c0e75 Static analyzer: fix bug in handling of dynamic_cast<>. The sink node wouldn't always be the final node, thus causing the state to continue propagating. Instead, 
recover some path-sensitivity by conjuring a symbol.

llvm-svn: 128612
 2011-03-31 04:46:53 +00:00
Ted Kremenek 61a4f6682a Teach static analyzer about the basics of handling new[]. We still don't simulate constructors, but at least the analyzer doesn't think the return value is uninitialized. 
llvm-svn: 128611
 2011-03-31 04:04:48 +00:00
Jakob Stoklund Olesen ae044c06bf Pick a conservative register class when creating a small live range for remat. 
The rematerialized instruction may require a more constrained register class
than the register being spilled. In the test case, the spilled register has been
inflated to the DPR register class, but we are rematerializing a load of the
ssub_0 sub-register which only exists for DPR_VFP2 registers.

The register class is reinflated after spilling, so the conservative choice is
only temporary.

llvm-svn: 128610
 2011-03-31 03:54:44 +00:00
Caroline Tice b5c6a3e50a Add "Bits64" utility function. 
Add code to emulate VSTM ARM instruction (store multiple floating point registers).

llvm-svn: 128609
 2011-03-31 03:26:23 +00:00
John McCall 7306487077 Move all the significant __block code into CGBlocks.cpp. No functionality 
change.

llvm-svn: 128608
 2011-03-31 01:59:53 +00:00
Matt Beaumont-Gay 873c6dd875 Oops, prefer C-style cast here 
llvm-svn: 128607
 2011-03-31 01:56:27 +00:00
Matt Beaumont-Gay 4ed4e93b18 Remove a redundant isValid() check 
llvm-svn: 128606
 2011-03-31 01:46:47 +00:00
Matt Beaumont-Gay a25fce8e9e Silence GCC warning about differing types on the branches of a conditional expression 
llvm-svn: 128605
 2011-03-31 01:43:22 +00:00
Johnny Chen d16c105c3d Take advantage of the newly added SBSymbol.GetType() API to check whether we 
have a Code symbol and do disassembly on it.

llvm-svn: 128604
 2011-03-31 01:34:55 +00:00
Ken Dyck 4680e9219a Convert the return value of 
VCallAndVBaseOffsetBuilder::getCurrentOffsetOffset() to CharUnits. No change
in functionality intended.

llvm-svn: 128603
 2011-03-31 01:08:46 +00:00