109ff296c8
Second set of ARM/MC/ELF changes.
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Added ARM specific ELF section types.
Added AttributesSection to ARMElfTargetObject
First step in unifying .cpu assembly tag with ELF/.o
llc now asserts on actual ELF emission on -filetype=obj :-)
llvm-svn: 116257
2010-10-11 23:01:44 +00:00
25cd3bfbd7
remove trailing whitespace
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llvm-svn: 115860
2010-10-06 22:46:47 +00:00
bff84d418f
First in a sequence of ARM/MC/*ELF* specific work.
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Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute()
Added ARMAsmPrinter::emitAttributes() (plural s).
TODO:
.cpu attribute needs to be refactored
llvm-svn: 115859
2010-10-06 22:36:46 +00:00
f49540cb4f
Kill of the vestiges of the 'call' Modifier (no longer needed for PLT).
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llvm-svn: 115845
2010-10-06 21:36:43 +00:00
2c95027258
Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-needed
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"lane" operand modifier.
llvm-svn: 115843
2010-10-06 21:22:32 +00:00
8025f89860
target operand flag values aren't a bitmask
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llvm-svn: 115798
2010-10-06 16:51:55 +00:00
fae8305e2b
Nuke the rest of the :comment references
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llvm-svn: 115373
2010-10-01 23:21:38 +00:00
0e854f3d43
Rename the AsmPrinter directory to InstPrinter for those targets that have
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been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.
llvm-svn: 115360
2010-10-01 22:39:28 +00:00
c8e2e9d830
Nuke a few more unused asm strings
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llvm-svn: 115193
2010-09-30 19:53:58 +00:00
136ed51b08
80 column fix
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llvm-svn: 115149
2010-09-30 15:25:22 +00:00
645f6c2bef
Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile()
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Small test for sanity check of resulting ARM .s file.
Tested against -r115129.
llvm-svn: 115133
2010-09-30 02:45:56 +00:00
080fdf4609
Nuke it from orbit. It's the only way to be sure.
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(Kill the dead non-MC asm printer for the ARM target.)
llvm-svn: 115127
2010-09-30 01:57:53 +00:00
05eccf0e44
One Printer to rule them all, One Printer to find them,
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One Printer to lower them all and in the back end bind them.
(Remove option to use the old non-MC asm printer.)
llvm-svn: 115038
2010-09-29 15:23:40 +00:00
45c83d496f
Factor out dbg_value comment printing and teach MC asm printing to use it.
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This should make the arm-linux self-host buildbot happy again.
llvm-svn: 114964
2010-09-28 17:05:56 +00:00
175d6411c8
Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to
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enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.
llvm-svn: 114915
2010-09-27 22:28:11 +00:00
9e9ed98305
ARM-mode eh.sjlj.longjmp MC lowering
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llvm-svn: 114896
2010-09-27 21:47:04 +00:00
11fed543c9
Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to
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enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.
llvm-svn: 114892
2010-09-27 21:28:44 +00:00
4a6ab13fb9
Add ARM explicit MCInst lowering for the Thumb eh.sjlj.setjmp sequence.
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llvm-svn: 114758
2010-09-24 20:47:58 +00:00
c0aed7179a
ARM-mode eh.sjlj.setjmp pseudo MC-inst lowering expansion
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llvm-svn: 114707
2010-09-23 23:33:56 +00:00
7d34837676
never mind. I can't read, apparently
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llvm-svn: 114689
2010-09-23 19:42:17 +00:00
836341a17a
Fix opcode value for the 'trap' instruction, keeping the type suffix on the
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constant. Hopefully the non-Darwin bots will like it...
llvm-svn: 114687
2010-09-23 19:32:40 +00:00
3d50a3e237
explicit 'unsigned long' on constant value. Hopefully make bots happier.
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llvm-svn: 114686
2010-09-23 19:08:04 +00:00
e38495dbc0
Unbreak build. Jim, please review.
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llvm-svn: 114684
2010-09-23 18:57:26 +00:00
8503054410
Clean up the 'trap' instruction printing a bit. Non-Darwin assemblers don't
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(yet) recognize the 'trap' mnemonic, so we use .short/.long to emit the
opcode directly. On Darwin, however, we do want the mnemonic for more
readable assembly code and better disassembly.
Adjust the .td file to use the 'trap' mnemonic and handle using the binutils
workaround in the assembly printer. Also tweak the formatting of the opcode
values to make them consistent between the MC printer and the old printer.
llvm-svn: 114679
2010-09-23 18:05:37 +00:00
1f57cc4a59
add FIXME
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llvm-svn: 114578
2010-09-22 20:55:15 +00:00
284eebc1ae
Add MC instruction printer support for ARM and Thumb1 jump tables.
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llvm-svn: 114555
2010-09-22 17:39:48 +00:00
1573b29ea7
Add MC instruction printer support for TB[BH] style thumb2 jump tables.
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llvm-svn: 114553
2010-09-22 17:15:35 +00:00
754e1efffc
Clean up comment.
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llvm-svn: 114550
2010-09-22 16:45:13 +00:00
d64f9b8381
Add start of support for MC instruction printer of ARM jump tables. Filling in
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the rest of it is next up.
llvm-svn: 114500
2010-09-21 23:28:16 +00:00
cbac342e1a
Fix errant printing of [v]ldm instructions that aren't a pop
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llvm-svn: 114445
2010-09-21 16:45:31 +00:00
af5d63583e
factor out a simple helper function to create a label for PC-relative
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instructions (PICADD, PICLDR, et.al.)
llvm-svn: 114243
2010-09-18 00:05:05 +00:00
3d97920829
Add MC-inst handling for tPICADD
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llvm-svn: 114237
2010-09-17 23:41:53 +00:00
7a6c37d3e7
Teach the (non-MC) instruction printer to use the cannonical names for push/pop,
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and shift instructions on ARM. Update the tests to match.
llvm-svn: 114230
2010-09-17 22:36:38 +00:00
132a0ce787
Hook up verbose asm comment printing for SOImm operands in MC printer
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llvm-svn: 114215
2010-09-17 21:33:25 +00:00
0d35df1cfe
handle the upper16/lower16 target operand flags on symbol references for MC
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instruction lowering.
llvm-svn: 114191
2010-09-17 18:25:25 +00:00
a7d430b51c
expand PICLDR MC lowering to handle other PICLDR and PICSTR versions.
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llvm-svn: 114183
2010-09-17 16:25:52 +00:00
218e22da8b
MC-ization of the PICLDR pseudo. Next up, adding the other variants
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(PICLDRB, et. al.) and PICSTR*
llvm-svn: 114098
2010-09-16 17:43:25 +00:00
a625b0110b
Remove support for "dregpair" operand modifier, now that it is no longer being
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used for anything.
llvm-svn: 114067
2010-09-16 04:55:00 +00:00
40e85fbf17
move getRegisterNumbering() to out of ARMBaseRegisterInfo into the helper
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functions in ARMBaseInfo.h so it can be used in the MC library as well.
For anything bigger than this, we may want a means to have a small support
library for shared helper functions like this. Cross that bridge when we
come to it.
llvm-svn: 114016
2010-09-15 20:26:25 +00:00
a244f70113
Add predicate and 's' bit operands to PICADD instruction lowering.
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llvm-svn: 113860
2010-09-14 21:28:17 +00:00
7ae94222cd
fix comment typo
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llvm-svn: 113856
2010-09-14 21:05:34 +00:00
8ee5cd99ef
Remove trailing whitespace
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llvm-svn: 112790
2010-09-02 01:02:06 +00:00
13ce07fa92
Change ARM VFP VLDM/VSTM instructions to use addressing mode #4 , just like
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all the other LDM/STM instructions. This fixes asm printer crashes when
compiling with -O0. I've changed one of the NEON tests (vst3.ll) to run
with -O0 to check this in the future.
Prior to this change VLDM/VSTM used addressing mode #5 , but not really.
The offset field was used to hold a count of the number of registers being
loaded or stored, and the AM5 opcode field was expanded to specify the IA
or DB mode, instead of the standard ADD/SUB specifier. Much of the backend
was not aware of these special cases. The crashes occured when rewriting
a frameindex caused the AM5 offset field to be changed so that it did not
have a valid submode. I don't know exactly what changed to expose this now.
Maybe we've never done much with -O0 and NEON. Regardless, there's no longer
any reason to keep a count of the VLDM/VSTM registers, so we can use
addressing mode #4 and clean things up in a lot of places.
llvm-svn: 112322
2010-08-27 23:18:17 +00:00
481d7a9ab4
Rename sat_shift operand to shift_imm, in preparation for using it for other
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instructions besides saturate instructions. No functional changes.
llvm-svn: 111168
2010-08-16 18:27:34 +00:00
8e8f1c133a
Cleaned up the for-disassembly-only entries in the arm instruction table so that
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the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.
llvm-svn: 110951
2010-08-12 20:46:17 +00:00
add513112a
Move the ARM SSAT and USAT optional shift amount operand out of the
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instruction opcode. This also fixes part of PR7792.
llvm-svn: 110875
2010-08-11 23:10:46 +00:00
97886d59d1
ARM "rrx" shift operands do not have an immediate. PR7790.
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llvm-svn: 110292
2010-08-05 00:34:42 +00:00
a52ddc496a
Implement target specific getDebugValueLocation().
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llvm-svn: 110267
2010-08-04 22:39:39 +00:00
b128824b60
Move newlines before inline jumptables from the asm strings in .td files to
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the jtblock_operand print methods. This avoids extra newlines in the
disassembler's output. PR7757.
llvm-svn: 109948
2010-07-31 06:28:10 +00:00
4320e2d1bb
Add the __TEXT,__StaticInit section to the list of sections emitted at the
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beginning on ARM Darwin assembly files so that it won't be placed after
debug sections. Radar 8252813.
llvm-svn: 109879
2010-07-30 19:55:47 +00:00
Jason W Kim