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63536 Commits

Author SHA1 Message Date
Anton Korobeynikov b284c9d876 Revert thinko 
llvm-svn: 75968
 2009-07-16 14:01:10 +00:00
Anton Korobeynikov abbae3bc5e Temporary workaround problem with signed 32-bit imm's 
llvm-svn: 75967
 2009-07-16 14:00:42 +00:00
Anton Korobeynikov ace2a02a84 Implement InsertBranch() hook 
llvm-svn: 75966
 2009-07-16 14:00:10 +00:00
Anton Korobeynikov 73bf01f236 Pipehole pattern for i32 imm's 
llvm-svn: 75965
 2009-07-16 13:59:49 +00:00
Anton Korobeynikov ff1edc23ac Bunch of sext_inreg patterns 
llvm-svn: 75964
 2009-07-16 13:59:18 +00:00
Anton Korobeynikov c3170f5236 Provide normal 32 bit load and store 
llvm-svn: 75963
 2009-07-16 13:58:43 +00:00
Anton Korobeynikov d568f6dce2 Proper lower 'small' results 
llvm-svn: 75962
 2009-07-16 13:58:24 +00:00
Anton Korobeynikov f1bf3176c6 Completel forgot about unconditional branches 
llvm-svn: 75961
 2009-07-16 13:57:52 +00:00
Anton Korobeynikov 15d6e8785b Lower addresses of globals 
llvm-svn: 75960
 2009-07-16 13:57:27 +00:00
Anton Korobeynikov a442cdfb04 Test (incomplete) for easy muls 
llvm-svn: 75959
 2009-07-16 13:57:03 +00:00
Anton Korobeynikov f0d7d6ce65 Provide "wide" muls and divs/rems 
llvm-svn: 75958
 2009-07-16 13:56:42 +00:00
Anton Korobeynikov d919010b6a Fix thinko 
llvm-svn: 75957
 2009-07-16 13:56:11 +00:00
Anton Korobeynikov 4ee0acd326 Fix epic bug with invalid regclass for R0D 
llvm-svn: 75956
 2009-07-16 13:55:51 +00:00
Anton Korobeynikov 12996eabbd Let RegisterInfo decide whether it can emit cross-class copy or not 
llvm-svn: 75955
 2009-07-16 13:55:26 +00:00
Anton Korobeynikov 590f99b18b More register pairs (now 32 bit ones) 
llvm-svn: 75954
 2009-07-16 13:55:04 +00:00
Anton Korobeynikov ccde90b83c Add even-odd register pairs 
llvm-svn: 75953
 2009-07-16 13:54:45 +00:00
Anton Korobeynikov 31e9a53d17 Unbreak due to mainline api change 
llvm-svn: 75952
 2009-07-16 13:54:20 +00:00
Anton Korobeynikov 071178ea15 Preliminary mul lowering 
llvm-svn: 75951
 2009-07-16 13:53:55 +00:00
Anton Korobeynikov 23e3c6657c More extloads 
llvm-svn: 75950
 2009-07-16 13:53:35 +00:00
Anton Korobeynikov b04a4fa5c1 Tests for cmp / br_cc / select_cc 
llvm-svn: 75949
 2009-07-16 13:53:15 +00:00
Anton Korobeynikov 0f59e1e874 SELECT_CC lowering 
llvm-svn: 75948
 2009-07-16 13:52:51 +00:00
Anton Korobeynikov ac4fb7f977 Conditional branches and comparisons 
llvm-svn: 75947
 2009-07-16 13:52:31 +00:00
Anton Korobeynikov 11665a64b0 Emit correct offset for PseudoSourceValue 
llvm-svn: 75946
 2009-07-16 13:52:10 +00:00
Anton Korobeynikov 29329a0695 Provide proper stack offsets for outgoing arguments 
llvm-svn: 75945
 2009-07-16 13:51:53 +00:00
Anton Korobeynikov 44483f9eb3 Change register allocation order to reduce amount of callee-saved regs to be spilled. 
llvm-svn: 75944
 2009-07-16 13:51:34 +00:00
Anton Korobeynikov 8695a30066 Emit callee-saved regs spills / restores 
llvm-svn: 75943
 2009-07-16 13:51:12 +00:00
Anton Korobeynikov b638a8fd73 Scan for presence of calls and determine max callframe size early. To allow ProcessFunctionBeforeCalleeSaveScan() use this information 
llvm-svn: 75942
 2009-07-16 13:50:40 +00:00
Anton Korobeynikov d694b9ff8b Some preliminary call lowering 
llvm-svn: 75941
 2009-07-16 13:50:21 +00:00
Anton Korobeynikov 018599fc0b Prologue / epilogue emission 
llvm-svn: 75940
 2009-07-16 13:49:49 +00:00
Anton Korobeynikov 09890bd434 Add simple frame index elimination 
llvm-svn: 75939
 2009-07-16 13:49:25 +00:00
Anton Korobeynikov 5dc5629100 Provide proper test :) 
llvm-svn: 75938
 2009-07-16 13:48:59 +00:00
Anton Korobeynikov 8a095bf56d Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common 
llvm-svn: 75937
 2009-07-16 13:48:42 +00:00
Anton Korobeynikov 19911b338a Do not truncate sign bits for negative imms 
llvm-svn: 75936
 2009-07-16 13:48:23 +00:00
Anton Korobeynikov 405833dfb6 Add address computation stuff 
llvm-svn: 75935
 2009-07-16 13:47:59 +00:00
Anton Korobeynikov b1e35b311c Cleanup 
llvm-svn: 75934
 2009-07-16 13:47:36 +00:00
Anton Korobeynikov df99232d27 Add mem-imm stores 
llvm-svn: 75933
 2009-07-16 13:47:14 +00:00
Anton Korobeynikov 98dfc8c2c4 [PATCH 023/155] Typo 
llvm-svn: 75932
 2009-07-16 13:45:22 +00:00
Anton Korobeynikov 44f8bbfb3f Add stores and truncstores 
llvm-svn: 75931
 2009-07-16 13:45:00 +00:00
Anton Korobeynikov 11b91b4e2e Add patterns for various extloads 
llvm-svn: 75930
 2009-07-16 13:44:30 +00:00
Anton Korobeynikov 0179364392 Do some heroic rri address matching (shamelessly stolen from x86 backend). Not tested though. 
llvm-svn: 75929
 2009-07-16 13:44:00 +00:00
Anton Korobeynikov 3709f49ee9 Change register allocation order, so R0 will be allocated the last among scratch. This will make address-calculation code much more happy. 
llvm-svn: 75928
 2009-07-16 13:43:40 +00:00
Anton Korobeynikov 04be818918 Add shifts and reg-imm address matching 
llvm-svn: 75927
 2009-07-16 13:43:18 +00:00
Anton Korobeynikov cf7ea6a94f Add bunch of 32-bit patterns... Uffff :) 
llvm-svn: 75926
 2009-07-16 13:42:31 +00:00
Anton Korobeynikov bbd751e410 Propagate return result extension type 
llvm-svn: 75925
 2009-07-16 13:35:48 +00:00
Rafael Espindola 5618d808e0 Add tests for fixes I committed earlier to the C++ FE. 
llvm-svn: 75924
 2009-07-16 13:35:42 +00:00
Anton Korobeynikov 293324104b Add 32 bit subregs 
llvm-svn: 75923
 2009-07-16 13:35:30 +00:00
Anton Korobeynikov de517f1e32 Add another bunch of reg-imm patterns for add/or/and/xor 
llvm-svn: 75922
 2009-07-16 13:35:08 +00:00
Anton Korobeynikov ebe2de0e14 Add bunch of reg-imm movs 
llvm-svn: 75921
 2009-07-16 13:34:50 +00:00
Anton Korobeynikov 168614f54f Proper match halfword-imm operands for mov and add 
llvm-svn: 75920
 2009-07-16 13:34:24 +00:00
Anton Korobeynikov 28234bcde2 Provide masked reg-imm 'or' and 'and' 
llvm-svn: 75919
 2009-07-16 13:33:57 +00:00