replica
/
hanchenye-llvm-project
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
18,336 Commits 2 Branches 0 Tags 1.8 GiB
Commit Graph

18336 Commits

Author SHA1 Message Date
Chris Lattner 53c40624f9 Add completely untested support for mtcrf/mfcrf encoding 
llvm-svn: 21353
 2005-04-19 05:41:52 +00:00
Chris Lattner baa9be572b switch over the rest of the formats that use RC to use isDOT 
llvm-svn: 21352
 2005-04-19 05:21:30 +00:00
Chris Lattner f9172e14c9 Convert the XForm instrs and XSForm instruction over to use isDOT 
llvm-svn: 21351
 2005-04-19 05:15:18 +00:00
Chris Lattner 5b78da4571 Now that the ppc64 and vmx operands of I are always 0, forward substitute 
them away.

llvm-svn: 21350
 2005-04-19 05:05:22 +00:00
Chris Lattner 116a9e5a34 convert over bform and iform instructions 
llvm-svn: 21349
 2005-04-19 05:00:59 +00:00
Chris Lattner b2367e398e Convert over DForm and DSForm instructions 
llvm-svn: 21348
 2005-04-19 04:59:28 +00:00
Chris Lattner 15709c2c33 Convert XLForm and XForm instructions over to use PPC64 when appropriate. 
llvm-svn: 21347
 2005-04-19 04:51:30 +00:00
Chris Lattner d790d22f22 Convert XO XS and XFX forms to use isPPC64 
llvm-svn: 21346
 2005-04-19 04:40:07 +00:00
Chris Lattner c7cb8c77fb Turn PPC64 and VMX into classes that can be added to instructions instead of 
bits that must be passed up the inheritance hierarchy.  Convert MForm and AForm
instructions over

llvm-svn: 21345
 2005-04-19 04:32:54 +00:00
Chris Lattner ef94374a1c Major change to tblgen: instead of resolving values every time a class is 
finished up, only resolve fully when the def is defined.  This allows things
to be changed and all uses to be propagated through.  This implements
TableGen/LazyChange.td and fixes TemplateArgRename.td in the process.

None of the .td files used in LLVM backends are changed at all by this
patch.

llvm-svn: 21344
 2005-04-19 03:36:21 +00:00
Chris Lattner ab77740715 New testcase for a changing values late and allowing them to propagate 
llvm-svn: 21343
 2005-04-19 03:34:58 +00:00
Chris Lattner d90d566dee Make this significantly harder 
llvm-svn: 21342
 2005-04-19 02:58:57 +00:00
Chris Lattner 17bd7c5a88 Add a real run line 
llvm-svn: 21341
 2005-04-19 02:53:26 +00:00
Chris Lattner c00f712fc0 fix this testcase 
llvm-svn: 21340
 2005-04-19 02:52:04 +00:00
Chris Lattner 2b76da7d1f new testcase 
llvm-svn: 21339
 2005-04-19 02:26:23 +00:00
Chris Lattner f2fab50974 add a run line 
llvm-svn: 21338
 2005-04-19 01:37:24 +00:00
Chris Lattner ed8335e35b Tell dj to run the tests in this directory 
llvm-svn: 21337
 2005-04-19 01:36:41 +00:00
Chris Lattner 3ff0e11294 implementing shifting of literal integers 
llvm-svn: 21336
 2005-04-19 01:17:35 +00:00
Chris Lattner 101fc501d0 Add initial lexer and parser support for shifting values. Every use of this 
will lead to it being rejected though.

llvm-svn: 21335
 2005-04-19 01:11:03 +00:00
Nate Begeman 2331c061ee Next round of PPC CR optimizations. For the following code: 
int %bar(float %a, float %b, float %c, float %d) {
entry:
    %tmp.1 = setlt float %a, %d
    %tmp.2 = setlt float %b, %d
    %or = or bool %tmp.1, %tmp.2
    %tmp.3 = setgt float %c, %d
    %tmp.4 = or bool %or, %tmp.3
    %tmp.5 = and bool %tmp.4, true
    %retval = cast bool %tmp.5 to int
    ret int %retval
}

We now emit:

_bar:
.LBB_bar_0:     ; entry
        fcmpu cr0, f1, f4
        fcmpu cr1, f2, f4
        cror 0, 0, 4
        fcmpu cr1, f3, f4
        cror 28, 0, 5
        mfcr r2
        rlwinm r3, r2, 29, 31, 31
        blr

Instead of:

_bar:
.LBB_bar_0:     ; entry
        fcmpu cr7, f1, f4
        mfcr r2
        rlwinm r2, r2, 29, 31, 31
        fcmpu cr7, f2, f4
        mfcr r3
        rlwinm r3, r3, 29, 31, 31
        or r2, r2, r3
        fcmpu cr7, f3, f4
        mfcr r3
        rlwinm r3, r3, 30, 31, 31
        or r3, r2, r3
        blr

llvm-svn: 21321
 2005-04-18 07:48:09 +00:00
Chris Lattner ee84413730 silence a bogus warning 
llvm-svn: 21320
 2005-04-18 05:26:21 +00:00
Chris Lattner b61ecb5875 Fold setcc of MVT::i1 operands into logical operations 
llvm-svn: 21319
 2005-04-18 04:48:12 +00:00
Chris Lattner 6d40fd01fe Another minor simplification: handle setcc (zero_extend x), c -> setcc(x, c') 
llvm-svn: 21318
 2005-04-18 04:30:45 +00:00
Chris Lattner 868d473009 Another simple xform 
llvm-svn: 21317
 2005-04-18 04:11:19 +00:00
Chris Lattner bd22d83d15 Fold: 
// (X != 0) | (Y != 0) -> (X|Y != 0)
        // (X == 0) & (Y == 0) -> (X|Y == 0)

Compiling this:

int %bar(int %a, int %b) {
        entry:
        %tmp.1 = setne int %a, 0
        %tmp.2 = setne int %b, 0
        %tmp.3 = or bool %tmp.1, %tmp.2
        %retval = cast bool %tmp.3 to int
        ret int %retval
        }

to this:

_bar:
        or r2, r3, r4
        addic r3, r2, -1
        subfe r3, r3, r2
        blr

instead of:

_bar:
        addic r2, r3, -1
        subfe r2, r2, r3
        addic r3, r4, -1
        subfe r3, r3, r4
        or r3, r2, r3
        blr

llvm-svn: 21316
 2005-04-18 03:59:53 +00:00
Chris Lattner d929f8bcd3 Make the AND elimination operation recursive and significantly more powerful, 
eliminating an and for Nate's testcase:

int %bar(int %a, int %b) {
        entry:
        %tmp.1 = setne int %a, 0
        %tmp.2 = setne int %b, 0
        %tmp.3 = or bool %tmp.1, %tmp.2
        %retval = cast bool %tmp.3 to int
        ret int %retval
        }

generating:

_bar:
        addic r2, r3, -1
        subfe r2, r2, r3
        addic r3, r4, -1
        subfe r3, r3, r4
        or r3, r2, r3
        blr

instead of:

_bar:
        addic r2, r3, -1
        subfe r2, r2, r3
        addic r3, r4, -1
        subfe r3, r3, r4
        or r2, r2, r3
        rlwinm r3, r2, 0, 31, 31
        blr

llvm-svn: 21315
 2005-04-18 03:48:41 +00:00
Nate Begeman 602a45f415 Change codegen for setcc to read the bit directly out of the condition 
register.  Added support in the .td file for the g5-specific variant
  of cr -> gpr moves that executes faster, but we currently don't
  generate it.

llvm-svn: 21314
 2005-04-18 02:43:24 +00:00
Chris Lattner ed5189da51 Add support for targets that require stubs for external functions. 
llvm-svn: 21313
 2005-04-18 01:44:27 +00:00
Chris Lattner f281f791b5 Handle ExternalSymbol operands in the PPC JIT 
llvm-svn: 21312
 2005-04-18 00:46:10 +00:00
Nate Begeman f24225d4d7 Update dejagnu tests to use the new pattern isel flag 
llvm-svn: 21311
 2005-04-16 04:25:48 +00:00
Jeff Cohen df4f480498 Add CondPropagate.cpp to VC++ Transforms project 
llvm-svn: 21310
 2005-04-16 02:51:44 +00:00
Nate Begeman 779c5cbb44 Make pattern isel default for ppc 
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
  0 == off
  1 == on
  2 == target default

llvm-svn: 21309
 2005-04-15 22:12:16 +00:00
Chris Lattner e0a9d042e2 new pass 
llvm-svn: 21307
 2005-04-15 21:13:16 +00:00
Chris Lattner 16a50fd0a0 a new simple pass, which will be extended to be more useful in the future. 
This pass forward branches through conditions when it can show that the
conditions is either always true or false for a predecessor.  This currently
only handles the most simple cases of this, but is successful at threading
across 2489 branches and 65 switch instructions in 176.gcc, which isn't bad.

llvm-svn: 21306
 2005-04-15 19:28:32 +00:00
Chris Lattner d041242256 add a new prototype 
llvm-svn: 21305
 2005-04-15 19:24:49 +00:00
Chris Lattner 8579c2c474 new testcase 
llvm-svn: 21304
 2005-04-15 19:24:36 +00:00
Andrew Lenharth 00ce283b3f fix calls 
llvm-svn: 21303
 2005-04-14 17:34:20 +00:00
Andrew Lenharth 7ae3aba5aa a 21264 fix, and fix the operator precidence on an and -> zap check (should fix hundreds of test cases 
llvm-svn: 21302
 2005-04-14 16:24:00 +00:00
Andrew Lenharth 10b7bceb8e added a random and mask test 
llvm-svn: 21301
 2005-04-14 16:17:49 +00:00
Duraid Madina 0a7c2b9078 print negative 64 bit immediates as negative numbers, makes things a little 
easier on the eyes, not that numbers like 18446744073709541376 are bad or
anything

llvm-svn: 21300
 2005-04-14 10:08:01 +00:00
Duraid Madina dfbbcc098b oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4 
llvm-svn: 21299
 2005-04-14 10:06:35 +00:00
Nate Begeman 53d3eccbe2 Implement multi-way branches through logical ops on condition registers. 
This can generate considerably shorter code, reducing the size of crafty
by almost 1%.  Also fix the printing of mcrf.  The code is currently
disabled until it gets a bit more testing, but should work as-is.

llvm-svn: 21298
 2005-04-14 09:45:08 +00:00
Nate Begeman 80c095f422 Add a couple missing transforms in getSetCC that were triggering assertions 
in the PPC Pattern ISel

llvm-svn: 21297
 2005-04-14 08:56:52 +00:00
Duraid Madina f6b666fb06 we have zextloads, not sextloads! 
llvm-svn: 21296
 2005-04-14 08:37:32 +00:00
Nate Begeman 65a82c562e Add the necessary support to codegen condition register logical ops with 
register allocated condition registers.  Make sure that the printed
  output is gas compatible.

llvm-svn: 21295
 2005-04-14 03:20:38 +00:00
Nate Begeman be21011911 Start allocating condition registers. Almost all explicit uses of CR0 are 
now gone.  Next step is to get rid of the remaining ones and then start
allocating bools to CRs where appropriate.

llvm-svn: 21294
 2005-04-13 23:15:44 +00:00
Nate Begeman dd1bb81d04 Implement the fold shift X, zext(Y) -> shift X, Y at the target level, 
where it is safe to do so.

llvm-svn: 21293
 2005-04-13 22:14:14 +00:00
Nate Begeman 04ae873648 Add CodeGen tests for the recent SelectionDAG transforms 
llvm-svn: 21292
 2005-04-13 21:45:13 +00:00
Nate Begeman 4ddd81657b Disbale the broken fold of shift + sz[ext] for now 
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
  always produces zero or one.

llvm-svn: 21291
 2005-04-13 21:23:31 +00:00
Chris Lattner 56d177a344 fix an infinite loop 
llvm-svn: 21289
 2005-04-13 20:06:29 +00:00