edab242488
Replace the tablegen RegisterClass field SubRegClassList with an alist-like data
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structure that represents a mapping without any dependencies on SubRegIndex
numbering.
This brings us closer to being able to remove the explicit SubRegIndex
numbering, and it is now possible to specify any mapping without inventing
*_INVALID register classes.
llvm-svn: 104563
2010-05-24 21:46:58 +00:00
fd6f16fab9
SubRegIndex'ize MSP430
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llvm-svn: 104513
2010-05-24 17:42:55 +00:00
ed1c3dfa0f
Add normal and trunc stores
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llvm-svn: 70724
2009-05-03 13:06:26 +00:00
b900245e13
Add 8-bit regclass and pattern for sext_inreg
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llvm-svn: 70721
2009-05-03 13:05:22 +00:00
6ff6fc95a0
gas uses lower letter for register names
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llvm-svn: 70711
2009-05-03 13:02:22 +00:00
d7afd69e3b
Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly!
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llvm-svn: 70710
2009-05-03 13:02:04 +00:00
77e5a11ec2
Fix register names, fix register allocation order, handle frame pointer.
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llvm-svn: 70701
2009-05-03 12:59:16 +00:00
7c4db99df3
Typo
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llvm-svn: 70695
2009-05-03 12:57:47 +00:00
101380015c
Dummy MSP430 backend
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llvm-svn: 70694
2009-05-03 12:57:15 +00:00
Jakob Stoklund Olesen